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UART IMPLEMENTATION ON FPGA

BySmarak Acharya 1MV07EC100

Krishnabir Ghosh 1MV07EC121

Nishanth K 1MV07EC061

Vinuth M 1MV07EC113

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What is Serial Communication?

Introduction

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Why Serial Communication over ParallelCommunication ?

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Serial Communication Techniques

Asynchronous Communication

Synchronous Communication

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Synchronous Vs Asynchronous

o When a system is receiving bits on a line,how does it know when does a bit end and theother start.

0 1 1 00 1 00 0 1 1 1 0 0

oAdvantages and Disadvantages

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UART

A Universal Asynchronous Receiver/Transmitter(UART) is a type of asynchronous receiver/transmitter , a piece of computer hardware thattranslate data between parallel and serial form.

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Featuresof UART

Serial Transmission in full duplex mode. Used in conjunction with communication

standards such as EIA RS232, RS422 or RS

485. Transmits data in frames.

Data format and transmission speeds areconfigurable.

Used to connect two devices with differentclock speeds such as a PC and an I/O device.

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UART : Working

Receiver : Serial data to Parallel data Transmitter : Parallel data to Serial data

Transmit

BufferTransmitter Receiver

Receive

Buffer

Parallel

Data

Serial

Channel

Parallel

Data

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UART Frame

Start Bit Always 0

Parity bit As per parity selectedStop Bit Always 1Data Bits 5-8

Overrun ErrorParity Error Frame BasedFraming Error

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RS232

RS-232 (Recommended Standard 232) Standards:

bit 1 represented by -3~-25V

bit 0 represented by +3~+25V MAX232 converts the TTL logic levels (+5V and -

5V) to the RS232 voltage levels and vice versa

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UART: Hardware Implementation

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Functional Diagram

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Transmitter Operation

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Transmitter Flow

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Receiver Operation

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Receiver Flow

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Start Bit Detection

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Xilinx Spartan 3

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Design Implementation: translate

map

place and route

Device Programming: create a bit file to program fpga

generate jtag file to download to the device

use iMPACT to program the device

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UART: Simulation

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Functional Diagram

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Operation

Similar to standard UART

Additional signaling operations:

Handshaking signals: Transmitter: TXRDY, XRDYT

Receiver: XRDYR, RXRDY

Interrupt: Transmitter: RETRAN

Receiver: NACK

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Transmitter Flow

Normal Transmitter Flow Retransmit Flow

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Receiver Flow

Normal Receiver Flow Receiver Flow incase of Error

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Simulation Diagrams

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Receiver: 16 bit data with Two Stop bits andParity Inhibited (No Errors)

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Receiver: 16 bit data with Two stop bits(Parity Error)

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Transmitter: 16 bit data Two StopBits and Parity Inhibited (No Errors)

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APPLICATIONS

Serial Communication.

Software Loading.

Software Debugging.

Connection from PC to Peripheral Devices such as

printers.

Device Testing.

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CONCLUSION

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