Hardware Reference Manual - Stanford...

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Version 0.4 In Collaboration with Stanford University C5535 DSPSHIELD Hardware Reference Manual H/W Rev. A

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Version 0.4

In Collaboration with Stanford University

C5535 DSPSHIELD Hardware Reference Manual

H/W Rev. A

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Revision History

Version Date Author Notes 0.1 Aug 12, 2013 D. Garcia 1 0.2 Aug 19, 2013 D. Garcia 2 0.3 Aug 29, 2013 D. Garcia 3 0.4 Sept 9, 2013 D. Garcia 4

NOTES:

1. Initial draft. 2. Release before board Power Up. 3. Modified based on 1 week of testing. 4. Modified based on 2 weeks of testing.

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Table of Contents 1 C5535 DSPShield ...................................................................................................... 1 1.1 Hardware Reference Manual ......................................................................................1 1.2 DSPShield Key Features ............................................................................................1 1.3 DSPShield Architecture..............................................................................................2 1.4 User Control Elements ...............................................................................................3 2 Power Management .................................................................................................. 4 2.1 External Power Interface ............................................................................................4 2.2 Internal Voltages ........................................................................................................6 2.3 Voltage Monitoring ....................................................................................................7 2.4 C5535 DSP Core Voltage ...........................................................................................7 3 C5535 DSP and Internal Peripherals ...................................................................... 7 3.1 Parallel and Serial Peripherals ....................................................................................7 3.2 Clock Sources .............................................................................................................9 3.3 ROM Bootloader ........................................................................................................9 3.4 /INT1, /INT0, XF, WAKEUP ..................................................................................10 3.5 USB Controller .........................................................................................................11 3.6 MMC/SDx Controller ...............................................................................................11 3.7 I2C ............................................................................................................................11 4 DSPShield Peripherals............................................................................................ 12 4.1 I2C GPIO Expander .................................................................................................12 4.2 OLED Display ..........................................................................................................15 4.3 TLV320ACI3204 Audio Codec ...............................................................................15 4.4 Micro SD Card Connector ........................................................................................15 4.5 DIP Switch Inputs, LEDs and Push Button HW Reset ............................................15 4.6 DSP Expansion Connector .......................................................................................16 5 Emulation................................................................................................................. 17 5.1 FTDI FT2232H .........................................................................................................17 5.2 Power via XDS-USB ................................................................................................18 6 Arduino Interface .................................................................................................... 18 6.1 Arduino/DSPShield Interface Block Diagram .........................................................20 6.1.1 Interface Logic Levels ............................................................................... 21 6.1.2 Analog Inputs ............................................................................................ 21 6.2 Arduino/DSPShield Reset Multiplexing ..................................................................22

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6.2.1 Default Configuration ................................................................................ 24 6.2.2 C5535 DSP Self Resets ............................................................................. 24 6.2.3 C5535 DSP Isolated from ARD_RESETN ............................................... 24 6.2.4 C5535 DSP Resets Arduino ...................................................................... 24 6.2.5 Emulator Resets the DSPShield Exclusively............................................. 24 6.3 DSPShield UART Multiplexing ...............................................................................24 6.3.1 UART DSP Expansion Connector Mode .................................................. 27 6.3.2 UART Default, Arduino UNO/PC and Arduino Interprocessor Communication Modes ..................................................................................................... 27 6.3.3 UART Emulator Serial Port Communication Mode ................................. 28 6.4 Arduino/DSPShield I2C Interface ............................................................................28 6.5 Arduino SPI Interface ...............................................................................................29 6.5.1 Arduino Master/C5535 DSP Isolated ........................................................ 30 6.5.2 Arduino Slave/C5535 DSP Master ............................................................ 30 6.5.3 Arduino Isolated/C5535 DSP Master ........................................................ 31 7 Resistor Multiplexing Configurations ................................................................... 31 8 Stand-Alone Mode .................................................................................................. 33 9 DSPShield Application Photos ............................................................................... 33 10 Top/Bottom Assembly Drawings, Mechanicals, Schematics, and BOM .......... 35

Reference Documents Title / source Owner Version

1 TMS320C5535 Data Sheet SPRS737B AUGUST 2011–REVISED MARCH 2012 TI

2 TMX320C5535 Technical Reference Manual SPRUH87C August 2011–Revised March 2012 TI

3 TLV320AIC3204 Ultra Low Power Stereo Audio Codec SLOS602B –SEPTEMBER 2008–REVISED OCTOBER 2012 TI

4 TCA6416A I2C to GPIO Expander SCPS194A – MAY 2009– REVISED NOVEMBER 2009 TI

5 Dual High Speed USB to Multipurpose UART/FIFO IC http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT2232H.pdf FTDI

6 Arduino Information http://arduino.cc/en/Main/ArduinoBoardUno Arduino

7 OLED Display OSD9616P0992-10 http://www.osddisplays.com/

OSD Display

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Acronyms Abbreviations and Definitions

Arduino Family of Open Hardware uC Boards Arduino UNO 2chip Arduino uC Board Arduino Leonardo 1chip Arduino uC Board CCS Code Composer Studio TI Emulation Software DC-DC Switching regulator DSP Digital Signal Processor DNI Do Not Install Energia Open Source software IDE for TI Processors GPIO General Purpose Input Output I2C Inter-Integrated Circuit (2-pin serial bus) I2S Integrated Interchip Sound (4-pin serial bus for audio devices) IDE Integrated Development Environment LCD Liquid Crystal Display LDO Low Drop-Out regulator MMC/SD Multimedia Card/Secure Digital (flash memory) OLED Organic Light Emitting Diode (Display) SHIELD Daughter Card for Arduino uC or compatible boards UART Universal Asynchronous Receiver Transmitter (serial bus) XDS Extended Development System. JTAG Emulators for TI

Processors (embedded or external)

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1 C5535 DSPShield The C5535 DSPShield is an evaluation board for the Texas Instruments TMS320C5535 Fixed-Point Digital Signal Processor (DSP). It is designed to be both a “Shield” (i.e. daughter card) for the Arduino Open-Hardware family of microcontroller (uC) boards and also a Stand-Alone development board. With a rich set of hardware features and a connector for prototyping expansion, the C5535 DSPShield can be used to develop applications such as

• Wireless Audio Devices (e.g., Headsets, Microphones, Speakerphones) • Echo Cancellation Headphones • Portable Medical Devices • Voice Applications • Industrial Controls • Fingerprint Biometrics • Software-defined Radio

1.1 Hardware Reference Manual This document describes the hardware aspects of the C5535 DSPShield. Throughout this document, shades of blue in figures and tables highlight either the Arduino uC board or the DSPShield’s Arduino Interface. Shades of red in figures and tables highlight a DSPShield specific feature. Paragraphs begining with NOTE: indicate a board feature that could be of special interest to the user. Paragraphs begining with WARNING: indicate a configuration that could electrically damage the board either through power shorts or through bus contention of logic buffer drivers.

1.2 DSPShield Key Features The key features of the C5535 DSPShield are shown in Figure 1. The features include:

• TI TMS320C5535AZHHA10 (100MHz) Digital Signal Processor • TI TLV320AIC3204IRGBR Stereo Audio Codec with separate stereo in and

stereo out connectors • Micro SD Card Connector • USB 2.0 interface to the C5535 DSP • OLED 96x16 pixel display • Arduino Compatible Header Connectors

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in Table 1, with a reference to the section where their functions are described. Their positions on the board are shown in the top and bottom assembly drawings in Section 9. User Control Element

Function Section Description

SW1 Quad DIP Switch for GPIN 4.5 SW2 Reset Push Button 4.5 P1 DSP-USB Micro USB Connector 3.5 P2 Micro SD Card Adapter 3.6, 4.4 P3/DISP1 OLED Display 4.2 P4 40-Pin DSP Expansion Connector 4.6 P5 Arduino Digital Header 1 6.1 P6 Arduino Digital Header 2 6.1 P7 Arduino Power Header 6.1 P8 Arduino Analog Header 6.1 P9 XDS-USB Emulation Micro USB connector 5 P10 Arduino ICSP Male/Female Header 6.1 J1 Alternate JTAG Header when Embedded Emulator is not available 5.1 J2 Audio Codec MIC input 4.3 J3 Audio Codec Headphone output 4.3 JPA DSP-USB and/or XDS-USB +5V Input Select Jumper 2.1 JPB Arduino +5V Input/Output Select Jumper 2.1 JPC Arduino +3.3V Output ONLY Select Jumper 2.1 JPD Arduino IOREF Input/Output Select Jumper 2.1, 6.1.1 JPE Internally generated Ardino IOREF +5V or +3.3V Select Jumper 2.1, 6.1.1 JPF XDS-USB +5V Connector Select Jumper 5.2 LED-XF C5535 XF Status 3.3, 4.5 LED0 General Purpose LED 4.5 LED1 General Purpose LED 4.5 LED2 General Purpose LED 4.5 XDS-LED Emulator Connected Status 5.1 Table 1. User Control Elements

2 Power Management The DSPShield requires a single +5V source. All other required voltages used on the board are derived from this source.

2.1 External Power Interface The +5V source can come from the DSP-USB connector (P1), XDS-USB connector (P9), or from the Arduino Power Header (P7). The DSPShield power management block diagram is shown in Figure 3. Jumpers JPA, JPB, JPC, JPD, JPE and JPF control the multiplexing of power sources into and out of the board. Some common power management configurations are listed in Table 2. In the table, dashes mean no shunt is

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WARNING: Care should be taken to prevent power sourcing conflicts. Table 2 shows valid jumper settings. Other settings may be possible, but must be evaluated for a specific application. One example of an invalid configuration is when JPC is shunted, and the +3.3V pin on the Arduino Power Header is being powered externally by Arduino. The internally derived +3.3V and the external +3.3V will be in conflict.

2.2 Internal Voltages There are a number of voltages that can be found on the DSPShield. They are derived from various ICs and can be monitored at certain points. Table 3 lists the voltages, test points and the devices/functions powered by the voltages.

Voltage Test Point Source Device/Functions +5V TP8 External 1. LMR10510X DC-DC Regulator

2. ARD_INTF_VCC 3. ARD_5V (sourcing)

+3.3V TP9 LMR10510X DC-DC Regulator (VR1)

1. C5535 USB_VDDOSC 2. C5535 USB_VDDA3P3 3. C5535 USB_VDDPLL 4. C5535 DVD_DRTC 5. C5535 LDOI 6. C5535 DVDDIO 7. All Muxes 8. SD Card 9. GPIO Expander 2 10. AIC3204 IOVDD 11. ARD_INTF_VCC 12. ARD_3.3V (sourcing) 13. DSP Expansion Header +3.3V 14. Emulator +3.3V

+1.8V TP5, TP6 Internal AIC3204 LDO

1. AIC3204 AVDD, TP5 2. AIC3204 DVDD, TP6

+1.3V TP10 LP3982 LDO (VR2) 1. C5535 CVDDRTC 2. C5535 CVDD (0 OHM resistor mux

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Pin 1 of C45 C5535 USB_LDOO 1. C5535 USB_VDDA1P3 2. C5535 USB_VDD1P3

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Pin 1 of C53 C5535 ANA_LDOO 1. C5535 VDDA_ANA 2. C5535 VDDA_PLL

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Pin 1 of C125 FTDI FT2232H VREGOUT

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GND TP11 - 1. Digital Ground AGND0 TP7 - 1. AIC3204 Analog Ground

Table 3. DSPShield Voltages and Grounds

2.3 Voltage Monitoring The output voltages of the LMR10510X DC-DC (+3.3V) regulator and the LP3982 (+1.3V) LDO regulator are monitored by a TPS386596L33 Quad Reset Supervisory IC. If either voltage drops below certain thresholds, the TPS386596L33’s active low open-drain reset output will go low and reset the C5535 DSP and the DSPShield. The TPS386596L33 has a 50 msec delay time from the time all sense inputs are valid to the reset output becoming inactive.

2.4 C5535 DSP Core Voltage The C5535 DSP’s +1.3V Core Voltage, CVDD, can be driven either by its internal LDO or by the LP3982 LDO. The selection is accomplished by populating certain combinations of resistors R25, R26, R27 and R28. The two options are listed in Table 4. CVDD = C5535 DSP_LDOO (DEFAULT )

R25 = DNI R26 = 0 Ohm Resistor R27 = 0 Ohm 1/8W Resistor R28 = DNI

CVDD = LP3882 LDO

R25 = 10.0K Ohm Resistor R26 = DNI R27 = DNI R28 = 0.0 Ohm 1/8W Resistor

Table 4. C5535 DSP Core Voltage Selection

3 C5535 DSP and Internal Peripherals The C5535 DSP is a high-performance, low-power, fixed-point Digital Signal Processor. It has dual multipliers, dual ALUs, and a tightly coupled FFT hardware accelerator for performing math intensive signal processing algorithms. It has multiple I/O peripherals that allow it to easily connect to serial Analog to Digital Converters, Digital to Analog Converters and integrated codecs such as the TI TLV320AIC3204 Audio Codec.

3.1 Parallel and Serial Peripherals The C5535 DSP’s internal External Bus Selection Register (EBSR) determines which of the following: LCD controller, I2S0, I2S1, I2S2, I2S3, UART, SPI, MMC/SD and GPIO signals appear at the chip’s multiplexed GPIO pins. These peripherals can be grouped into 3 groups as shown in Tables 5a, 5b and 5c. For each group, only one mode of operation is available at a given time. Note that the DSPShield architecture further limits

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the group mode selection. Because there is an on-board OLED Display, the LCD controller peripheral is not used. PP MODE Multiplexed I/O Board Level limitationsModes 0,2,3,4,5

- Not Supported

Mode 1

SPI/I2S2/UART/6 GPIO Fully Supported. - I2S2 multiplexed between AIC3204 and DSP

Expansion Connector. - UART multiplexed between Arduino, XDS

Serial Port and DSP Expansion connector. - SPI multiplexed between Arduino and DSP

Expansion connector. - GPIO[12:15] routed directly to DSP

Expansion connector. - GPIO16 routed to the DSP Expansion

Connector IF R67 is Installed and R66 is Not Installed (This is not the Default)

- GPIO17 routed to the DSP Expansion Connector IF R69 is Installed and R68 is Not Installed (This is not the Default)

Mode 6

SPI/I2S2/I2S3/6 GPIO Fully Supported. - I2S2 multiplexed between AIC3204 and DSP

Expansion Connector. - I2S3 routed to DSP Expansion Connector

when UART_MUX_SEL=0. - SPI multiplexed between Arduino and DSP

Expansion connector. - GPIO[12:15] routed directly to DSP

Expansion connector. - GPIO16 routed to the DSP Expansion

Connector IF R67 is Installed and R66 is Not Installed (This is not the Default)

- GPIO17 routed to the DSP Expansion Connector IF R69 is Installed and R68 is Not Installed (This is not the Default)

Table 5a. C5535 EBSR PPMODE SP1 MODE

Multiplexed I/O Board Level limitations

Mode 0,1,2

SD1/I2S1/GPIO[6:11] Fully Supported. - All signals are routed directly to the DSP

Expansion Connector.

Table 5b. C5535 EBSR SP1MODE

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SP0 MODE

Multiplexed I/O Board Level limitations

Mode 0 SD0 SD0 signals are dedicated to the SD Card Connector Modes 1, 2 - Not Supported

Table 5c. C5535 EBSR SP0MODE

3.2 Clock Sources The C5535 DSP has 3 input clock sources: the USB_MXI pin, the CLKIN pin, and the internal Real Time Clock (RTC). The USB_MXI input is connected to a 12 MHz oscillator and is the clock source for all USB peripheral activity. The CLKIN input is also connected to a 12 MHz oscillator while the RTC is connected to a 32.768 KHz crystal. Either CLKIN or the RTC can be the reference source for the C5535 DSP’s system clock generator. Resistors R8, R9, R10 and R59 select the source as shown in Table 6. The different clocks within the system clock generator block can be output on the C5535 DSP’s CLKOUT pin and monitored at Test Point TP1. System Clock Generator Reference Source

Resistor Select

12MHz External Oscillator (Default)

R8=DNI, R9=10K Ohm, R10=DNI, R59=0 Ohm

32.768 RTC R8=0 Ohm, R9=DNI, R10=0 Ohm, R59=DNI

Table 6. System Clock Generator Reference Source Select

3.3 ROM Bootloader The C5535 DSP has an on-chip ROM Bootloader (RBL). It samples the following interfaces, in order, looking for a boot signature: SPI EEPROM, I2C EEPROM, MMC/SD0 AND UART/USB. Once a boot signature is detected, the C5535 DSP will download the boot image and then jump to the entry point specified in the image. For the DSPShield, the SD0 peripheral connected to the micro SD Card connector is the default boot source. Figure 4 shows the RBL Software Architecture from the C5535 DSP datasheet.

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Figure 4. Bootloader Software Architecture

3.4 /INT1, /INT0, XF, WAKEUP The C5535 DSP’s /INT0 input is routed to the DSP Expansion Connector. It has a pull up resistor. The C5535 DSP’s /INT1 input is connected to the I2C to GPIO Expander ICs’ /INT outputs. The interrupt outputs of the 2 Expanders are open-drain and are wire-ORed together with a pull up resistor. The C5535 DSP’s XF output controls the LED, D2. A logic “1” turns on the LED. The C5535 DSP’s Wakeup pin can be monitored on Test Point TP2.

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Arduino connector, the I2C bus is buffered by a TI PCA9515B I2C Repeater IC. The IC provides a translation between the Arduino’s IOREF logic levels and the C5535 DSP’s +3.3V logic levels. On power up and reset, the PCA9515B is disabled. This isolates the DSPShield’s internal I2C bus during the boot sequence. After boot, the C5535 DSP can enable the PCA9515B by setting DSP_I2C_EN on Port0.2 of GPIO Expander 2 to a “1”.

4 DSPShield Peripherals In addition to the C5535 DSP’s internal peripherals, the DSPShield has several external peripherals that increase its functionality. The peripherals are:

1. Two TCA6416A 16-bit I2C to GPIO Expander chips 2. OLED display 3. TLV320ACI3204 Stereo Audio Codec 4. Micro SD Card connector 5. DIP Switch Inputs, LEDs, and Push Button Reset 6. Additional peripherals can be added through the use of the 40-pin DSP Expansion

Connector and the Arduino Interface Connectors.

4.1 I2C GPIO Expander The two TCA6416A (I2C to GPIO) Expander chips increase the number of GPIOs under the C5535 DSP’s direct control. Each chip provides an additional 16 GPIOs. Tables 8a and 8b list the direction (after programming) and function of each GPIO. On power up and reset, all the GPIOs are initialized as inputs. Some GPIO pins have external pull up or pull down resistors connected to them that allow the various DSPShield external peripherals to power up in a known state. For example, the U3 4-bit 1to2 multiplexer’s select pin is connected to Expander 2’s Port0.4 GPIO and also to a pull up resistor. On power up and reset the C5535 DSP’s I2S lines are multiplexed to the codec. To prevent glitches during initialization, the following sequence should be followed to program output pins.

1. Program the Expander Output Port Registers to the default values listed in tables 8a and 8b.

2. Program the appropriate direction bit in the Expander Configuration Registers for GPIOs that will be outputs.

3. After initialization, the Output Port Registers can be changed depending on the application.

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The GPIO Expanders also have an open drain active-low interrupt output. The interrupt outputs of the two GPIO Expanders are wire-ORed together and connected to the C5535 DSP’s /INT1 input. An interrupt is generated by any rising or falling edge at the port pin when programmed as an input. Resetting the interrupt is achieved when the data on the port is changed to the original setting or when data is read from the port that generated the interrupt. This interrupt feature of the GPIO Expander is very basic and lacks an interrupt mask capability. NOTES:

1. There are no external pull up or pull down resistors on GPIO pins that can be programmed as input or output. If unconnected, these unused GPIO should be programmed as an output to avoid floating inputs. The output value is irrelevant, but a logic zero is preferred.

2. Expander 1 GPIOs use IOREF to select the correct logic levels depending on the state of jumpers, JPD and JPE. Expander 2 GPIOs use +3.3V logic levels only.

Expander 1 I2CAddr=0x20

Programmed Direction

Function Reset value: all GPIO are Inputs

Port0.0 I/O Arduino I/O0 - If unconnected, set to output a logic 0

Port0.1 I/O Arduino I/O1 - If unconnected, set to output a logic 0

Port0.2 I/O Arduino I/O2 - If unconnected, set to output a logic 0

Port0.3 I/O Arduino I/O3 - If unconnected, set to output a logic 0

Port0.4 I/O Arduino I/O4 - If unconnected, set to output a logic 0

Port0.5 I/O Arduino I/O5 - If unconnected, set to output a logic 0

Port0.6 I/O Arduino I/O6 - If unconnected, set to output a logic 0

Port0.7 I/O Arduino I/O7 - If unconnected, set to output a logic 0

Port1.0 I/O Arduino I/O8 - If unconnected, set to output a logic 0

Port1.1 I/O Arduino I/O9 - If unconnected, set to output a logic 0

Port1.2 O Pull Down

Resistor on Pin

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Port1.3 O Pull Up

Resistor on Pin

UART_CNTRL1: Arduino UART Mux Control Default = 1

Port1.4 O UART_CNTRL2: Arduino UART Mux Control

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Pull Down Resistor on Pin

Default = 0

Port1.5 O Pull Up

Resistor on Pin

UART_CNTRL3: Arduino UART Mux Control Default = 1

Port1.6 O Pull Down

Resistor on Pin

RST_CNTRL0: Reset Mux Control Default = 0

Port1.7 O Pull Down

Resistor on Pin

RST_CNTRL1: Reset Mux Control Default = 0

Table 8a. Expander 1 GPIO Definitions Expander 2 I2CAddr=0x21

Programmed Direction

Function Reset value: all GPIO are Inputs

Port0.0 O LED0: 0=OFF, 1=ON Port0.1 O LED1: 0=OFF, 1=ON Port0.2 O

Pull Down Resistor on Pin

DSP_I2C_EN 0= Disable, 1= Enable Default = 0

Port0.3 O Pull Down

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Port0.4 O Pull Up

Resistor on Pin

I2S2_MUX_SEL 0=Connected to DSP Expansion Header 1=Connected to AIC3204 Codec NOTE: Manufacturing Default = 1. An alternative pull down resistor pad is available on the board.

Port0.5

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UART_MUX_SEL 0=Connected to DSP Expansion Header 1=C5535 DSP UART TX and RX connected to Arduino UART multiplexing circuitry NOTE: Manufacturing Default = 1. An alternative pull down resistor pad is available on the board.

Port0.6 O LED2: 0=OFF, 1=ON Port0.7 O

Pull Down Resistor on Pin

DSP_SPI_EN 0=Arduino SPI TXB0104 Transceiver Disabled 1=Arduino SPI TXB0104 Transceiver Enabled Default = 0

Port1.0 I/O DSP Expansion Header PIN6 - If unconnected, set to output a logic 0

Port1.1 I/O DSP Expansion Header PIN4 - If unconnected, set to output a logic 0

Port1.2 I/O DSP Expansion Header PIN5

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- If unconnected, set to output a logic 0 Port1.3 I/O DSP Expansion Header PIN3

- If unconnected, set to output a logic 0 Port1.4 I State of switch 4 on DIP Switch SW1 Port1.5 I State of switch 3 on DIP Switch SW1 Port1.6 I State of switch 2 on DIP Switch SW1 Port1.7 I State of switch 1 on DIP Switch SW1 Table 8b. Expander 2 GPIO Definitions

4.2 OLED Display The OLED Display provides a 96x16 pixel display. It is programmed via the C5535 DSP’s I2C bus and has an I2C address of 0x3C.

4.3 TLV320ACI3204 Audio Codec The TLV320AIC3204 Audio Codec interfaces to the C5535 DSP via the I2C and I2S2 buses. The C5535 DSP’s I2S2 Bus is routed to the AIC3204 when I2S2_MUX_SEL = 1. The AIC3204’s I2C address is 0x18. The microphone stereo input is routed to the Pink jack, J1. The head phone stereo output is routed to the Green jack, J2.

4.4 Micro SD Card Connector Controller SD0 is connected to a micro SD card connector, P2. The micro SD card is the default boot source for the C5535 DSP’s on-chip ROM Bootloader (RBL).

4.5 DIP Switch Inputs, LEDs and Push Button HW Reset The status of switches 1, 2, 3 and 4 of DIP switch SW1, can be read by the C5535 DSP via Port1.7, 1.6, 1.5, 1.4 of the GPIO Expander 2, respectively. The “ON” position corresponds to a logic “1” in the GPIO Expander Input Register. Three general purpose status LEDs are available for display by the C5535 DSP. They are controlled by the output value of Port0.0, 0.1, and 0.6 of GPIO Expander 2. They correspond to LEDs labeled as LED0, LED1 and LED2 on the board. A separate LED is tied to the C5535 DSP’s XF general purpose output pin. It is labeled LED-XF on the board. Writing a logic “1” to the appropriate registers will turn on the LEDs. A manual reset is provided by push button SW2. Pressing this switch will place the DSPShield in its default state.

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4.6 DSP Expansion Connector The DSP Expansion Connector routes power, ground, and various C5535 DSP GPIOs and signals to a 40-pin Female Receptacle, P2. The receptacle mates to standard 0.1” pitch 0.025” square post male headers. The signals available on the DSP Expansion Connector are listed in Table 9. All signals used 3.3V logic levels. Pin Signal Name Direction Function

1 +5V O Power to Header 2 +3.3V O Power to Header 3 X_GPIO3V3_13 I/O GPIO (Expander 2 Port1.3) 4 X_GPIO3V3_11 I/O GPIO (Expander 2 Port1.1) 5 X_GPIO3V3_12 I/O GPIO (Expander 2 Port1.2) 6 X_GPIO3V3_10 I/O GPIO (Expander 2 Port1.0) 7 X_SCL O I2C SCL 8 X_LCD_D9_I2S2_FS_GP19_SPI_CS0 I/O C5535 PPMODE SIGNALS 9 X_SDA O I2C SDA

10 X_LCD_D8_I2S2_CLK_GP18_SPI_CLK I/O C5535 PPMODE SIGNALS 11 X_NMIN I/O C5535 INT0 12 X_LCD_D11_I2S2_DX_GP27_SPI_TX I/O C5535 PPMODE SIGNALS 13 X_RESETN I/O C5535 PPMODE SIGNALS 14 X_LCD_D10_I2S2_RX_GP20_SPI_RX I/O C5535 PPMODE SIGNALS 15 GND - GROUND 16 X_LCD_D2_GP12 I/O C5535 PPMODE SIGNALS 17 X_DSP_SPI_TX I/O C5535 PPMODE SIGNALS 18 X_LCD_D3_GP13 I/O C5535 PPMODE SIGNALS 19 X_SPI_RX I/O C5535 PPMODE SIGNALS 20 X_LCD_D4_GP14 I/O C5535 PPMODE SIGNALS 21 X_DSP_SPI_CS3 I/O C5535 PPMODE SIGNALS 22 X_LCD_D5_GP15 I/O C5535 PPMODE SIGNALS 23 X_DSP_SPI_CS2 I/O C5535 PPMODE SIGNALS 24 X_RTCCLK_GP16 I/O R66=IN, R67=DNI (DEFAULT)

DSP_RTC_CLKOUT R66=DNI, R67=IN X_LCD_D6_GP16

25 X_DSP_SPI_CS1 I/O C5535 PPMODE SIGNALS 26 X_12MHZ_GP17 I/O R68=IN, R69=DNI (DEFAULT)

DSP_EXP_12MHZ (OSC) R68=DNI, R69=IN X_LCD_D7_GP17

26 X_DSP_SPI_CS0 I/O C5535 PPMODE SIGNALS 28 X_MMC1_CLK_I2S1_CLK_GP6 I/O C5535 SP1MODE SIGNALS 29 X_DSP_SPI_CLK I/O C5535 PPMODE SIGNALS 30 X_MMC1_CMD_I2S1_FS_GP7 I/O C5535 SP1MODE SIGNALS 31 X_LCD_D12_UART_RTS_GP28_I2S3_CLK I/O C5535 PPMODE SIGNALS

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The FT2232H has two channels. When connected to a PC with the appropriate software drivers installed, one channel will enumerate as a TI XDS Emulator and the second channel will enumerate as a generic USB serial port. Once the PC connection is established, the XDS_LED will turn on. The XDS100 channel is connected to the C5535 DSP’s JTAG inputs and the serial port channel is connected to the C5535 DSP’s UART interface. The serial port channel includes the data signal pair TXD/RXD, and the flow control signal pair, RTS/CTS. If not used for flow control, the FT2232H’s second serial port RTS pin can also be used as an external reset source for the DSPShield (see Section 6.2). If RTS is being used for flow control, the external reset can be driven by the FT223H’s DTR pin by removing R161 and installing a 0 Ohm resistor on R163. RTS is the default emulator reset source for the EmuResetSrc signal. On power up, RTS and DTR are tri-stated and a pull up resistor holds EmuResetSrc at a logic “1” level. Since RTS and DTR are defined as active low signals, RTS and DTR will remain high after USB enumeration. A PC can reset the DSPShield by toggling EmuResetSrc, (RTS or DTR) signal High to Low to High.

5.2 Power via XDS-USB It is possible to power the DSPShield via the XDS_USB connector. See section 2.1. The FT2232H itself is powered by the +3.3V from VR1. It also has an internal Power-On Reset that is independent from the DSPShield’s board level system reset.

6 Arduino Interface The DSPShield has a standard Arduino Interface on connectors P5, P6, P7, P8 and P10. The connectors are 0.1” pitch female receptacles with long 0.025”sq tails. The long tails for P5, P6, P7, and P8 on the bottom side allow the DSPShield to stack on top of an Arduino board and at the same time repeat the Arduino signals on the top side. The ICSP connector, P10 is similar except that is mounted with the female receptacle on the bottom. The Arduino connector signals are grouped by function and are defined in Tables 10a, 10b, 11c, 10d and 10e. Pin Signal Name Direction Function

1 ARD_IO0 I/O

I/O0 Alt: Arduino UART

2 ARD_IO1 I/O I/O1 Alt: Arduino UART

3 ARD_IO2 I/O I/O2 4 ARD_IO3 I/O I/O3

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5 ARD_IO4 I/O I/O4 6 ARD_IO5 I/O I/O5 7 ARD_IO6 I/O I/O6 8 ARD_IO7 I/O I/O7

Table 10a. Arduino Digital Header P6 Pin Signal Name Direction Function

1 ARD_IO8 I/O I/O8 2 ARD_IO9 I/O I/O9 3 ARD_SPI_SS I/O SPI Chip Select 4 ARD_MOSI I/O SPI MOSI 5 ARD_MISO I/O SPI MISO 6 ARD_SCK I/O SPI_SCK 7 GND - Ground 8 ARD_AREF - No Connection 9 ARD_SDA I/O I2C SDA

10 ARD_SCL I/O I2C SCL Table 10b. Arduino Digital Header P5 Pin Signal Name Direction Function

1 ARD_MISO I/O SPI MISO 2 ARD_+5V I/O +5V, Can be Input or Output Source 3 ARD_SCK I/O SPI_SCK 4 ARD_MOSI I/O SPI MOSI 5 ARD_RESETN I/O Bidirectional Reset Pin 6 GND - Ground

Table 10c. Arduino ICSP Header P10 Pin Signal Name Direction Function

1 ARD_NC - No Connection 2 ARD_IOREF I/O Interface Logic Voltage 3 ARD_RESETN I/O Bidirectional Reset Pin 4 ARD_+3.3V O DSPShield does not use this voltage, but can

source it. 5 ARD_+5V I/O +5V, Can be Input or Output Source 6 GND - Ground 7 GND - Ground 8 ARD_VIN - No Connection

Table 10d. Arduino Power Header P7 Pin Signal Name Direction Function

1 ARD_AD0 I Analog Input to C5535 GPAIN0 NOTE: Max Signal Level is +1.3V

2 ARD_AD1 I Analog Input to C5535 GPAIN1 NOTE: Max Signal Level is +1.3V

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6.1.1 Interface Logic Levels In Stacked Mode, the DSPShield is compatible with +5V and +3.3V versions of the Arduino family of uC boards because it uses the Arduino IOREF pin to power the DSPShield’s Arduino buffer circuitry. In Stand-Alone mode, the DSPShield uses internally derived +5V or +3.3V to source the IOREF pin as well as power the buffer circuitry. The voltage supply for the buffer ICs that interface to the Arduino can be programmed via jumpers JPD and JPE. Table 11 lists the different voltage sourcing configurations for the interface buffer ICs. WARNING: The Arduino buffer circuitry must be powered either by IOREF or by internal power. One of the entries in Table13 must be implemented.

Arduino Buffer Circuitry Voltage Sourcing JPD JPE

Externally Sourced from Arduino Power Header IOREFF. IOREF is an input.

SHUNTED (INPUT)

OPEN (Unused)

Internally Sourced +5V OPEN (Unused)

SHUNTED [1-2]

Internally Sourced +3.3V OPEN (Unused)

SHUNTED [2-3]

Stand-Alone Mode Internally Sourced +5V, IOREF is an output.

SHUNTED (OUTPUT)

SHUNTED [1-2]

Stand-Alone Mode Internally Sourced +3.3V, IOREF is an output.

SHUNTED (OUTPUT)

SHUNTED [2-3]

Table 11. Arduino Interface Voltage Source

6.1.2 Analog Inputs The four analog inputs from the Analog Connector are routed to the C5535 DSP’s GPAIN[3:0] inputs. The analog signal magnitude must be limited to 0 to +1.3V. For protection there are 100K Ohm series resistors in the input path to limit the input current. They can be replaced with a different value for specific applications. Additionally, there are Schottky diodes for clamping the voltage swing to between GND and +1.3V. However, it is recommended to use an input buffer circuit that will limit the input voltage swing by design. If the Arduino Analog Header is being used only in a pass through mode, it is recommended that the input series resistors be removed. This disconnects the C5535 DSP from the Arduino Analog Header and will allow the Arduino Analog pins to safely pass signals up to 5 volts without damaging the C5535 DSP.

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The multiplexing circuitry is controlled by the signals RST_CNTRL[1:0] in GPIO Expander 2. Some Common multiplexing configurations are listed in Table 12. On power up or when push button switch SW2 is pressed, the GPIOs of Expander 2 are configured as inputs. Until they are programmed, the external pull down resistors will maintain the Reset multiplexing circuitry in the default state.

ARD_ RESETN

EmuResetSrc

RST_ CNTRL1 Expander 2

Port1.7

RST_ CNTRL0 Expander 2

Port1.6

Reset Mode Description

0 X 0 Default

0 Default

Arduino Resets DSPShield A logic “0” from the ARD_RESETN pin will reset the DSPShield.

X 0 0 Default

0 Default

Emulator Resets Arduino and DSPShield A logic “0” from the EmuResetSrc will drive the ARD_RESETN pin and reset Arduino and the DSPShield. Default resistor placement. R122 = Installed, R119 = Not Installed

X X 0 1 C5535 Self Reset The C5535 drives a logic “0” onto the ARD_RESETN pin. The C5535 resets itself and the DSPShield.

X X 1 0 C5535 Isolated from ARD_RESETN The C5535 cannot generate or receive an external reset on the ARD_RESETN pin.

X X 1 1 C5535 Resets Arduino The C5535 drives a logic “0” onto the ARD_RESETN pin. The C5535’s own reset input is isolated from the ARD_RESETN pin.

X 0 X X Emulator Resets the DSPShield Exclusively Emulator will reset the DSPShield. ARD_RESETN is not affected. R122 = Not Installed, R119 = Installed Requires resistor placement modification

X X X X Push Button Hardware Reset Pressing the pushbutton SW2 will reset the DSPShield. This reset source will always go through.

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Table 12. Arduino/DSPShield Reset Multiplexing Control

6.2.1 Default Configuration In the default configuration, the DSPShield is sensitive to the state of the ARD_RESETN pin on the Arduino Digital Connector. Either the Arduino or the Emulator can reset the C5535 and DSPShield by applying a logic “0” to the ARD_RESETN pin. See Figures 8a and 8b.

6.2.2 C5535 DSP Self Resets In this configuration, the C5535 DSP generates a logic “0” that is routed to the ARD_RESETN pin and also to the DSPShield’s reset circuitry. This is a “circular” reset that will cause the C5535 DSP to reboot. See Figure 8c.

6.2.3 C5535 DSP Isolated from ARD_RESETN In this configuration, the DSPShield is disconnected from the ARD_RESETN pin. Only the Emulator EmuResetSrc or the hardare push button can reset the DSPShield. See Figure 8d.

6.2.4 C5535 DSP Resets Arduino In this configuration, the DSPShield’s own reset input is isolated from the ARD_RESETN pin. At the same time it drives a logic “0” onto the ARD_RESETN pin and therefore resets the Arduino. See Figure 8e.

6.2.5 Emulator Resets the DSPShield Exclusively There may be some application that requires that the emulator be able to reset the DSPshield without resetting the Arduino. In this case, by switching R119 and R122, the EmuResetSrc signal is isolated from the ARD_RESETN pin. See Figure 8f.

6.3 DSPShield UART Multiplexing The C5535 DSP’s UART peripheral can be connected to the DSP Expansion Connector, Arduino Digital Header IO0 and IO1 pins, or the Emulator secondary serial port. The multiplexing of the UART signals are controlled by UART_MUX_SEL and UART_CNTRL[3:0] via the GPIO Expanders. Table 13 lists the 4 multiplexing modes used in most applications. The different UART Multiplexing Modes are listed in Figure 9. UART_ MUX_ SEL Expander 2 Port0.5

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C5535 UART ↔ DSP Expansion Header ARD_IO[1:0]: No connection EmuSerPort: No connection

1 1 0 1 0 Default Communications Mode C5535 UART ↔ ARD_IO[1:0] ARD_IO1: No connection ARD_IO0 + EmuSerPort TxD → C5535 RxD EmuSerPort RxD ← C5535 TxD

1 1 1 1 0 Arduino UNO/PC Communications Mode C5535 UART ↔ ARD_IO[1:0] ARD_IO0 + EmuSerPort TxD → C5535 RxD EmuSerPort RxD ← C5535 TxD ARD_IO1: ← C5535 TxD

1 0 0 0 0 Arduino Interprocessor Communication Mode ARD_IO0 ← C5535 TxD EmuSerPort RxD ← C5535 TxD ARD_IO1 + EmuSerPort → C5535 RX

1 X 0 1 1 Emulator Serial Port Communication Mode ARD_IO[1:0]: No connection EmuSerPort RxD ← C5535 TxD EmuSerPort TxD → C5535 RxD

Table 13. C5535 DSP UART Peripheral Multiplexing Control WARNING: The Table13 lists 5 valid multiplexing modes based on the 5 control signals. Other combinations are possible. However, some control signal combinations may cause bus contention on the Arduino IO[1:0] connector pins due to multiple tri-state buffers being enabled at the same time. Please refer to Figure 9 and the schematic.

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After both the Arduino uC and the C5535 DSP are operational, communication between both processors is possible by choosing the Arduino Communication Mode. The Arduino uC’s TXD line is routed to the C5535 DSP’s RXD line and the Arduino uC’s RXD line is routed to the C5535 DSP’s TXD line. See Figure 8c.

6.3.3 UART Emulator Serial Port Communication Mode When UART_MUX_SEL=0, the C5535 DSP’s UART signals are always connected to the Emulator secondary serial port. The Emulator secondary serial port’s RXD line is tied directly to the C5535 DSP’s TXD line. When UART_CNTRL0=0, the Emulator secondary serial port TXD line is OR’ed with one of the Arduino’s IO[1:0] connector pins before being routed to the C5535 DSP RXD line. Care should be taken that Arduino and the Emulator serial port are not transmitting at the same time. There is no electrical conflict, but the transmission will be corrupted. See Figure 8a and 8b. When exclusive communication with the emulator serial port is desired, UART_CNTRL0 should be set to a logic “1”. This shuts off the Arduino’s TXD signal from reaching the C5535 DSP’s RXD input. See Figure 8d. When a single chip uC based Arduino board such as the Arduino Leonardo is used, there is no direct UART path between a PC and the DSPShield for C5535 DSP code downloading. In this case, the Emulator Serial Port can be used as an alternative for this purpose. Two USB PC cables are required, one to the Arduino Leonardo and one to the DSPShield’s XDS-USB connector.

6.4 Arduino/DSPShield I2C Interface The C5535 DSP’s I2C bus is isolated from the Arduino I2C bus by a PCA9515B I2C Repeater IC. The PCA9515B provides isolation and voltage level translation. The C5535 DSP side of the IC operates at +3.3V levels, while the Arduino side operates at voltage levels determined by jumpers JPD and JPE. The I2C specification allows multiple masters on the bus. When the PCA9515B is enabled (DSP_I2C_EN = 1 in GPIO Expander 2), the C5535 DSP can operate as a master and communicate with the peripherals on board the DSPShield as well as any slaves on the Arduino side. Conversely, an Arduino can be a master and communicate with any of the peripherals on the DSPShield. For example, the Arduino master could make use of the DSPShield’s OLED Display. On power up and reset, DSP_I2C_EN = 0. This isolates the Arduino and C5535 DSP I2C buses and allows the C5535 DSP to program the DSPShield’s on-board peripherals without worrying about access conflicts with an Arduino Master.

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6.5 Arduino SPI Interface The Arduino SPI interface is available on both the Arduino Digital and ICSP connectors. The Arduino uC SPI peripheral can operate in master or slave mode while the C5535 DSP SPI peripheral can only operate in master mode. The two SPI buses are connected via a TXB0104 bidirectional voltage level translator buffer. The TXB0104 provides automatic direction sensing as well as tri-state isolation capability. The control signals on Expander 2 used to control the SPI interface multiplexing are listed in Table 13. The different Multiplexing Modes are illustrated in Figure 10.

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- DSP_SPI_CS0 is routed to SS connector pin

- DSP Expansion Connector SPI_RX routed to the C5535’s SPI RX input.

Table 13. Arduino/DSPShield SPI Multiplexing Control The C5535 DSP has four SPI chip selects, CS[3:0]. The chip selects, CS[3:1], are routed directly to the DSP Expansion Connector. CS0 is shared between the Arduino SPI SS pin on the Digital Connector and the DSP Expansion Connector. When the C5535 DSP is operating as a SPI Master, SPI_RX_SEL multiplexes the Arduino’s MISO and the DSP Expansion Connector’s SPI_RX to the C5535’s SPI RX input pin.

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6.5.3 Arduino Isolated/C5535 DSP Master This configuration allows the C5535 DSP to be the sole Master of the Arduino SPI interface. DSP_SPI_EN should be programmed with a “1” and SPI_RX_SEL should be programmed with a “0”. The Arudino uC SPI pins should be tri-stated either by keeping the Arduino in reset or programming its SPI pins as inputs. See Figure 10c. When the C5535 DSPShield is in Stand-Alone mode, this configuration allows it to be the SPI master of other off the shelf “Arduino shields” or other specially designed daughter cards. One such daughter card is the TI designed “AnalogShield”.

7 Resistor Multiplexing Configurations The DSPShield has a number of multiplexing options that are controlled by resistors. The previous sections have described some of the default configurations and possible alternatives as well as control signals that can override them. Table 14 lists all the resistor combinations and their functions. The defaults describe the configuration on power up and after a manual reset. Function Resistors /

ComponentsDescription

Input to C5535 USB_MXI pin

R1, R53 Default: USB_MXI = 12MHz External Oscillator R1=DNI, R53=0 Ohm USB_MXI = GND R1=0 Ohm , R53=DNI

Ground 32.738 KHz Crystal Casing

R5, R7 Default: Crystal Case not grounded. R5=DNI, R7=DNI Crystal Case grounded. R5=0 Ohm, R7=0 Ohm

C5535 System Clock Generator Source

R8, R9, R10, R59

Default: Source from CLKIN pin (12MHz) R8=DNI, R9=10K Ohm, R10=DNI, R59=0 Ohm Source from 32.768KHz Crystal R8=0 Ohm, R9=DNI, R10=0 Ohm, R59=DNI

Input to C5535 SPI RX pin R18, R166 Default: Source from Arduino Connector MISO R18=10K Ohm, R166=DNI Source from DSP_Expansion Connector R18=DNI, R166=10K Ohm

C5535 Core Voltage Source R25, R26, R27, R28

Default: Source from C5535 internal LDO. R25=DNI, R26=0 Ohm, R27=0 Ohm, R28=DNI Source from external LDO. R25=10K Ohm, R26=DNI, R27=DNI, R28=0 Ohm

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C5535 I2S2 Mux R39, R40 Default: I2S2 Signals routed to AIC3204 Codec R39=10K Ohm, R40=DNI I2S2 Signals routed to DSP Expansion Connector R39=DNI, R40=0 Ohm

C5535 UART Mux R41,R42 Default: UART Signals routed Arduino to UART Mux Circuitry. R41=10K Ohm, R42=DNI UART Signals routed to DSP Expansion Connector R41=DNI, R42=0 Ohm

12MHz Oscillator Buffer R50, R54, R60, U6

Default: 12MHz Oscillator is not buffered R50=0 Ohm, R54=DNI, R60=DNI, U6=DNI 12MHz Oscillator buffered by LVC1G125 R50=DNI, R54=0 Ohm, R60=0Ohm, U6=Installed

DSP Expansion Connector pin24 (GPIO16 or RTC)

R66, R67 Default: C5535 RTC output routed to DSP Expansion Connecter. R66=0 Ohm, R67=DNI C5535 GPIO16 routed to DSP Expansion Connector R66=DNI, R67=0 Ohm

DSP Expansion Connector pin26 (GPIO17 or 12MHz)

R68, R69 Default: 12MHz Oscillator routed to DSP Expansion Connecter. R68=0 Ohm, R69=DNI C5535 GPIO17 routed to DSP Expansion Connector R68=DNI, R69=0 Ohm

Arduino SCL, SDA R93, R94 Default: Arduino I2C signals are not routed to the Arduino Analog Connector. R93=DNI, R94=DNI Arduino I2C signals are routed to Arduino Analog Connector. R93=0 Ohm, R94=0 Ohm

Active Pull up on Arduino UART pins

R106, R107, R112, R169

Default: Active pullup on Arduino UART pins. R106=DNI, R107=DNI, R112=4.7K, R169=DNI Passive pullup on Arduino UART pins. R106=4.7K, R107=4.7K, R112=DNI, R169=0 Ohm No pullup on Arduino UART pins. R106=DNI, R107=DNI, R112=DNI, R169=0 Ohm

EmuResetSrc Internal/External

R119, R122 Default: EmuResetSrc is routed externally to the ARD_RESETN pin. R119=DNI, R122=0 Ohm Emu_Reset_Src is routed internally only R119=0 Ohm, R122=DNI

EmuResetSrc Source R161, R63 Default: EmuResetSrc = FT2232H RTS. R161=0 Ohm, R163=DNI EmuResetSrc = FT2232H DTR. R161=DNI, R163=0 Ohm

FTDI FT2232H Clock R150, R165, Default: FTDI FT2232H Clock Source is G1.

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Source G2 R150=DNI, R165=0 Ohm, G2=Not Installed FTDI FT2232H Clock Source is G2. R150=0 Ohm, R165=DNI, G2=Installed

Table 14. Resistor Multiplexing Configurations

8 Stand-Alone Mode The DSPShield can function perfectly as a stand-alone development board for TI’s C5535 DSP. It can accept standard Arduino “shields” daughter cards as well as daughter cards that make use of the DSP Expansion Connector. When used in a stand-alone mode, the recommended configuration is described below:

• Power the DSPShield via the DSP-USB or XDS-UXB (shunt JPF) connectors. • Determine whether to source power to the Arduino Power Connector.

o Shunt JPB and JPC to source +5V and +3.3V on the Arduino Power connector.

o Leave JPB and JPC open if power sourcing is not required. • Determine the voltage of the Arduino connector Buffer ICs.

o Shunt JPE[1-2] for +5V logic. o Shunt JPE[2-3] for +3.3V logic. o Shunt JPD to source the Arudino IOREF pin.

• Change Resistor Multiplexing o If required, change default resistor settings. See section 7.

• Emulation Environment o TI Code Composer Studio via XDS100 embedded emulator. o Energia IDE via FTDI FT2232H secondary serial port.

9 DSPShield Application Photos

Figure 11. Arduino/DSPShield in Stacked Mode

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Figure 12. Arduino/DSPShield in Stacked Mode + Arduino Compatible AnalogShield

Figure 13. DSPShield in Stand-Alone Mode + Dual-Codec DSP Daughtercard

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10 Top/Bottom Assembly Drawings, Mechanicals, Schematics, and BOM

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02: C5535 IO INTERFACES

04: MUXES, MICRO SD-CARD

03: C5535 CORE AND IO POWER

06: DSP EXPANSION CONNECTOR

05: OLED, OSC, 3.3V GPIO, DIPSW

07: TLV320AIC3204 CODEC

08: VOLTAGE REGULATORS, SVS

09: ARDUINO INTERFACE 1

11: ARDUINO INTERFACE 3

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D_I

2S1_

FS_G

P7

(6)

X_M

MC

1_D

0_I2

S1_

DX

_GP

8(6

)X

_MM

C1_

D1_

I2S

1_R

X_G

P9

(6)

X_M

MC

1_D

2_G

P10

(6)

X_M

MC

1_D

3_G

P11

(6)

X_L

CD

_D2_

GP

12(6

)X

_LC

D_D

3_G

P13

(6)

X_L

CD

_D4_

GP

14(6

)X

_LC

D_D

5_G

P15

(6)

X_L

CD

_D6_

GP

16(6

)X

_LC

D_D

7_G

P17

(6)

LCD

_D13

_UA

RT_

CTS

_GP

28_I

2S3_

FS(4

)LC

D_D

14_U

AR

T_R

XD

_GP

28_I

2S3_

RX

(4)

LCD

_D15

_UA

RT_

TXD

_GP

31_I

2S3_

DX

(4)

LCD

_D12

_UA

RT_

RTS

_GP

28_I

2S3_

CLK

(4)

X_D

SP

_SP

I_C

LK(6

,9)

X_D

SP

_SP

I_C

S0

(6,9

)X

_DS

P_S

PI_

CS

1(6

)X

_DS

P_S

PI_

CS

2(6

)X

_DS

P_S

PI_

CS

3(6

)

X_D

SP

_SP

I_TX

(6,9

)

LCD

_D8_

I2S

2_C

LK_G

P18

_SP

I_C

LK(4

)LC

D_D

9_I2

S2_

FS_G

P19

_SP

I_C

S0

(4)

LCD

_D10

_I2S

2_R

X_G

P20

_SP

I_R

X(4

)LC

D_D

11_I

2S2_

DX

_GP

27_S

PI_

TX(4

)

DS

P_S

CL

(5,6

,7,9

)D

SP

_SD

A(5

,6,7

,9)

DS

P_G

PA

IN0

(10)

DS

P_G

PA

IN1

(10)

DS

P_G

PA

IN2

(10)

DS

P_G

PA

IN3

(10)

AR

D_S

PI_

RX

(9)

X_S

PI_

RX

(6)

GP

IO3V

3_03

(5)

DS

P_U

SB

_M12

XI

(5)

DS

P_C

LKIN

(5)

DS

P_I

NT1

N(5

,9)

DS

P_I

NT0

N(6

)S

VS

_RE

SE

TN(1

2,5,

6,7,

8,9)

DS

P_R

TC_C

LKO

UT

(6)

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

212

BA

C55

35 IO

INTE

RFA

CES

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

212

BA

C55

35 IO

INTE

RFA

CES

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

212

BA

C55

35 IO

INTE

RFA

CES

R24

220

OH

MR

2422

0 O

HM

R19

10.0

KR

1910

.0K

R16

8D

NI

R16

8D

NI

R13

4.70

KR

134.

70K

C6

10uF

C6

10uF

R3

10.0

KR

310

.0K

R23

10.0

KR

2310

.0K

C9

0.1u

FC

90.

1uF

R6

10.0

KR

610

.0K

R9

10.0

KR

910

.0K

R14

4.70

KR

144.

70K

R11

4.70

KR

114.

70K

R1

DN

IR

1D

NI

R2

0.0

OH

MR

20.

0 O

HM

R7

DN

IR

7D

NI

C10

1uF

C10

1uF

R5

DN

IR

5D

NI

C8

0.1u

FC

80.

1uF

R20

10.0

KR

2010

.0K

R12

4.70

KR

124.

70K

R17

10.0

KR

1710

.0K

R16

10.0

KR

1610

.0K

C11

0.1u

FC

110.

1uF

TP1

TP1 1

TMS

320C

5535

U1A

TMS

320C

5535

U1A

RS

V10

H1

RS

V11

E2

RS

V7

E1

RS

V8

F1R

SV

9G

1R

SV

12G

2

CLK

_SE

LD

1

CLK

INC

1C

LKO

UT

A2

EM

U0

L2

EM

U1

M1

GP

AIN

0A

8

GP

AIN

1B

8

GP

AIN

2A

9

GP

AIN

3A

10

I2C

_SC

LC

4

I2C

_SD

AA

4IN

T0C

2IN

T1B

1

LCD

_EN

_RD

B/S

PI_

CLK

L3

LCD

_CS

0_E

0/S

PI_

CS

0L1

LCD

_CS

_E1/

SP

I CS

1M

2

LCD

_RW

_WR

B/S

PI_

CS

2N

2

LCD

_RS

/SP

I_C

S3

M5

LCD

_D[0

]/SP

I_R

XN

4

LCD

_D[1

]/SP

I_TX

K1

LCD

_D[1

0]/I2

S2_

RX

/GP

[20]

/SP

I_R

XP

9

LCD

_D[1

1]/I2

S2_

DX

/GP

[27]

/SP

I_TX

P11

LCD

_D[1

2]/U

AR

T_R

TS/G

P[2

8]/I2

S3_

CLK

N12

LCD

_D[1

3]/U

AR

T_C

TS/G

P[2

9]/I2

S3_

FSP

12

LCD

_D[1

4]/U

AR

T_R

XD

/GP

[30]

/I2S

3_R

XP

13

LCD

_D[1

5]/U

AR

T_TX

D/G

P[3

1]/I2

S3_

DX

M11

LCD

_D[2

]/GP

[12]

J2

LCD

_D[3

]/GP

[13]

N5

LCD

_D[4

]/GP

[14]

P2

LCD

_D[5

]/GP

[15]

N7

LCD

_D[6

]/GP

[16]

P3

LCD

_D[7

]/GP

[17]

P8

LCD

_D[8

]/I2S

2_C

LK/G

P[1

8]/S

PI_

CLK

P5

LCD

_D[9

]/I2S

2_FS

/GP

[19]

/SP

I_C

S0

N10

RE

SE

TD

2

RTC

_CLK

OU

TA

3

RTC

XI

A7

RTC

XO

A6

MM

C0_

CLK

/I2S

0_C

LK/G

P[0

]M

8

MM

C0_

CM

D/I2

S0_

FS/G

P[1

]M

10

MM

C0_

D0/

I2S

0_D

X/G

P[2

]J1

MM

C0_

D1/

I2S

0_R

X/G

P[3

]P

6

MM

C0_

D2/

GP

[4]

N13

MM

C0_

D3/

GP

[5]

P7

MM

C1_

CLK

/I2S

1_C

LK/G

P[6

]M

14

MM

C1_

CM

D/I2

S1_

FS/G

P[7

]L1

1

MM

C1_

D0/

I2S

1_D

X/G

P[8

]M

13

MM

C1_

D1/

I2S

1_R

X/G

P[9

]P

10

MM

C1_

D2/

GP

[10]

L12

MM

C1_

D3/

GP

[11]

M12

TCK

N3

TDI

K2

TDO

N1

TMS

N6

TRS

TP

4

US

B_D

MJ1

4

US

B_D

PH

14

US

B_R

1G

14

US

B_V

BU

SL1

4

US

B_M

XI

E14

US

B_M

XO

D14

WA

KE

UP

A5

XF

J3

VS

S_R

TCC

5

CV

DD

_RTC

B4

CV

DD

_RTC

B5

US

B_V

DD

OS

CE

13

US

B_V

SS

OS

CD

12

US

B_V

SS

RE

FF1

2

DV

DD

_RTC

C3

R10

DN

IR

10D

NI

TP2

DN

ITP

2D

NI 1

R4

100K

R4

100K

R22

10.0

KR

2210

.0K

C5

33pF

C5

33pF

C4

0.1u

FC

40.

1uF

D1

6.2V

D1

6.2V

R18

10.0

KR

1810

.0K

C1

10uF

C1

10uF

U2

SN

74LV

C2G

157

U2

SN

74LV

C2G

157 A

1

B2

Y5

GN

D4

VC

C8

Y3

A/B

6

G7

R21

10.0

KR

2110

.0K

C7

33pF

C7

33pF

C3

1000

pFC

310

00pF

FB1

BLM

18A

G60

1SN

1DFB

1B

LM18

AG

601S

N1D

D2

LED

D2

LED

C2

0.1u

FC

20.

1uF

R8

DN

IR

8D

NI

R15

4.70

KR

154.

70K

Y1

32.7

68K

HZ

Y1

32.7

68K

HZ

14

23

P1

US

B-u

BP

1U

SB

-uB

VB

US

1

D-

2

D+

3

ID4

GN

D5

SH

IELD

16

SH

IELD

27

SH

IELD

38

SH

IELD

49

SH

IELD

510

SH

IELD

611

J1 DN

IJ1 D

NI

123456789

Page 46: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

1/8W

1/8W

DEFAULT CVDD IS FROM THE INTERNAL LDO.

DS

P_U

SB

_VD

DA

3P3

DS

P_U

SB

_VD

DP

LL

DS

P_U

SB

_VD

DA

1P3

DS

P_B

G_C

AP

DS

P_R

SV

6D

SP

_RS

V3

DS

P_R

SV

0

DS

P_U

SB

_LD

OO

DS

P_U

SB

_VD

D1P

3

DS

P_A

NA

_LD

OO

DS

P_L

DO

_EN

#

DS

P_L

DO

O

DS

P_C

VD

D

+3.3

V

+3.3

V

+3.3

V

+3.3

V

+3.3

V

+1.3

V

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

312

BA

C55

35 C

OR

E AN

D IO

PO

WER

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

312

BA

C55

35 C

OR

E AN

D IO

PO

WER

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

312

BA

C55

35 C

OR

E AN

D IO

PO

WER

C34

0.01

uFC

340.

01uF

C35

1uF

C35

1uF

C55

0.1u

FC

550.

1uF

R29

0.0

OH

MR

290.

0 O

HM

C14

1000

pFC

1410

00pF

C23

0.01

uFC

230.

01uF

C26

1uF

C26

1uF

FB5

BLM

18A

G60

1SN

1DFB

5B

LM18

AG

601S

N1D

C27

0.01

uFC

270.

01uF

C25

0.01

uFC

250.

01uF

C40

0.01

uFC

400.

01uF

C36

0.01

uFC

360.

01uF

C32

0.1u

FC

320.

1uF

C24

1uF

C24

1uF

C45

1uF

C45

1uF

C29

0.01

uFC

290.

01uF

FB3

BLM

18A

G60

1SN

1DFB

3B

LM18

AG

601S

N1D

C50

0.1u

FC

500.

1uF

C53

1uF

C53

1uF

C33

1000

pFC

3310

00pF

C21

0.1u

FC

210.

1uF

C48

0.1u

FC

480.

1uF

C31

10uF

C31

10uF

TP3

DN

ITP

3D

NI 1

C46

0.1u

FC

460.

1uF

C42

0.1u

FC

420.

1uF

C51

0.1u

FC

510.

1uF

C43

0.1u

FC

430.

1uF

C12

10uF

C12

10uF

C28

1uF

C28

1uF

C41

1uF

C41

1uF

TMS

320C

5535

U1B

TMS

320C

5535

U1B LD

OI

B10

AN

A_L

DO

OB

9

DS

P_L

DO

_EN

C13

RS

V6

B13

LDO

IB

14

DS

P_L

DO

OA

13

RS

V3

B12

RS

V0

A12

LDO

IC

14

US

B_L

DO

OD

13

VD

DA

_AN

AB

7

US

B_V

DD

1P3

E12

US

B_V

DD

1P3

F14

US

B_V

DD

1P3

K13

US

B_V

DD

PLL

G13

US

B_V

DD

A1P

3H

12

US

B_V

DD

A3P

3G

12

CV

DD

C11

CV

DD

D3

CV

DD

D11

CV

DD

F2

CV

DD

G3

CV

DD

H2

CV

DD

K11

CV

DD

M6

CV

DD

M9

CV

DD

N9

DV

DD

IOC

6

DV

DD

IOL4

DV

DD

IOM

3

DV

DD

IOM

4

DV

DD

ION

8

DV

DD

ION

11

DV

DD

ION

14

VS

SE

3

RS

V1

K12

RS

V2

L13

VS

SA

14

VS

SB

2

VS

SB

3

VS

SC

8

VS

SC

12

VS

SD

4

VS

SD

5

VS

SD

10

VS

SE

4

VS

SE

11

VS

SF3

VS

SH

3

VS

SJ1

3

VS

SK

3

VS

SK

4

VS

SL5

VS

SL1

0

VS

SM

7

VS

SP

1

VS

SP

14V

SS

A_A

NA

B6

US

B_V

SS

1P3

K14

US

B_V

SS

PLL

F13

VS

SA

_AN

AC

9

US

B_V

SS

A1P

3J1

2

US

B_V

SS

A3P

3H

13

BG

_CA

PC

10

VD

DA

_PLL

C7

VS

SA

_PLL

A1

RS

V4

A11

RS

V5

B11

C49

0.1u

FC

490.

1uF

C37

1uF

C37

1uF

C52

10uF

C52

10uF

C15

0.01

uFC

150.

01uF

C54

0.1u

FC

540.

1uF

R26

0.0

OH

MR

260.

0 O

HM

FB2

BLM

18A

G60

1SN

1DFB

2B

LM18

AG

601S

N1D

R31

10.0

KR

3110

.0K

C19

10uF

C19

10uF

FB4

BLM

18A

G60

1SN

1DFB

4B

LM18

AG

601S

N1D

C22

0.01

uFC

220.

01uF

C39

1uF

C39

1uF

C30

1uF

C30

1uF

C16

1uF

C16

1uF

C20

1uF

C20

1uF

C44

0.1u

FC

440.

1uF

R30

0.0

OH

MR

300.

0 O

HM

FB6

BLM

18A

G60

1SN

1DFB

6B

LM18

AG

601S

N1D

R27

0.0

OH

MR

270.

0 O

HM

R28

DN

IR

28D

NI

C18

0.01

uFC

180.

01uF

C13

0.1u

FC

130.

1uF

C17

0.1u

FC

170.

1uF

C38

0.01

uFC

380.

01uF

R25

DN

IR

25D

NI

C47

0.1u

FC

470.

1uF

Page 47: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

S=0, A=B1

S=1, A=B2

+3.3

V+3

.3V

+3.3

V+3

.3V

+3.3

V

+3.3

V

+3.3

V

GP

IO3V

3_05

(5)

X_L

CD

_D12

_UA

RT_

RTS

_GP

28_I

2S3_

CLK

(6)

X_L

CD

_D13

_UA

RT_

CTS

_GP

28_I

2S3_

FS(6

)X

_LC

D_D

14_U

AR

T_R

XD

_GP

28_I

2S3_

RX

(6)

X_L

CD

_D15

_UA

RT_

TXD

_GP

31_I

2S3_

DX

(6)

DS

P_R

XD

(10)

DS

P_T

XD

(10)

GP

IO3V

3_04

(5)

X_L

CD

_D9_

I2S

2_FS

_GP

19_S

PI_

CS

0(6

)X

_LC

D_D

8_I2

S2_

CLK

_GP

18_S

PI_

CLK

(6)

X_L

CD

_D11

_I2S

2_D

X_G

P27

_SP

I_TX

(6)

X_L

CD

_D10

_I2S

2_R

X_G

P20

_SP

I_R

X(6

)

LCD

_D13

_UA

RT_

CTS

_GP

28_I

2S3_

FS(2

)LC

D_D

14_U

AR

T_R

XD

_GP

28_I

2S3_

RX

(2)

LCD

_D15

_UA

RT_

TXD

_GP

31_I

2S3_

DX

(2)LC

D_D

12_U

AR

T_R

TS_G

P28

_I2S

3_C

LK(2

)

LCD

_D9_

I2S

2_FS

_GP

19_S

PI_

CS

0(2

) LCD

_D8_

I2S

2_C

LK_G

P18

_SP

I_C

LK(2

)LC

D_D

11_I

2S2_

DX

_GP

27_S

PI_

TX(2

)LC

D_D

10_I

2S2_

RX

_GP

20_S

PI_

RX

(2)

DS

P_R

TS(1

2)

AIC

_I2S

2_D

X(7

)A

IC_I

2S2_

CLK

(7)

AIC

_I2S

2_FS

(7)

DS

P_C

TS(1

2)

AIC

_I2S

2_R

X(7

)

MM

C0_

D3_

GP

5(2

)M

MC

0_D

2_G

P4

(2)

MM

C0_

D1_

I2S

0_R

X_G

P3

(2)M

MC

0_D

0_I2

S0_

DX

_GP

2(2

)M

MC

0_C

MD

_I2S

0_FS

_GP

1(2

)M

MC

0_C

LK_I

2S0_

CLK

_GP

0(2

)

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

412

BA

MU

XES,

MIC

RO

SD

-CAR

DS

ize

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

412

BA

MU

XES,

MIC

RO

SD

-CAR

DS

ize

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

412

BA

MU

XES,

MIC

RO

SD

-CAR

D

R36

10.0

KR

3610

.0K

C57

0.1u

FC

570.

1uF

R38

100K

R38

100K

P2

SD

_MIC

RO

P2

SD

_MIC

RO

DA

T18

DA

T07

VS

S6

CLK

5V

DD

4

CM

D3

DA

T32

DA

T21

DE

TEC

T9

SH

IELD

10

SH

IELD

11

SH

IELD

12

R33

10.0

KR

3310

.0K

C59

0.1u

FC

590.

1uF

U4

SN

74C

B3Q

3257

U4

SN

74C

B3Q

3257

1A4

2B1

51B

12

3B1

11

4B1

142A

7

3A9

4A12

1B2

3

2B2

6

3B2

10

4B2

13S

1

OE

15

VC

C16

GN

D8

PP

AD

17

U3

SN

74C

B3Q

3257

U3

SN

74C

B3Q

3257

1A4

2B1

51B

12

3B1

11

4B1

142A

7

3A9

4A12

1B2

3

2B2

6

3B2

10

4B2

13S

1

OE

15

VC

C16

GN

D8

PP

AD

17

C56

10uF

C56

10uF

R41

10.0

KR

4110

.0K

C58

0.1u

FC

580.

1uF

R42

DN

IR

42D

NI

R40

DN

IR

40D

NI

R39

10.0

KR

3910

.0K

R37

10.0

KR

3710

.0K

R35

10.0

KR

3510

.0K

R34

10.0

KR

3410

.0K

R32

DN

IR

32D

NI

Page 48: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

DUMMY SYMBOL TO GET OLED DISPLAY INTO BOM

ADDR=1: I2C

ADDRESS = 0x21

SN74LVC1G125

Insert into oscillator outpput

path if more drive is required.

P3 NUMBERING MATCHES OLED

DATA SHEET. IT IS PIN

REVERSED FROM FCI CONNECTOR

DATA SHEET.

GPIO EXPANDER 2

OLE

D_C

2P

OLE

D_C

2N

OLE

D_I

RE

FO

LED

_VC

OM

H

OLE

D_C

1N

OLE

D_C

1P

OLE

D_7

P3V

OLE

D_V

BR

EF

GP

IO3V

3_A

DD

R

GP

IO3V

3_00

GP

IO3V

3_01

DIP

SW

2D

IPS

W3

OLE

D_V

BA

T

DIP

SW

0D

IPS

W1

DIP

SW

2D

IPS

W3

DIP

SW

0D

IPS

W1

OS

C12

MH

Z_B

UFI

N

OS

C12

MH

Z_S

RC

OS

C12

MH

Z_B

UFO

UT

OS

C12

MH

Z

LED

0

LED

1

LED

2

GP

IO3V

3_00

GP

IO3V

3_01

GP

IO3V

3_06

GP

IO3V

3_06

+3.3

V

+3.3

V+3

.3V

+3.3

V

+3.3

V

+3.3

V

+3.3

V

+3.3

V

+3.3

V

DS

P_S

CL

(2,5

,6,7

,9)

DS

P_S

DA

(2,5

,6,7

,9)

SV

S_R

ES

ETN

(12,

2,5,

6,7,

8,9)

SV

S_R

ES

ETN

(12,

2,5,

6,7,

8,9)

DS

P_S

DA

(2,5

,6,7

,9)

DS

P_S

CL

(2,5

,6,7

,9)D

SP

_IN

T1N

(2,9

)

X_G

PIO

3V3_

10(6

)X

_GP

IO3V

3_11

(6)

X_G

PIO

3V3_

12(6

)X

_GP

IO3V

3_13

(6)

GP

IO3V

3_05

(4)

GP

IO3V

3_04

(4)

GP

IO3V

3_07

(9)

GP

IO3V

3_03

(2)

DS

P_C

LKIN

(2)

DS

P_U

SB

_M12

XI

(2)

TRG

T_12

MH

Z(1

2)

MC

LK_1

2MH

Z(7

)

GP

IO3V

3_02

(9)

DS

P_E

XP

_12M

HZ

(6)

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

512

BA

OLE

D, O

SC, 3

.3V

GPI

O, D

IPSW

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

512

BA

OLE

D, O

SC, 3

.3V

GPI

O, D

IPSW

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

512

BA

OLE

D, O

SC, 3

.3V

GPI

O, D

IPSW

C70

4.7u

FC

704.

7uF

R58

10.0

KR

5810

.0K

D5

LED

D5

LED R

5510

.0K

R55

10.0

K

C71

0.01

uFC

710.

01uF

R49

DN

IR

49D

NI

R56

10.0

KR

5610

.0K

C64

0.02

2uF

C64

0.02

2uF

R59

0.0

OH

MR

590.

0 O

HM

C65

0.1u

FC

650.

1uF

R48

220

OH

MR

4822

0 O

HM

R51

100

OH

MR

5110

0 O

HM

R50

0.0

OH

MR

500.

0 O

HM

D3

LED

D3

LED

R45

820K

R45

820K

C60

1uF

25V

C60

1uF

25V

R52

0.0

OH

MR

520.

0 O

HM

R60

DN

IR

60D

NI

C72

0.1u

FC

720.

1uF

R61

0.0

OH

MR

610.

0 O

HM

R44

10.0

KR

4410

.0K

R53

0.0

OH

MR

530.

0 O

HM

R47

220

OH

MR

4722

0 O

HM

C62

0.1u

FC

620.

1uF

R43

0.0

OH

MR

430.

0 O

HM

D4

LED

D4

LED

C67

0.1u

FC

670.

1uF

C61

1uF

25V

C61

1uF

25V

U5

TCA

6416

AR

TWU

5TC

A64

16A

RTW

GN

D9

VC

CP

21

AD

DR

18

P00

1P

012

P02

3P

034

P04

5P

056

P06

7P

078

P10

10P

1111

P12

12P

1313

P14

14P

1515

P16

16P

1717

SC

L19

SD

A20

RE

SE

T24

INT

22

VC

CI

23

PP

AD

25

G1

AS

FL1-

12M

HZ

G1

AS

FL1-

12M

HZ

VC

C4

E1

OU

T3

GN

D2

C68

0.1u

FC

680.

1uF

C69

4.7u

FC

694.

7uF

C66

1uF

C66

1uF

R54

DN

IR

54D

NI

R57

10.0

KR

5710

.0K

BUF

U6

DN

IBUF

U6

DN

I

A2

Y4

VC

C5

GN

D3

OE

1

DIS

P1

OS

D96

16P

0992

-10

DIS

P1

OS

D96

16P

0992

-10

TP1

SW

1S

W D

IP-4

/SM

SW

1S

W D

IP-4

/SM

1 2 3 4

8 7 6 5

C63

1uF

C63

1uF

R46

220

OH

MR

4622

0 O

HM

P3

OLE

D_C

ON

N_R

EV

P3

OLE

D_C

ON

N_R

EV

C2P

1

C2N

2

C1P

3

C1N

4

VB

AT

5

VB

RE

F6

VS

S7

VD

D8

RE

SN

9

SC

L10

SD

A11

IRE

F12

VC

OM

H13

VC

C14

Page 49: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

FEMALE RECEPTACLE WITH

CORRESPONDING MIRROR PIN

NUMBERING.

X_R

TCC

LK_G

P16

X_1

2MH

Z_G

P17

X_N

MIN

X_S

CL

X_S

DA

X_R

ES

ETN

+3.3

V+5

V

X_L

CD

_D4_

GP

14(2

)X

_LC

D_D

5_G

P15

(2)

X_L

CD

_D9_

I2S

2_FS

_GP

19_S

PI_

CS

0(4

)X

_LC

D_D

8_I2

S2_

CLK

_GP

18_S

PI_

CLK

(4)

X_L

CD

_D11

_I2S

2_D

X_G

P27

_SP

I_TX

(4)

X_L

CD

_D10

_I2S

2_R

X_G

P20

_SP

I_R

X(4

)

DS

P_S

DA

(2,5

,7,9

)

DS

P_S

CL

(2,5

,7,9

)

SV

S_R

ES

ETN

(12,

2,5,

7,8,

9)

DS

P_I

NT0

N(2

)

X_G

PIO

3V3_

10(5

)X

_GP

IO3V

3_11

(5)

X_L

CD

_D12

_UA

RT_

RTS

_GP

28_I

2S3_

CLK

(4)

X_L

CD

_D13

_UA

RT_

CTS

_GP

28_I

2S3_

FS(4

)X

_LC

D_D

14_U

AR

T_R

XD

_GP

28_I

2S3_

RX

(4)

X_L

CD

_D15

_UA

RT_

TXD

_GP

31_I

2S3_

DX

(4)

X_D

SP

_SP

I_TX

(2,9

)

X_D

SP

_SP

I_C

S3

(2)

X_D

SP

_SP

I_C

S2

(2)

X_D

SP

_SP

I_C

S1

(2)

X_D

SP

_SP

I_C

S0

(2,9

)X

_DS

P_S

PI_

CLK

(2,9

)

X_S

PI_

RX

(2)

X_G

PIO

3V3_

13(5

)

X_G

PIO

3V3_

12(5

)

DS

P_R

TC_C

LKO

UT

(2)

DS

P_E

XP

_12M

HZ

(5)

X_L

CD

_D2_

GP

12(2

)X

_LC

D_D

3_G

P13

(2)

X_L

CD

_D7_

GP

17(2

)

X_L

CD

_D6_

GP

16(2

)

X_M

MC

1_C

LK_I

2S1_

CLK

_GP

6(2

)X

_MM

C1_

CM

D_I

2S1_

FS_G

P7

(2)

X_M

MC

1_D

0_I2

S1_

DX

_GP

8(2

)X

_MM

C1_

D1_

I2S

1_R

X_G

P9

(2)

X_M

MC

1_D

2_G

P10

(2)

X_M

MC

1_D

3_G

P11

(2)

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

612

BA

DSP

EXP

ANSI

ON

CO

NN

ECTO

RS

ize

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

612

BA

DSP

EXP

ANSI

ON

CO

NN

ECTO

RS

ize

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

612

BA

DSP

EXP

ANSI

ON

CO

NN

ECTO

R

R63

0.0

OH

MR

630.

0 O

HM

R64

0.0

OH

MR

640.

0 O

HM

R66

0.0

OH

MR

660.

0 O

HM

R62

0.0

OH

MR

620.

0 O

HM

R68

0.0

OH

MR

680.

0 O

HM

P4

HD

R2X

20P

4H

DR

2X20

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

R65

0.0

OH

MR

650.

0 O

HM

R67

DN

IR

67D

NI

R69

DN

IR

69D

NI

Page 50: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

AIC

0_G

PIO

AIC

0_A

NA

MIC

_R

AIC

0_S

PI_

SE

L

AIC

0_IN

2RA

IC0_

IN2L

AIC

0_A

NA

MIC

_L

AIC

0_M

ICB

IAS

AIC

0_H

PL

AIC

0_H

PR

AIC

0_R

EF

AIC

0_LD

O_S

EL

AIC

0_A

VD

D

AIC

0_H

EA

D_R

AIC

0_H

EA

D_L

AIC

0_D

VD

DA

IC0_

LDO

IN

AIC

0_M

FP3

AG

ND

0

AG

ND

0

AG

ND

0A

GN

D0A

GN

D0

AG

ND

0A

GN

D0

AG

ND

0A

GN

D0

AG

ND

0

AG

ND

0A

GN

D0

AG

ND

0 AG

ND

0A

GN

D0

AG

ND

0

+3.3

VA

+3.3

VA

+3.3

VA

+3.3

V+3

.3V

A

+3.3

VA

DS

P_S

DA

(2,5

,6,9

)D

SP

_SC

L(2

,5,6

,9)

SV

S_R

ES

ETN

(12,

2,5,

6,8,

9)M

CLK

_12M

HZ

(5)

AIC

_I2S

2_D

X(4

)A

IC_I

2S2_

RX

(4)

AIC

_I2S

2_FS

(4)

AIC

_I2S

2_C

LK(4

)

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

712

BA

TLV3

20AI

C32

04 C

OD

ECS

ize

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

712

BA

TLV3

20AI

C32

04 C

OD

ECS

ize

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

712

BA

TLV3

20AI

C32

04 C

OD

EC

R17

04.

70K

R17

04.

70K

C84

10uF

C84

10uF

C75

DN

IC

75D

NI

C79

0.1u

FC

790.

1uF

C87

0.1u

FC

870.

1uF

C80

10uF

C80

10uF

R78

10.0

OH

MR

7810

.0 O

HM

C89

0.1u

FC

890.

1uF

R74

DN

IR

74D

NI

R71

2.20

KR

712.

20K

D6

MB

R05

20LT

1GD

6M

BR

0520

LT1G

C78

47uF

C78

47uF

C81

10uF

C81

10uF

C85

10uF

C85

10uF

TP5

DN

ITP

5D

NI 1

FB8

MP

Z160

8S22

1AFB

8M

PZ1

608S

221A

TP7

TES

T P

OIN

TTP

7TE

ST

PO

INT

1

C88

10uF

C88

10uF

R72

DN

IR

72D

NI

C83

0.1u

FC

830.

1uF

C82

0.1u

FC

820.

1uF

J3 TRS

_JA

CK

4_G

RE

EN

J3 TRS

_JA

CK

4_G

RE

EN

SLE

EV

E1

TIP

2

RIN

G3

NP

/TIP

SW

4

R70

2.20

KR

702.

20K

C90

0.1u

FC

900.

1uF

TP6

DN

ITP

6D

NI 1

C86

0.1u

FC

860.

1uF

R76

4.70

KR

764.

70K

C74

0.47

uFC

740.

47uF

R17

14.

70K

R17

14.

70K

C77

47uF

C77

47uF

R75

DN

IR

75D

NI

C76

DN

IC

76D

NI

U7

AIC

3204

U7

AIC

3204

MIC

BIA

S19

IN1_

L13

IN1_

R14

IN2_

L15

IN2_

R16

IN3_

L20

IN3_

R21

HP

L25

HP

R27

LOL

22

LOR

23

RE

F18

LDO

_SE

L30

GP

IO/M

FP5

32

RE

SE

T31

BC

LK2

WC

LK3

DIN

/MFP

14

DO

UT/

MFP

25

MC

LK1

SC

L/S

S9

SD

A/M

OS

I10

SP

I_S

EL

12

MIS

O/M

FP4

11S

CLK

/MFP

38

IOV

DD

6A

VD

D24

LDO

IN26

DV

DD

29

IOV

SS

7

DV

SS

28

AV

SS

17

PP

AD

33

FB7

MP

Z160

8S22

1AFB

7M

PZ1

608S

221A

C73

0.47

uFC

730.

47uF

J2 TRS

_JA

CK

4_P

INK

J2 TRS

_JA

CK

4_P

INK

SLE

EV

E1

TIP

2

RIN

G3

NP

/TIP

SW

4TP

4D

NI

TP4

DN

I 1

R73

4.70

KR

734.

70K

R77

DN

IR

77D

NI

Page 51: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

JPA

DSPShield POWERS ARDUINO INTF

JPA=ON, JPB=ON, JPC=ON

ARDUINO INTF POWERS DSPShield

JPA=OFF, JPB=ON, JPC=OFF

JPB

JPC

ARDUINO INTF LOGIC LEVEL SELECT.

JPE

DSPShield POWER ISOLATED FROM ARDUINO INTF

JPA=ON, JPB=OFF, JPC=OFF

JPD

+3.3V DC-DC REGULATOR

+1.3V LDO

SUPERVISOSRY CHIP

JPD=ON, JPE = OFF: SOURCE EXTERNAL, ARD_IOREF POWERS ARD_INTF_VCC.

JPD=OFF JPE = ON: SOURCE INTERNAL, JPE[1-2] = +5V, JPE[2-3] = +3.3V.

JPD=ON JPE = ON: DSPShield POWERS ARD_IOREF WITH VOLTAGE BASED ON JPE.

US

B_5

VFU

SE

_5V

VR

1P3_

FB

VR

1P3_

BY

P

VR

3P3_

SW

VR

3P3_

FB

VR

3P3_

EN

PB

RS

TN

SV

S_R

STN

_OU

T

VR

1P3_

FAU

LT

SE

NS

E1P

3_1VAR

D_5

V+3

.3V

+5V

AR

D_3

V3

+3.3

V

+3.3

V

+5V

+3.3

V+1

.3V

+3.3

V

+3.3

V

+3.3

V

+5V

+3.3

V

+1.3

V

+1.3

V

+3.3

V

AR

D_I

OR

EF

AR

D_I

NTF

_VC

C

DS

P_U

SB

VD

D(2

)

EM

U_U

SB

VD

D(1

2)

SV

S_R

ES

ETN

(12,

2,5,

6,7,

9)

AR

D_D

SP

_RS

TSN

S(1

1)

EM

U_R

STN

_ON

LY(1

1)

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

812

BA

VOLT

AGE

REG

ULA

TOR

S, S

VSS

ize

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

812

BA

VOLT

AGE

REG

ULA

TOR

S, S

VSS

ize

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

812

BA

VOLT

AGE

REG

ULA

TOR

S, S

VS

C94

2.2u

FC

942.

2uF

R81

4.02

KR

814.

02K

C95

33nF

C95

33nF

C97

0.01

uFC

970.

01uF

TP9

TES

T P

OIN

TTP

9TE

ST

PO

INT

1

R85

100K

R85

100K

JP4

HD

R2

JP4

HD

R2

12

C92

2.2u

FC

922.

2uF

C96

0.01

uFC

960.

01uF

C93

22uF

C93

22uF

R84

100K

R84

100K

C13

30.

1uF

C13

30.

1uF

SW

2S

W2

421

3

D9

CR

S08

D9

CR

S08

300mA

VR

2LP

3982

300mA

VR

2LP

3982

IN2

OU

T1

GN

D3

SE

T5

SH

DN

7

CC

6

OU

T4

FAU

LT8

L1 2.2u

HL1 2.

2uH

OPEN DRAIN

U8

TPS

3865

96L3

3

OPEN DRAIN

U8

TPS

3865

96L3

3

SE

NS

E1(

3.3)

4R

ES

ET

6

VC

C8

MR

7G

ND

5

SE

NS

E2

3

SE

NS

E3

2

SE

NS

E4

1

JP1

HD

R2

JP1

HD

R2

12

D8

MB

R05

20LT

1GD

8M

BR

0520

LT1G

1A

VR

1LM

R10

510X

DB

V

1A

VR

1LM

R10

510X

DB

V

VIN

5S

W1

GN

D2

EN

4

FB3

R79

100K

R79

100K

C99

0.01

uFC

990.

01uF

TP11

TES

T P

OIN

TTP

11TE

ST

PO

INT

1

R80

45.3

KR

8045

.3K

R88

15.0

KR

8815

.0K

TP8

TES

T P

OIN

TTP

8TE

ST

PO

INT

1

TP10

TES

T P

OIN

TTP

10TE

ST

PO

INT

1

R86

51.0

KR

8651

.0K

F1 FUS

E-M

F-M

SM

F050

-2F1 FU

SE

-MF-

MS

MF0

50-2

12

R83

10.0

KR

8310

.0K

JP5

HD

R2

JP5

HD

R2

12

C98

0.1u

FC

980.

1uF

C91

22uF

C91

22uF

R82

100K

R82

100K

D7

MB

R05

20LT

1GD

7M

BR

0520

LT1G

JP2

HD

R2

JP2

HD

R2

12

R87

0.0

OH

MR

870.

0 O

HM

R89

10.0

KR

8910

.0K

JP3

HD

R3

JP3

HD

R3

1

2

3

Page 52: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

ARD_TX

ARD_RX

ARD_AREF_NC

ADDR=0: I2C

ADDRESS = 0x20

ICSP

CO

NN

EC

TO

R

I/Os CAN BE 5V OR 3V

C5535 SPI IS A MASTER

ONLY PERIPHERAL

GPIO EXPANDER 1

AR

D_I

O2

AR

D_I

O3

AR

D_I

O4

AR

D_I

O5

AR

D_I

O6

AR

D_I

O7

AR

D_I

O8

AR

D_I

O9

AR

D_S

PI_

SS

AR

D_S

PI_

MO

SI

AR

D_S

PI_

MIS

OA

RD

_SP

I_C

LK

AR

D_I

2C_S

DA

AR

D_I

2C_S

CL

DS

P_S

CL

DS

P_S

DA

AR

D_I

O1

AR

D_I

O0

ICS

P_S

PI_

MO

SI

ICS

P_S

PI_

MIS

OA

RD

_SP

I_M

ISO

AR

D_S

PI_

CLK

ICS

P_S

PI_

CLK

AR

D_S

PI_

MO

SI

ICS

P_A

RD

_RE

SE

TN

PC

A_N

C

+3.3

V

AR

D_I

NTF

_VC

C

AR

D_I

NTF

_VC

C

AR

D_I

NTF

_VC

C+3

.3V

+3.3

V

AR

D_5

V

AR

D_I

NTF

_VC

C

DS

P_I

NT1

N(2

,5)

SV

S_R

ES

ETN

(12,

2,5,

6,7,

8)

DS

P_S

CL

(2,5

,6,7

)D

SP

_SD

A(2

,5,6

,7)

AR

D_T

X(1

0)

AR

D_R

X(1

0)

GP

IO5V

_16

(11)

GP

IO5V

_15

(10)

GP

IO5V

_14

(10)

GP

IO5V

_13

(10)

GP

IO5V

_17

(11)

GP

IO3V

3_07

(5)

AR

D_S

DA

(10)

AR

D_S

CL

(10)

AR

D_R

ES

ETN

(10,

11)X_D

SP

_SP

I_C

LK(2

,6)

X_D

SP

_SP

I_C

S0

(2,6

)X

_DS

P_S

PI_

TX(2

,6)

AR

D_S

PI_

RX

(2)

GP

IO5V

_12

(10)

GP

IO3V

3_02

(5)

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

912

BA

ARD

UIN

O IN

TER

FAC

E 1

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

912

BA

ARD

UIN

O IN

TER

FAC

E 1

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

912

BA

ARD

UIN

O IN

TER

FAC

E 1

P10

HD

R2X

3-FE

MP

10H

DR

2X3-

FEM

12

34

56

R96

0.0

OH

MR

960.

0 O

HM

R90

10.0

KR

9010

.0K

C10

00.

1uF

C10

00.

1uF

R99

0.0

OH

MR

990.

0 O

HM

C10

40.

1uF

C10

40.

1uF

U9

PC

A95

15B

U9

PC

A95

15B

GN

D4

SC

L02

SD

A0

3S

CL1

7

SD

A1

6

VC

C8

EN

5

NC

1

R95

10.0

KR

9510

.0K

R97

0.0

OH

MR

970.

0 O

HM

U10

TXB

0104

RG

YU

10TX

B01

04R

GY

VC

CA

1

GN

D7

A1

2

A2

3B

113

B2

12

B3

11

B4

10

VC

CB

14

OE

8A

45

A3

4

NC

6

NC

9

PP

AD

15C

101

0.1u

FC

101

0.1u

F

R93

DN

IR

93D

NI

R98

0.0

OH

MR

980.

0 O

HM

R94

DN

IR

94D

NI

C10

20.

1uF

C10

20.

1uF

R10

00.

0 O

HM

R10

00.

0 O

HM

P6

HD

R1X

8P

6H

DR

1X8 12345678

R10

10.

0 O

HM

R10

10.

0 O

HM

R92

10.0

KR

9210

.0K

U11

TCA

6416

AR

TWU

11TC

A64

16A

RTW GN

D9

VC

CP

21

AD

DR

18

P00

1P

012

P02

3P

034

P04

5P

056

P06

7P

078

P10

10P

1111

P12

12P

1313

P14

14P

1515

P16

16P

1717

SC

L19

SD

A20

RE

SE

T24

INT

22

VC

CI

23

PP

AD

25

C10

30.

1uF

C10

30.

1uF

R16

7D

NI

R16

7D

NI

R91

10.0

KR

9110

.0K

P5

HD

R1X

10P

5H

DR

1X10 12345678910

Page 53: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

AHCT DEVICES HAVE

V(IH)= 2V

ARDUINO/DSP/FTDI UART MULTIPLEXING

LVC DEVICES HAVE 5V

TOLERANT INPUTS.

GPIO5V_12, GPIO5V_13, GPIO5V_14,

GPIO5V_15 POWER UP TRI-STATED.

WHEN THE JTAG USB IS NOT CONNECTED,

TRGT_TXD POWERS UP TRI-STATED.

TXB0102 IS AN

ACTIVE PULLUP

AR

D_A

D3

AR

D_A

D2

AR

D_A

D1

AR

D_A

D0

DS

P_T

XD

_5V

DS

P_G

PA

IN0

DS

P_G

PA

IN1

DS

P_G

PA

IN2

DS

P_G

PA

IN3

TXB

0102

_PU

1

TXB

0102

_PU

3TX

B01

02_P

U2

DS

P_R

XD

_SR

C1

DS

P_R

XD

_SR

C2

AR

D_3

V3

AR

D_5

V

AR

D_I

NTF

_VC

C

+3.3

V

+5V

AR

D_I

NTF

_VC

C

+1.3

V

+1.3

V

+1.3

V

+1.3

V

AR

D_I

NTF

_VC

C

+3.3

V

+3.3

V+3

.3V

+3.3

VA

RD

_IN

TF_V

CC

+3.3

V

AR

D_I

NTF

_VC

C

AR

D_I

OR

EF

+3.3

V

+3.3

V

DS

P_G

PA

IN0

(2)

DS

P_G

PA

IN1

(2)

DS

P_G

PA

IN2

(2)

DS

P_G

PA

IN3

(2)

AR

D_R

ES

ETN

(11,

9)

GP

IO5V

_14

(9)

GP

IO5V

_13

(9)

GP

IO5V

_15

(9)

DS

P_T

XD

(4)

AR

D_T

X(9

)A

RD

_RX

(9)

AR

D_S

CL

(9)

AR

D_S

DA

(9)

TRG

T_R

XD

(12)

TRG

T_TX

D(1

2)

DS

P_R

XD

(4)

GP

IO5V

_12

(9)

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

1012

BA

ARD

UIN

O IN

TER

FAC

E 2

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

1012

BA

ARD

UIN

O IN

TER

FAC

E 2

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

1012

BA

ARD

UIN

O IN

TER

FAC

E 2

R10

510

0KR

105

100K

A B C VC

CG

NDY

U15

SN

74LV

C1G

3208

A B C VC

CG

NDY

U15

SN

74LV

C1G

3208

43

2

1 56

U13

SN

74A

HC

T1G

125

U13

SN

74A

HC

T1G

125

A2

Y4

VC

C5

GN

D3

OE

1

R11

71.

50K

R11

71.

50K

D11

SD

M40

E20

LSD

11S

DM

40E

20LS

123

R11

451

.0K

R11

451

.0K

C10

50.

1uF

C10

50.

1uF

U12

SN

74LV

C2G

241

U12

SN

74LV

C2G

241

1A2

1Y6

VC

C8

GN

D4

1OE

12A

52Y

3

2OE

7

R11

010

.0K

R11

010

.0K

C11

00.

1uF

C11

00.

1uF

C10

60.

1uF

C10

60.

1uF

R10

80.

0 O

HM

R10

80.

0 O

HM

C10

90.

1uF

C10

90.

1uF

R10

94.

70K

R10

94.

70K

C10

80.

1uF

C10

80.

1uF

R10

210

0KR

102

100K R

111

10.0

KR

111

10.0

K

R11

810

.0K

R11

810

.0K

U14

TXB

0102

U14

TXB

0102

VC

CA

3

GN

D2

A1

5B

18

VC

CB

7

OE

6A

24

B2

1

R11

60.

0 O

HM

R11

60.

0 O

HM

U16

SN

74LV

C2G

157

U16

SN

74LV

C2G

157

A1

B2

Y5

GN

D4

VC

C8

Y3

A/B

6

G7

R11

351

.0K

R11

351

.0K

R10

6D

NI

R10

6D

NI

R16

9D

NI

R16

9D

NI

C10

70.

1uF

C10

70.

1uF

D12

SD

M40

E20

LSD

12S

DM

40E

20LS

123

D10

SD

M40

E20

LSD

10S

DM

40E

20LS

123

R11

24.

70K

R11

24.

70K

P8

HD

R1X

6P

8H

DR

1X6 123456

P7

HD

R1X

8P

7H

DR

1X8 1 2 3 4 5 6 7 8

R10

7D

NI

R10

7D

NI

R11

510

.0K

R11

510

.0KR

103

100K

R10

310

0K

D13

SD

M40

E20

LSD

13S

DM

40E

20LS

123

R10

410

0KR

104

100K

Page 54: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

ARDUINO/DSP/FTDI RESET

WHEN THE JTAG USB IS NOT CONNECTED,

TRGT_RSTN POWERS UP TRI-STATED

GPIO5V_16 POWERS UP TRI-STATED

GPIO5V_17 POWERS UP TRI-STATED

AR

D_D

SP

_RE

SE

T_P

OIN

T2A

RD

_DS

P_R

ES

ET_

PO

INT3

AR

D_D

SP

_RE

SE

T_P

OIN

T1

AR

D_R

ES

ETN

_DS

P_S

RC

AR

D_R

ES

ETN

_FTD

I_S

RC

+3.3

V

+3.3

V

AR

D_I

NTF

_VC

C

+3.3

V

+3.3

V

+3.3

V

AR

D_D

SP

_RS

TSN

S(8

)G

PIO

5V_1

7(9

)

GP

IO5V

_16

(9)TR

GT_

RS

TN(1

2)

AR

D_R

ES

ETN

(10,

9)

EM

U_R

STN

_ON

LY(8

)

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

1112

BA

ARD

UIN

O IN

TER

FAC

E 3

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

1112

BA

ARD

UIN

O IN

TER

FAC

E 3

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

1112

BA

ARD

UIN

O IN

TER

FAC

E 3

R11

9D

NI

R11

9D

NI

R12

11.

50K

R12

11.

50K

R12

50.

0 O

HM

R12

50.

0 O

HM

R12

20.

0 O

HM

R12

20.

0 O

HM

R12

910

.0K

R12

910

.0K

C11

20.

1uF

C11

20.

1uF

C11

30.

1uF

C11

30.

1uF

C11

10.

1uF

C11

10.

1uF

R12

60.

0 O

HM

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60.

0 O

HM

R12

751

.0K

R12

751

.0K

R12

010

.0K

R12

010

.0K

OPEN-DRAIN

BUFFER

U17

SN

74LV

C1G

07OPEN-DRAIN

BUFFER

U17

SN

74LV

C1G

07

A2

Y4

VC

C5

GN

D3

NC

1

R12

30.

0 O

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30.

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410

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410

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80.

0 O

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80.

0 O

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OPEN-DRAIN

INVERTER

U18

SN

74LV

C1G

06OPEN-DRAIN

INVERTER

U18

SN

74LV

C1G

06

A2

Y4

VC

C5

GN

D3

NC

1

BUF

U19

SN

74LV

C1G

125

BUF

U19

SN

74LV

C1G

125

A2

Y4

VC

C5

GN

D3

OE

1

Page 55: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

TXD

RXD

RTS

DTR

CTS

DSR

DSR_IN

RTS/CTS FLOW CONTROL

EMU_EN

EMU0

EMU1

JPF

FTD

I_R

TS

FTD

I_R

XD

FTD

I_TX

D

FTD

I_U

SB

_VD

D

FTD

I_E

EC

LKFT

DI_

EE

CS

FTD

I_E

ED

ATA

EE

PR

OM

_DO

EM

U_T

RS

TN

FTD

I_V

PLL

FTD

I_TX

DFT

DI_

RX

DFT

DI_

RTS

FTD

I_D

S

FTD

I_R

EF

FTD

I_R

ST_

CLK

FTD

I_P

WR

_RS

T

EM

U_R

ES

ETN

FTD

I_S

RS

T_N

_OU

T

FTD

I_TC

KFT

DI_

TDI

FTD

I_TD

O

FTD

I_TR

STN

EM

U_T

CK

EM

U_T

DI

EM

U_T

DO

EM

U_T

MS

FTD

I_TM

S

FTD

I_TC

K_R

ET

FTD

I_1P

8V

FTD

I_O

SC

_12M

HZ

FTD

I_P

WR

EN

#

FTD

I_R

STN

FTD

I_O

SC

I

FTD

I_V

PH

Y

FTD

I_S

RS

T_N

_IN

FTD

I_P

WR

_DE

T

FTD

I_D

MFT

DI_

DP

FTD

I_O

SC

IE

MU

_OS

C

FTD

I_C

TS

FTD

I_C

TS

FTD

I_R

TS

FTD

I_D

TR

FTD

I_D

TR

TRG

T_R

STN

_SR

C

EM

U_R

ES

ETN

FTD

I_LE

D

EM

U_T

MS

EM

U_T

DI

EM

U_T

DO

EM

U_T

CK

EM

U_T

RS

TN

EM

U_+

3.3V

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_+

3.3V

EM

U_+

3.3V

EM

U_+

3.3V

EM

U_+

3.3V

EM

U_+

3.3VE

MU

_+3.

3V

EM

U_+

3.3V

EM

U_+

3.3V

EM

U_+

3.3V

EM

U_+

5V

EM

U_G

ND

EM

U_G

ND

EM

U_+

3.3V

EM

U_+

5V

+3.3

V

EM

U_+

3.3V

EM

U_+

3.3V

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_G

ND

EM

U_U

SB

VD

D(8

)

SV

S_R

ES

ETN

(2,5

,6,7

,8,9

)

DS

P_T

RS

TN(2

)

DS

P_T

MS

(2)

DS

P_T

DO

(2)

DS

P_T

DI

(2)

DS

P_T

CK

(2)

TRG

T_TX

D(1

0)

TRG

T_R

XD

(10)

DS

P_C

TS(4

)

TRG

T_12

MH

Z(5

)

TRG

T_R

STN

(11)

DS

P_R

TS(4

)

Siz

e

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

1212

BA

XDS1

00-V

2 IN

TER

FAC

ES

ize

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

1212

BA

XDS1

00-V

2 IN

TER

FAC

ES

ize

Sca

le

CA

GE

Cod

eD

WG

NO

Rev

She

etof

Title

TEXA

SIN

STRU

MEN

TSD

ALL

AS

, TE

XA

SC

5535

DSP

SHIE

LDFr

iday

, Sep

tem

ber 0

6, 2

013

1212

BA

XDS1

00-V

2 IN

TER

FAC

E

R13

91.

50K

R13

91.

50K

R15

90.

0 O

HM

R15

90.

0 O

HM

C12

60.

1uF

C12

60.

1uF

R15

40.

0 O

HM

R15

40.

0 O

HM

C13

14.

7uF

C13

14.

7uF

R14

647

.0 O

HM

R14

647

.0 O

HM

R15

30.

0 O

HM

R15

30.

0 O

HM

C12

80.

1uF

C12

80.

1uF

FB9

MP

Z160

8S22

1AFB

9M

PZ1

608S

221A

R16

3D

NI

R16

3D

NI

C11

70.

1uF

C11

70.

1uF

U22

FT22

32H

U22

FT22

32H

AD

BU

S0

16

AD

BU

S1

17

AD

BU

S2

18

AD

BU

S3

19

AD

BU

S4

21

AD

BU

S5

22

AD

BU

S6

23

AD

BU

S7

24

AC

BU

S0

26

AC

BU

S1

27

AC

BU

S2

28

AC

BU

S3

29

AC

BU

S4

30

AC

BU

S5

32

AC

BU

S6

33

AC

BU

S7

34

BD

BU

S0

38

BD

BU

S1

39

BD

BU

S2

40

BD

BU

S3

41

BD

BU

S4

43

BD

BU

S5

44

BD

BU

S6

45

BD

BU

S7

46

BC

BU

S0

48

BC

BU

S1

52

BC

BU

S2

53

BC

BU

S3

54

BC

BU

S4

55

BC

BU

S5

57

BC

BU

S6

58

BC

BU

S7

59

PW

RE

N#

60

SU

SP

EN

D#

36

VR

EG

IN50

VR

EG

OU

T49

DM

7

DP

8

RE

F6

RE

SE

T#14

EE

CS

63

EE

CLK

62

EE

DA

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OS

CI

2

OS

CO

3

TES

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VC

CIO

56

VC

CIO

42

VC

CIO

31

VC

CIO

20

VC

OR

E64

VC

OR

E37

VC

OR

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VP

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4

GN

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PP

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65

R13

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510

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510

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C12

94.

7uF

C12

94.

7uF

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3C46

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3C46

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CS

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NC

7

GN

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52.

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HD

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60.

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HM

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60.

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SH

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27

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SH

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SH

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1uF

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10.

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10.

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TPD

2E00

1U

20TP

D2E

001

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3

IO2

5

GN

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NC

2

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30.

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80.

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175

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C1G

175

D3

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50.

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10.

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30.

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30.

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D14

LED

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10.

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HM

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10.

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Page 56: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

C55

35 D

SPS

HIE

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TRONIC SCH

EMAT

IC DIAGRA

M  Revise

d: Frid

ay, Sep

tembe

r 06, 201

3C5

535 DS

PSHIELD          Re

visio

n:  A

TEXA

S INSTRU

MEN

TSEP

 SYSTEMS LAB, SYSTEM ARC

HITECT

URE

S LAB

1250

0 TI Bou

levard

Dallas, TX 75

243

MS 86

49

Bill Of M

aterials      Sep

tembe

r 6,201

3      14:33

:37

ITEM

QTY

REFERE

NCE

 DESIGNAT

OR

PART

DESCRIPTION

MFG

MFG

 P/N

SUPP

LIER

SUPP

LIER

 P/N

PACK

AGE

Single QTY 

Price 

Price in 

Volume 

Volume Size

NOTES1

NOTES2

113

C1,C6,C1

2,C1

9,C3

1,C5

2,10

uF

CAPA

CITO

R, 

10V CE

RAMIC 

X5R 20

%TD

K Co

rporation

C160

8X5R

1A1

06K

DIGIKEY

445‐74

86‐1‐

ND

603 $        0.44 

 $         0.12

 10

00C5

6,C8

0,C8

1,C8

4,C8

5,C8

8,C1

16

258

C2,C4,C8

,C9,C1

1,C1

3,C1

7,0.1u

F

CAPA

CITO

R, 

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RAMIC 

X7R 10

%Taiyo Yude

nGMK1

05BJ

104K

V‐F

DIGIKEY

587‐19

94‐2‐

ND

402 $        0.10 

 $         0.02

 50

00C2

1,C3

2,C4

2,C4

3,C4

4,C5

4,C5

5,C5

7,C5

8,C5

9,C6

2,C6

5,C6

7,C6

8,C7

2,C7

9,C8

2,C8

3,C8

6,C8

7,C8

9,C9

0,C9

8,C1

00,

C101

,C10

2,C1

03,C10

4,C1

05,

C106

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7,C1

08,C10

9,C1

10,

C111

,C11

2,C1

13,C11

5,C1

17,

C118

,C11

9,C1

20,C12

1,C1

22,

C123

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6,C1

27,C12

8,C1

30,

C132

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3

33

C3,C14

,C33

1000

pF

CAPA

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RAMIC 

X7R 10

%Ke

met

C040

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RACT

UDIGIKEY

399‐77

57‐1‐

ND

402 $        0.24 

 $         0.04

 10

000

42

C5,C7

33pF

CAPA

CITO

R, 

50V CE

RAMIC 

NPO

 5%

TDK Co

rporation

C100

5C0G

1H3

30J050

BA

DIGIKEY

445‐12

41‐1‐

ND

402 $        0.24 

 $         0.04

 10

000

516

C10,C1

6,C2

0,C2

4,C2

6,C2

8,1u

F

CAPA

CITO

R, 

10V CE

RAMIC 

X5R 10

%Taiyo Yude

nLM

K105

BJ1

05KV

‐FDIGIKEY

587‐14

54‐1‐

ND

402 $        0.10 

 $         0.01

 50

00C3

0,C3

5,C3

7,C3

9,C4

1,C4

5,C5

3,C6

3,C6

6,C1

24

611

C15,C1

8,C2

2,C2

3,C2

5,C2

7,0.01

uF

CAPA

CITO

R, 

10V CE

RAMIC 

X7R 10

%TD

K Co

rporation

C060

3X7R

1A1

03K0

30B

ADIGIKEY

445‐68

43‐1‐

ND

201 $        0.10 

 $         0.01

 10

00C2

9,C3

4,C3

6,C3

8,C4

0

Page 57: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

76

C46,C4

7,C4

8,C4

9,C5

0,C5

10.1u

F

CAPA

CITO

R, 

10V CE

RAMIC 

X5R 10

%TD

K Co

rporation

C060

3X5R

1A1

04K

DIGIKEY

445‐73

18‐1‐

ND

201 $        0.10 

 $         0.01

 50

00

82

C60,C6

11u

F 25

V

CAPA

CITO

R, 

25V CE

RAMIC 

X5R 10

%Taiyo Yude

nTM

K107

BJ1

05KA

‐TDIGIKEY

587‐12

48‐1‐

ND

603 $        0.10 

 $         0.01

 10

00

91

C64

0.02

2uF

CAPA

CITO

R, 

25V CE

RAMIC, 

X7R 10

%TD

K Co

rporation

C100

5X7R

1E223

KDIGIKEY

445‐12

61‐1‐

ND

402 $        0.10 

 $         0.01

 10

00

102

C69,C7

04.7u

F

CAPA

CITO

R, 

16V CE

RAMIC 

10%

TDK Co

rporation

C321

6X7R

1C4

75K/1.60

DIGIKEY

445‐13

85‐1‐

ND

1206

 $        0.29 

 $         0.06

 10

00

115

C71,C9

6,C9

7,C9

9,C1

140.01

uF

CAPA

CITO

R, 

25V CE

RAMIC 

X7R 10

%Murata Electron

ics 

North America

GRM

155R

71E10

3KA0

1D

DIGIKEY

490‐13

12‐1‐

ND

402 $        0.10 

 $         0.00

 50

00

122

C73,C7

40.47

uF

CAPA

CITO

R, 

16V CE

RAMIC 

X7R 10

%Taiyo Yude

nEM

K107

B747

4KA‐T

DIGIKEY

587‐12

50‐1‐

ND

603 $        0.10 

 $         0.01

 10

00

132

C75,C7

6DN

ICA

PACITO

R,60

3Do no

t Install

142

C77,C7

847

uF

CAPA

CITO

R, 

10V CE

RAMIC 

X5R 20

%TD

K Co

rporation

C322

5X5R

1A4

76M

DIGIKEY

445‐67

11‐1‐

ND

1210

 $        1.24 

 $         0.34

 10

00

152

C91,C9

322

uF

CAPA

CITO

R, 

10V CE

RAMIC  

X5R 10

%TD

K Co

rporation

CGJ4J2X7

R1A

224K

125

AADIGIKEY

445‐81

90‐1‐

ND

805 $        0.37 

 $         0.11

 10

00

162

C92,C9

42.2u

F

CAPA

CITO

R, 

6.3V

 CER

AMIC 

X5R 10

%TD

K Co

rporation

C160

8X5R

1A2

25K0

80A

CDIGIKEY

445‐51

66‐1‐

ND

603 $        0.20 

 $         0.03

 10

00

171

C95

33nF

CAPA

CITO

R, 

16V CE

RAMIC 

X7R 10

%TD

K Co

rporation

CGA2

B2X7

R1C3

33K0

50B

ADIGIKEY

445‐12

238‐1‐

ND

402 $        0.10 

 $         0.00

 50

00

183

C125

,C12

9,C1

314.7u

F

CAPA

CITO

R, 

6.3V

 CER

AMIC 

X5R 20

%Murata Electron

ics 

North America

GRM

188R

60J47

5ME19

DDIGIKEY

490‐54

21‐1‐

ND

603 $        0.13 

 $         0.00

 10

00

191

DISP1

OSD

9616

P09

92‐10

DISPLAY, OLED 

INSTALLED 

WITH 2‐SIDE

D TA

PEOSD

 Disp

lays

OSD

9616

P09

92‐10

OSD

 Displays

OSD

9616

P09

92‐10

OLED_

DISPL

AY $        6.00 

 UNKN

OWN  UNKN

OWN 

INSTALLED 

WITH 2‐SIDE

D TA

PE

201

D16.2V

DIODE

 ZEN

ER 

6.2V

 500

MW 

SOD‐12

3Diod

es Inc

MMSZ52

34B‐7‐F

DIGIKEY

MMSZ52

34B‐

FDICT‐ND

SOD‐12

3‐1N

4148

W_D

IODE

S $        0.21 

 $         0.04

 10

00

215

D2,D3,D4

,D5,D1

4LED

DIODE

, LED

 ORA

NGE 5m

ALite‐On Inc

LTST‐

C193

KFKT

‐5A

DIGIKEY

160‐18

29‐1‐

ND

0603

_D $        0.42 

 $         0.08

 10

00

223

D6,D7,D8

MBR

0520

LT1G

DIODE

, SCHO

TTKY

ON Sem

icon

ductor

MBR

0520

LT1G

DIGIKEY

MBR

0520

LT1

GOSCT‐ND

SOD1

23‐

MBR

0520

_ONSEMI

 $        0.37 

 $         0.07

 10

00

231

D9CR

S08

DIODE

, SCHO

TTKY

Toshiba

CRS08(TE8

5L,Q,M

)DIGIKEY

CRS08Q

MCT

‐ND

SOD1

23F_T

OSH

IBA

 $        0.63 

 $         0.17

 10

00

244

D10,D1

1,D1

2,D1

3SD

M40

E20

LS

DIODE

, SCHO

TTKY

 DU

AL SER

IES

Diod

es Inc

SDM40

E20

LS‐7‐F

DIGIKEY

SDM40

E20LS‐

FDICT‐ND

SOT‐23

‐BA

T54S_D

IO $        0.44 

 $         0.16

 10

00

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256

FB1,FB2,FB3,FB4,FB5,FB6

BLM18

AG6

01SN

1D

FERR

ITE BE

AD 

600 OHM

 50

0mA

Murata Electron

ics 

North America

BLM18

AG6

01SN

1DDIGIKEY

490‐10

14‐1‐

ND

603 $        0.31 

 $         0.03

 10

00

265

FB7,FB8,FB9,FB10

,FB1

1MPZ16

08S

221A

FERR

ITE BE

AD 

220 OHM

 2A

TDK Co

rporation

MPZ16

08S

221A

DIGIKEY

445‐15

65‐1‐

ND

603 $        0.31 

 $         0.03

 10

00

271

F1

FUSE‐M

F‐MSM

F050

‐2

FUSE, PTC

 RE

SETTAB

LE 

.50A

 15V

Bourns Inc.

MF‐

MSM

F050

‐2

DIGIKEY

MF‐

MSM

F050

‐2C

T‐ND

1812

 $        0.24 

 $         0.12

 10

00

281

G1

ASFL1‐

12MHZ

OSCILLATO

R, 

CRYSTA

L CLOCK

, 4‐PIN

Abracon 

Corporation

ASFL1‐

12.000

MHZ

‐EK

‐TDIGIKEY

535‐92

53‐1‐

ND

CRY4

‐80

02_SI

 $        2.81 

 $         1.05

 10

00

291

G2

DNI

OSCILLATO

R, 

CRYSTA

L CLOCK

, 4‐PIN

Abracon 

Corporation

ASFL1‐

12.000

MHZ

‐EK

‐TDIGIKEY

535‐92

53‐1‐

ND

CRY4

‐80

02_SI

 $        2.81 

 $         1.05

 10

00Do no

t Install

305

JP1,JP2,JP4,JP5,JP6

HDR2

HEAD

ER, M

ALE 

2POS .1"

SAMTEC

TSW‐102

‐07

‐T‐S 

AVNET

TSW‐102

‐07‐

T‐S 

HDR2

 $        0.07 

 $         0.06

 10

00

311

JP3

HDR3

HEAD

ER, M

ALE 

3POS .1"

SAMTEC

TSW‐103

‐07

‐T‐S

AVNET

TSW‐103

‐07‐

T‐S

HDR3

 $        0.11 

 $         0.09

 10

00

321

J1DN

IHE

ADER

, MALE 

9POS .1"

SAMTEC

TSW‐109

‐07

‐T‐S

AVNET

TSW‐109

‐07‐

T‐S

HDR9

‐1X9

 $        0.34 

 $         0.28

 27

78Do no

t Install

331

J2TR

S_JACK

4_P

INK

CONNEC

TOR, 

3.5M

M STERO

 AU

DIO JA

CKCU

I Inc

SJ‐352

4‐SM

T‐PI

DIGIKEY

CP‐

3524

SJPICT

‐ND

STER

EOJACK

DECA

L $        1.82 

 $         1.82

 10

00

341

J3TR

S_JACK

4_G

REEN

CONNEC

TOR, 

3.5M

M STERO

 AU

DIO JA

CKCU

I Inc

SJ‐352

4‐SM

T‐GR

DIGIKEY

CP‐

3524

SJGRC

T‐ND

STER

EOJACK

DECA

L $        1.82 

 $         1.82

 10

00

351

L12.2u

H

INDU

CTOR,  

1.3A

 40M

Hz 

20%

Murata Electron

ics 

North America

LQM2H

PN2

R2MG0L

DIGIKEY

490‐51

14‐1‐

ND

IND2

‐10

08CS_C

OI

L $        0.34 

 $         0.16

 10

00

362

P1,P9

USB

‐uB

CONNEC

TOR, 

USB

 MICRO

‐BFCI

1011

8192

‐00

01LF

DIGIKEY

609‐46

13‐1‐

ND

USB

‐UB‐

1011

8192

_FCI

 $        0.46 

 $         0.26

 50

0

371

P2SD

_MICRO

CONNEC

TOR, 

SD M

ICRO

Amph

enol 

Commercial 

Prod

ucts

101‐00

660‐

68‐6

DIGIKEY

101‐00

660‐

68‐6‐1‐ND

CONN9‐

MICRO

‐SD‐

1010

0660

XXX_

AMP

 $        1.97 

 $         0.98

 10

00

381

P3OLED_

CON

N_R

EVCO

NNEC

TOR, 

OLED DISPLAY

FCI

1005

1922

‐14

10ELF

DIGIKEY

609‐12

37‐1‐

ND

CONN14

‐10

0519

22_F

CI_R

EV $        0.85 

 $         0.44

 10

00

391

P4HD

R2X2

0

HEAD

ER, 

FEMALE 40

 POS 

.1" 2R

OW

SAMTEC

SSW‐120

‐01

‐T‐D

Avne

tSSW‐120

‐01‐

T‐D

HDR4

0_RE

V_P

INOUT

 $        3.37 

 $         2.39

 12

50

401

P5HD

R1X1

0

HEAD

ER, 

FEMALE 10

POS 

.1"

SAMTEC

SSQ‐110

‐04‐

F‐S

Avne

tSSQ‐110

‐04‐

T‐S

HDR1

0_SU

LL $        1.20 

 $         0.99

 25

00Do no

t cut off 

long

 tails

412

P6,P7

HDR1

X8

HEAD

ER, 

FEMALE 8P

OS 

.1"

SAMTEC

SSQ‐108

‐04‐

F‐S

Avne

tSSQ‐108

‐04‐

T‐S

HDR1

X8 $        0.96 

 $         0.79

 31

25Do no

t cut off 

long

 tails

421

P8HD

R1X6

HEAD

ER, 

FEMALE 6P

OS 

.1" 

SAMTEC

SSQ‐106

‐04‐

F‐S

Avne

tSSQ‐106

‐04‐

T‐S

HDR1

X6 $        0.72 

 $         0.59

 41

67Do no

t cut off 

long

 tails

431

P10

HDR2

X3‐

FEM

HEAD

ER, 

FEMALE 6P

OS 

.1" 2R

OW

SAMTEC

ESQ‐103

‐24

‐T‐D

AVNET

ESQ‐103

‐24‐

T‐D

HDR2

X3‐

FEM

 $        0.92 

 $         0.77

 10

00Do no

t cut off 

long

 tails

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4422

R1,R5,R7

,R8,R1

0,R4

0,R4

2,DN

IRE

SISTOR, 

1/10

W JU

MPER

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2GE0R0

0XDIGIKEY

P0.0JCT‐ND

402 $        0.05 

 $         0.00

 10

00Do no

t Install

R54,R6

0,R6

7,R6

9,R7

7,R9

3,R9

4,R1

19,R13

6,R1

37,R14

9,R1

50,R16

3,R1

67,R16

9

4532

R2,R26

,R29

,R30

,R43

,R50

,0.0 OHM

RESISTOR, 

1/10

W JU

MPER

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2GE0R0

0XDIGIKEY

P0.0JCT‐ND

402 $        0.05 

 $         0.00

 10

00R5

2,R5

3,R5

9,R6

1,R6

2,R6

3,R6

4,R6

5,R6

6,R6

8,R8

7,R9

6,R9

7,R9

8,R9

9,R1

00,R10

1,R1

08,R11

6,R1

22,R12

3,R1

25,

R126

,R12

8,R1

61,R16

5

4643

R3,R6,R9

,R16

,R17

,R18

,R19

,10

.0K

RESISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF10

02X

DIGIKEY

P10.0K

LCT‐

ND

402 $        0.10 

 $         0.01

 10

00R2

0,R2

1,R2

2,R2

3,R3

1,R3

3,R3

4,R3

5,R3

6,R3

7,R3

9,R4

1,R4

4,R5

5,R5

6,R5

7,R5

8,R8

3,R8

9,R9

0,R9

1,R9

2,R9

5,R1

10,

R111

,R11

5,R1

18,R12

0,R1

24,

R129

,R13

5,R1

38,R14

0,R1

42,

R144

,R14

8

4710

R4,R38

,R79

,R82

,R84

,R85

,10

0KRE

SISTOR, 

1/10

W  1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF10

03X

DIGIKEY

P100

KLCT

‐ND

402 $        0.10 

 $         0.01

 10

00R1

02,R10

3,R1

04,R10

5

4811

R11,R1

2,R1

3,R1

4,R1

5,R7

3,4.70

KRE

SISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF47

01X

DIGIKEY

P4.70K

LCT‐

ND

402 $        0.10 

 $         0.01

 10

00R7

6,R1

09,R11

2,R1

70,R17

1

495

R24,R4

6,R4

7,R4

8,R1

5722

0 OHM

RESISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF22

00X

DIGIKEY

P220

LCT‐ND

402 $        0.10 

 $         0.01

 10

00

509

R25,R3

2,R4

9,R7

2,R7

4,R7

5,DN

IRE

SISTOR, 

1/10

W 1%

402

Do no

t Install

R106

,R10

7,R1

68

5115

R27,R1

41,R14

3,R1

47,R15

1,0.0 OHM

RESISTOR, 

1/8W

 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

6GEY0R

00VDIGIKEY

P0.0AC

T‐ND

805 $        0.05 

 $         0.00

 10

00R1

52,R15

3,R1

54,R15

5,R1

56,

R158

,R15

9,R1

60,R16

2,R1

66

521

R28

DNI

RESISTOR, 

1/8W

 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

6GEY0R

00VDIGIKEY

P0.0AC

T‐ND

805

Do no

t Install

531

R45

820K

RESISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF82

03X

DIGIKEY

P820

KLCT

‐ND

402 $        0.10 

 $         0.01

 10

00

541

R51

100 OHM

RESISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF10

00X

DIGIKEY

P100

LCT‐ND

402 $        0.10 

 $         0.01

 10

00

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553

R70,R7

1,R1

452.20

KRE

SISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF22

01X

DIGIKEY

P2.20K

LCT‐

ND

402 $        0.10 

 $         0.01

 10

00

561

R78

10.0 OHM

RESISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

3EKF10

R0V

DIGIKEY

P10.0H

CT‐

ND

603 $        0.10 

 $         0.00

 10

00

571

R80

45.3K

RESISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF45

32X

DIGIKEY

P45.3K

LCT‐

ND

402 $        0.10 

 $         0.01

 10

00

581

R81

4.02

KRE

SISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF40

21X

DIGIKEY

P4.02K

LCT‐

ND

402 $        0.10 

 $         0.01

 10

00

594

R86,R1

13,R11

4,R1

2751

.0K

RESISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF51

02X

DIGIKEY

P51.0K

LCT‐

ND

402 $        0.10 

 $         0.01

 10

00

601

R88

15.0K

RESISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF15

02X

DIGIKEY

P15.0K

LCT‐

ND

402 $        0.10 

 $         0.01

 10

00

613

R117

,R12

1,R1

391.50

KRE

SISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF15

01X

DIGIKEY

P1.50K

LCT‐

ND

402 $        0.10 

 $         0.01

 10

00

626

R130

,R13

1,R1

32,R13

3,R1

34,

47.0 OHM

RESISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF47

R0XDIGIKEY

P47.0LCT

‐ND

402 $        0.10 

 $         0.01

 10

00R1

46

631

R164

12.0K

RESISTOR, 

1/10

W 1%

Panasonic 

Electron

ic 

Compo

nents

ERJ‐

2RKF12

02X

DIGIKEY

P12.0K

LCT‐

ND

402 $        0.10 

 $         0.01

 10

00

641

SW1

SW DIP‐

4/SM

SWITCH

, DIP 4‐

POS

CTS 

Electrocom

pone

nts

218‐4LPST

DIGIKEY

CT21

84LPST‐

ND

SW_8PN

 $        1.21 

 $         0.80

 10

00

651

SW2

SW 

MOMEN

TARY

_ESW

ITC

HSW

ITCH

, SPST 

MOMEN

TARY

E‐Sw

itch

TL33

01AF

260

QG

DIGIKEY

EG25

27CT

‐ND

SW4‐TL33

01‐

GULL_E

‐SW

 $        0.50 

 $         0.22

 10

00

666

TP1,TP7,TP8,TP9,TP10

,TEST POINTTERM

INAL, 

TEST POINT

Keystone

 Electron

ics

5002

5002

K‐ND

TP‐

5002

_KEY

 $        0.35 

 $         0.15

 10

00TP11

675

TP2,TP3,TP4,TP5,TP6

DNI

TERM

INAL, 

TEST POINT

Keystone

 Electron

ics

5002

5002

K‐ND

TP‐

5002

_KEY

 $        0.35 

 $         0.15

 10

00Do no

t Install

681

U1

TMS320

C553

5

I.C., FIXED 

POINT DS

P 10

0MHZ

Texas Instrum

ents

TMS320

C553

5AZH

H10

DIGIKEY

296‐29

560‐

ND

BGA1

44‐

ZHH_

TI $      13

.09 

 $         7.91

 10

00

692

U2,U16

SN74

LVC2

G15

7I.C

., 2 TO

 1 

MULTIPLEXER

Texas Instrum

ents

SN74

LVC2

G15

7DCU

RDIGIKEY

296‐12

605‐1‐

ND

SOIC8‐

DCU_TI

 $        0.70 

 $         0.25

 30

00

702

U3,U4

SN74

CB3Q

3257

I.C., 4‐BIT 1 OF 

2 MUX/DE

MUX

Texas Instrum

ents

SN74

CB3Q

3257

RGYR

DIGIKEY

296‐16

834‐1‐

ND

PQFP16

‐RG

Y_TI

 $        1.11 

 $         0.47

 10

00

712

U5,U11

TCA6

416A

RTW

I.C., 16

‐BIT I2C 

I/O EXP

ANDE

RTexas Instrum

ents

TCA6

416A

RTW

RDIGIKEY

296‐24

826‐1‐

ND

QFN

24‐

UF_LIN

 $        2.71 

 $         1.15

 30

00

721

U6

DNI

I.C., SINGLE 

BUFFER

Texas Instrum

ents

SN74

LVC1

G12

5DRLR

DIGIKEY

296‐18

012‐1‐

ND

SOIC5‐

DRL_TI

 $        0.54 

 $         0.15

 30

00Do no

t Install

Page 61: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

731

U7

AIC3

204

I.C., STER

EO 

AUDIO CODE

CTexas Instrum

ents

TLV3

20AIC

3204

IRHB

RDIGIKEY

296‐23

775‐1‐

ND

PQFP32

‐RH

B_TI

 $        5.83 

 $         2.58

 10

00

741

U8

TPS386

596

L33

I.C., QUAD

 RE

SET 

SUPERV

ISOR

Texas Instrum

ents

TPS386

596

L33D

GKT

DIGIKEY

296‐27

694‐1‐

ND

SOIC8‐

DGK_

TI $        2.87 

 $         1.13

 10

00

751

U9

PCA9

515B

I.C., I2C BU

S RE

PEAT

ERTexas Instrum

ents

PCA9

515B

DGKR

DIGIKEY

296‐30

393‐1‐

ND

SOIC8‐

DGK_

TI $        2.73 

 $         1.07

 25

00

761

U10

TXB0

104R

GY

I.C., 4‐BIT 

VOLTAG

E TR

ANSLAT

OR

Texas Instrum

ents

TXB0

104R

GYR

DIGIKEY

296‐21

930‐1‐

ND

PQFP14

‐RG

Y_TI

 $        1.75 

 $         0.74

 25

00

771

U12

SN74

LVC2

G24

1I.C

., DU

AL TRI‐

STAT

E BU

FFER

Texas Instrum

ents

SN74

LVC2

G24

1DCU

RDIGIKEY

296‐11

936‐1‐

ND

SOIC8‐

DCU_TI

 $        0.74 

 $         0.27

 30

00

781

U13

SN74

AHCT

1G12

5I.C

., SINGLE 

BUFFER

Texas Instrum

ents

SN74

AHCT

1G12

5DRL

RDIGIKEY

296‐19

379‐1‐

ND

SOIC5‐

DRL_TI

 $        0.47 

 $         0.12

 40

00

791

U14

TXB0

102

I.C., 2‐BIT 

VOLTAG

E TR

ANSLAT

OR

Texas Instrum

ents

TXB0

102D

CUR

DIGIKEY

296‐22

862‐1‐

ND

SOIC8‐

DCU_TI

 $        1.20 

 $         0.51

 10

00

801

U15

SN74

LVC1

G32

08

I.C., SINGLE 3‐

INPU

T PO

SITIVE

 OR‐

AND GAT

ETexas Instrum

ents

SN74

LVC1

G32

08DC

KR

DIGIKEY

296‐17

845‐1‐

ND

SOIC6‐

DCK_

TI $        0.40 

 $         0.11

 10

00

811

U17

SN74

LVC1

G07

I.C., SINGLE 

OPEN‐DRA

IN 

BUFFER

Texas Instrum

ents

SN74

LVC1

G07

DRLR

DIGIKEY

296‐18

010‐1‐

ND

SOIC5‐

DRL_TI

 $        0.47 

 $         0.13

 10

00

821

U18

SN74

LVC1

G06

I.C., SINGLE 

OPEN‐DRA

IN 

INVE

RTER

Texas Instrum

ents

SN74

LVC1

G06

DRLR

DIGIKEY

296‐18

009‐1‐

ND

SOIC5‐

DRL_TI

 $        0.47 

 $         0.13

 10

00

831

U19

SN74

LVC1

G12

5I.C

., SINGLE 

BUFFER

Texas Instrum

ents

SN74

LVC1

G12

5DRLR

DIGIKEY

296‐18

012‐1‐

ND

SOIC5‐

DRL_TI

 $        0.54 

 $         0.15

 30

00

841

U20

TPD2

E001

I.C., ESD 

PROTECT

ION

Texas Instrum

ents

TPD2

E001

DRLR

DIGIKEY

296‐21

883‐1‐

ND

SOIC5‐

DRL_TI

 $        0.63 

 $         0.23

 40

00

851

U21

AT93

C46

I.C., 4K

 EEPR

OM

Atmel

AT93

C46D

N‐SH‐B

DIGIKEY

AT93

C46D

N‐

SH‐B‐ND

SOIC8‐

8S1_AT

M $        0.28 

 $         0.22

 25

0

861

U22

FT22

32H

I.C., USB

 TO 

UAR

T BR

IDGE

FTDI, Future 

Techno

logy 

Devices 

International

FT22

32HQ

‐RE

ELDIGIKEY

768‐10

25‐1‐

ND

PQFP64

‐QFN

_FTD

I $        6.70 

 $         3.80

 10

00

871

U23

SN74

LVC1

G17

5I.C

., SINGLE D 

FLIP‐FLO

PTexas 

Instrumen

ts

SN74

LVC1

G17

5DCK

RDIGIKEY

296‐16

998‐

1‐ND

SOIC6‐

DCK_

TI $       0.28 

 $       0.13 

3000

881

VR1

LMR1

051

0XDB

V

I.C., 1A

 STEP‐

DOWN 

REGULATO

RTexas 

Instrumen

ts

LMR1

051

0XMFE/N

OPB

DIGIKEY

LMR1

0510

XMFE/N

OPB

CT‐ND

SOIC5‐

DBV_

TI $       0.97 

 $       0.34 

1000

891

VR2

LP39

82

I.C., LD

LINEA

R RE

G, 

300m

ATexas 

Instrumen

ts

LP39

82IM

M‐

ADJ/NOPB

DIGIKEY

LP39

82IM

M‐

ADJ/NOPB

CT‐ND

SOIC8‐

DGK_

TI $       0.70 

 $       0.27 

1000

901

Y132

.768

KHZ

CRYSTA

L,Seiko 

Instrumen

ts

SSPT7F‐

12.5PF20

‐R

DIGIKEY

728‐10

64‐1‐

ND

CRYSTA

L‐SSPT7F_SII

 $       0.82 

 $       0.47 

1000

Page 62: Hardware Reference Manual - Stanford Universityweb.stanford.edu/group/kovacslab/cgi-bin/uploads/images/DSP_Shield... · 1.1 Hardware Reference Manual ... CCS Code Composer Studio

911

Bare PCB

Printed Circuit 

Board

Gorilla Circuits

TIRN

D‐22

383‐01

Automate d

 Circuit 

Desig

nTIRN

D‐22

383‐

01