// DESCRIPTION://// This example sets up the PLL in x10/2 mode.//// For 150 MHz devices (default)// divides SYSCLKOUT by six to reach a 25.0Mhz HSPCLK// (assuming a 30Mhz XCLKIN).//// For 100 MHz devices:// divides SYSCLKOUT by four to reach a 25.0Mhz HSPCLK// (assuming a 20Mhz XCLKIN).//// Interrupts are enabled and the ePWM1 is setup to generate a periodic// ADC SOC on SEQ1. Two channels are converted, ADCINA3 and ADCINA2.//// Watch Variables://// Voltage1[10] Last 10 ADCRESULT0 values// Voltage2[10] Last 10 ADCRESULT1 values// ConversionCount Current result number 0-9// LoopCount Idle loop counter//############################################################################include "DSP28x_Project.h" // Device Headerfile and Examples Include Filevoid InitEPwm1Example(void);// Prototype statements for functions found within this file.interrupt void adc_isr(void);interrupt void cpu_timer0_isr(void);interrupt void epwm1_isr(void);#define EPWM1_MAX_DB 0x03FF#define EPWM1_MIN_DB 0#define DB_UP 1#define DB_DOWN 0Uint32 PWM_CYCLE = 4650;float duty_cycle = 0.5;Uint32 anchoA = 4650;//Uint32 anchoB = 4650;//Uint32 anchoC = 4650;// Global variables used in this example:Uint16 LoopCount;Uint16 ConversionCount;Uint16 Voltage1;Uint16 Voltage2;Uint16 Voltage3;Uint16 Voltage4;Uint32 EPwm1TimerIntCount;Uint16 EPwm1_DB_Direction;void main(){// Step 1. Initialize System Control:// PLL, WatchDog, enable Peripheral Clocks// This example function is found in the DSP2833x_SysCtrl.c file. InitSysCtrl(); InitEPwm1Gpio(); /* EALLOW; // Default - 150 MHz SYSCLKOUT #define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0 MHz EDIS;*/ //EALLOW; // SysCtrlRegs.WDCR= 0x00AF; // Re-enable the watchdog //EDIS; // 0x00AF to NOT disable the Watchdog, Prescaler = 64// Step 2. Initialize GPIO:// This example function is found in the DSP2833x_Gpio.c file and// illustrates how to set the GPIO to it's default state.// InitGpio(); // Skipped for this example// Step 3. Clear all interrupts and initialize PIE vector table:// Disable CPU interrupts DINT;// Initialize the PIE control registers to their default state.// The default state is all PIE interrupts disabled and flags// are cleared.// This function is found in the DSP2833x_PieCtrl.c file. InitPieCtrl();// Disable CPU interrupts and clear all CPU interrupt flags: IER = 0x0000; IFR = 0x0000;// Initialize the PIE vector table with pointers to the shell Interrupt// Service Routines (ISR).// This will populate the entire table, even if the interrupt// is not used in this example. This is useful for debug purposes.// The shell ISR routines are found in DSP2833x_DefaultIsr.c.// This function is found in DSP2833x_PieVect.c. InitPieVectTable(); InitAdc(); ///////////////////////////////////////////////////////////////////////// AdcRegs.ADCTRL1.all = 0; AdcRegs.ADCTRL1.bit.ACQ_PS = 7; // 7 = 8 x ADCCLK AdcRegs.ADCTRL1.bit.SEQ_CASC =1; // 1=cascaded sequencer AdcRegs.ADCTRL1.bit.CPS = 0; // divide by 1 AdcRegs.ADCTRL1.bit.CONT_RUN = 0; // single run mode AdcRegs.ADCTRL2.all = 0; AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // 1=enable SEQ1 interrupt AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 =1; // 1=SEQ1 start from ePWM_SOCA trigger AdcRegs.ADCTRL2.bit.INT_MOD_SEQ1 = 0; // 0= interrupt after every end of sequence AdcRegs.ADCTRL3.bit.ADCCLKPS = 3; // ADC clock: FCLK = HSPCLK / 2 * ADCCLKPS // HSPCLK = 75MHz (see DSP2833x_SysCtrl.c) // FCLK = 12.5 MHz AdcRegs.ADCMAXCONV.all = 0x0004; // 2 conversions from Sequencer 1 AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0; // Setup ADCINA0 as 1st SEQ1 conv. AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 1; // Setup ADCINA1 as 2nd SEQ1 conv. AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 2; // Setup ADCINA1 as 2nd SEQ1 conv. AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 3; // Setup ADCINA1 as 2nd SEQ1 conv. EPwm2Regs.TBCTL.all = 0xC030; // Configure timer control register /* bit 15-14 11: FREE/SOFT, 11 = ignore emulation suspend bit 13 0: PHSDIR, 0 = count down after sync event bit 12-10 000: CLKDIV, 000 => TBCLK = HSPCLK/1 bit 9-7 000: HSPCLKDIV, 000 => HSPCLK = SYSCLKOUT/1 bit 6 0: SWFSYNC, 0 = no software sync produced bit 5-4 11: SYNCOSEL, 11 = sync-out disabled bit 3 0: PRDLD, 0 = reload PRD on counter=0 bit 2 0: PHSEN, 0 = phase control disabled bit 1-0 00: CTRMODE, 00 = count up mode */ EPwm2Regs.TBPRD = 2999; // TPPRD +1 = TPWM / (HSPCLKDIV * CLKDIV * TSYSCLK) // = 20 s / 6.667 ns EPwm2Regs.ETPS.all = 0x0100; // Configure ADC start by ePWM2 /* bit 15-14 00: EPWMxSOCB, read-only bit 13-12 00: SOCBPRD, don't care bit 11-10 00: EPWMxSOCA, read-only bit 9-8 01: SOCAPRD, 01 = generate SOCA on first event bit 7-4 0000: reserved bit 3-2 00: INTCNT, don't care bit 1-0 00: INTPRD, don't care */ EPwm2Regs.ETSEL.all = 0x0A00; // Enable SOCA to ADC /* bit 15 0: SOCBEN, 0 = disable SOCB bit 14-12 000: SOCBSEL, don't care bit 11 1: SOCAEN, 1 = enable SOCA bit 10-8 010: SOCASEL, 010 = SOCA on PRD event bit 7-4 0000: reserved bit 3 0: INTEN, 0 = disable interrupt bit 2-0 000: INTSEL, don't care */ /////////////////////////////////////////////////////////////////////////// Interrupts that are used in this example are re-mapped to// ISR functions found within this file. EALLOW; // This is needed to write to EALLOW protected register //PieVectTable.TINT0 = &cpu_timer0_isr; PieVectTable.EPWM1_INT = &epwm1_isr; PieVectTable.ADCINT = &adc_isr; EDIS; // This is needed to disable write to EALLOW protected registers EALLOW; SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0; EDIS; InitEPwm1Example(); EALLOW; SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; EDIS; EPwm1TimerIntCount = 0;// Step 4. Initialize all the Device Peripherals:// This function is found in DSP2833x_InitPeripherals.c// InitPeripherals(); // Not required for this example // InitAdc(); // For this example, init the ADC //InitCpuTimers();// Step 5. User specific code, enable interrupts:/*// Enable ADCINT in PIE PieCtrlRegs.PIEIER1.bit.INTx6 = 1; IER |= M_INT1; // Enable CPU Interrupt 1 EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM LoopCount = 0; ConversionCount = 0;// Configure ADC AdcRegs.ADCMAXCONV.all = 0x0001; // Setup 2 conv's on SEQ1 AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // Setup ADCINA3 as 1st SEQ1 conv. AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1; // Setup ADCINA2 as 2nd SEQ1 conv. AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1 AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)// Assumes ePWM1 clock is already enabled in InitSysCtrl(); EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event EPwm1Regs.CMPA.half.CMPA = 0x0080; // Set compare A value EPwm1Regs.TBPRD = 0xFFFF; // Set period for ePWM1 EPwm1Regs.TBCTL.bit.CTRMODE = 0; // count up and start// Wait for ADC interrupt for(;;LoopCount++){ if(LoopCount==10000){ LoopCount=0; } }*/ //ConfigCpuTimer(&CpuTimer0,150,100000); PieCtrlRegs.PIEIER3.bit.INTx1 = 1; // PieCtrlRegs.PIEIER1.bit.INTx7 = 1; // CPU Timer 0 PieCtrlRegs.PIEIER1.bit.INTx6 = 1; // ADC IER |=1; IER |= M_INT3; EINT; ERTM; //CpuTimer0Regs.TCR.bit.TSS = 0; // start timer0 while(1) { asm(" NOP"); // while(CpuTimer0.InterruptCount