Fundamentals of Grounding, from Circuit to System

Fundamentals of Grounding, from Circuit to System: South Africa Visit, Nov. 2009

1©Copyright 2009

Fundamentals of Grounding,Fundamentals of Grounding,Fundamentals of Grounding,Fundamentals of Grounding,from Circuit to Systemfrom Circuit to Systemfrom Circuit to Systemfrom Circuit to System

Elya B. JoffePresident: IEEE EMC Society

2008-2009e-mail: [email protected]

Speaker

“’Ground’ is where carrots and potatoes thrive”

Dr. Bruce Archambeault


2©Copyright 2009

About the Instructor: Elya B. JoffeAbout the Instructor: Elya B. JoffeAbout the Instructor: Elya B. JoffeAbout the Instructor: Elya B. JoffeJOFFE, Elya B., K.T.M. Project Engineering, Kfar-Sava, Israel, and Senior EMC engineering Specialist and consultant.

Mr. Joffe has over 25 years of experience in government and industry, in EMC/E3, Electromagnetic Compatibility/Electromagnetic Environmental Effects, for electronic systems and platforms, in particular aircraft and aerospace. He is actively involved in the EMC design of commercial and defense systems, from circuits to full platforms.

His work covers various fields in the discipline of EMC, such as NEMP and Lightning Protection design, as well as numerical modeling for solution of EMC Problems.Mr. Joffe has authored and co-authored over 30 papers in the IEEE Transactions on EMC and Broadcasting, as well as in the proceedings of International EMC Symposia. He is Senior Member of IEEE, President of the IEEE EMC Society (2008-2009), member of the Board of Directors of the IEEE EMC Society and the Product Safety Engineering Society, and Chairs several Committees. He is also the Immediate Past Chairman of the Israel IEEE EMC Chapter and has served as a "Distinguished Lecturer" of the IEEE EMC Society.

Mr. Joffe has received several awards and recognitions from the IEEE and EMC Society for his activities. In particular, he is a recipient of the prestigious "Lawrence G. Cumming Award of the IEEE EMC Society for outstanding service", 2002, the "Honorary Life Member Award" of the IEEE EMC Society, 2004, and the IEEE EMC Society "Technical Achievement Award". He is also a recipient of the IEEE "Third Millennium Medal".

Mr. Joffe is also a member of the " dB Society".

The biography of Elya Joffe has been published numerous times in the Marquis “Who’s Who In The World” .


3©Copyright 2009

• The Grounds for Grounding

• Basic Grounding Topologies

• The “Grounding Tree”

• Understanding and Precluding “Ground Loops”

• Grounding on PCBs

• Summary

Seminar OutlineSeminar OutlineSeminar OutlineSeminar Outline


4©Copyright 2009

Grounding Grounding Grounding Grounding in EMC Engineeringin EMC Engineeringin EMC Engineeringin EMC Engineering

• “Grounding” is probably among the most important, yet more confusing aspect of electrical/electronic system design, often considered as "black magic“

Not easy to understand intuitively

No straightforward definition, modeling or analysis

Many uncontrolled factors affect its performance

• Grounding forms an inseparable part of all electronic and electrical designs, from circuit through system up to installation design

Implemented for EMC and ESD protection, for safety purposes, for lightning and surge protection, etc.


5©Copyright 2009

• A clustered system with remote AC outlets may cause ground loops due to large potential differences between the outlets, even if connected to the same power and ground bus, thus Single-ended interfaces should be avoided

Ground Ground Ground Ground –––– A Case Study A Case Study A Case Study A Case Study Grounding Requirements by System LayoutGrounding Requirements by System LayoutGrounding Requirements by System LayoutGrounding Requirements by System Layout

Distributed System ExampleDistributed System ExampleDistributed System ExampleDistributed System Example

Control Center

Fuel Tank

External Lightning Protection System

Good Grounding

Surge propagating on Data Lines

Ungrounded cable penetration the

facility

50 kV

The ungrounded cable penetrating the fuel tank, caused a potential difference between the cable and the facility’s structure, and thus - caused its explosion 50 kA

Good Grounding


6©Copyright 2009

Fundamental ConceptsFundamental ConceptsFundamental ConceptsFundamental Concepts


7©Copyright 2009

““““Path of Least ImpedancePath of Least ImpedancePath of Least ImpedancePath of Least Impedance”””” Principle Principle Principle Principle Visualize Return CurrentsVisualize Return CurrentsVisualize Return CurrentsVisualize Return Currents

• Currents always return;

To ground??

To battery negative??

• Where are they?

They are all here… flowing to their source!!


8©Copyright 2009

““““Path of Least InductancePath of Least InductancePath of Least InductancePath of Least Inductance”””” PrinciplePrinciplePrinciplePrinciple

Which path will the return current follow?Which path will the return current follow?Which path will the return current follow?Which path will the return current follow?

• Currents always take the path of least ;

Distance? Resistance? Impedance!!!


9©Copyright 2009

Equivalent Circuit

““““Path of Least InductancePath of Least InductancePath of Least InductancePath of Least Inductance”””” Principle Principle Principle Principle Which path will the return follow?Which path will the return follow?Which path will the return follow?Which path will the return follow?

Frequency (ω)(ω)(ω)(ω)

S

1

I

I

Cu

rren

t R

ati

o

-3dB

SC

S

R

Lω = 5 S

S

R

Lω =

Asymptotic

Actual

or:-

1( ) 0S S SI R j L I j Mω ω⋅ + − ⋅ =

4( ), Hy/m

2S

HL Ln

d

µπ

= ⋅SL M=

1

S S

S S

I j L

I R j L

ωω

=+

1 1, Sg S

S

RI I I I

Lω<< → ⇔ >>

SS g

S

RI I

Lω>> ⇔ >>


10©Copyright 2009

““““Path of Least InductancePath of Least InductancePath of Least InductancePath of Least Inductance”””” PrinciplePrinciplePrinciplePrincipleWhich path will the return follow?Which path will the return follow?Which path will the return follow?Which path will the return follow?

• At LOW FREQUENCIESLOW FREQUENCIES, the current will follow the path of LEAST LEAST RESISTANCERESISTANCE, via ground (IG)

1 /

S

S S

jI I

R L j

ωω

= ⋅+

0

| | @

| | @ S S S

S

S S S

Z R R jZ R j M

Z L L R

Lω

ωω

ωω

→ = + ⋅ =

≈ ⋅ ⋅ >>

≈ >> ⋅

M

Source Cable Load

RS

LS RL

Ig

I1

IS


11©Copyright 2009

• At HIGH FREQUENCIESHIGH FREQUENCIES, the current will follow the path of LEAST LEAST INDUCTANCEINDUCTANCE, via the return conductor (IS)

| | @

|

| @ S S S

S S

S

S

Z R R j

Z L LM

R

LZ R j

ω

ω ωω

ω→∞

≈ ⋅ ⋅ >>

≈ >> ⋅= + ⋅ =

““““Path of Least InductancePath of Least InductancePath of Least InductancePath of Least Inductance”””” PrinciplePrinciplePrinciplePrincipleWhich path will the return follow?Which path will the return follow?Which path will the return follow?Which path will the return follow?

1 /

S

S S

jI I

R L j

ωω

= ⋅+


12©Copyright 2009

• Definition of Total Loop Inductance

• For I=constant, ΦΦΦΦ min implies S min

min min min:

S

B ds

LI I

Thus L S

φ

φ

⋅

= ≈

⇒ ⇒

∫

““““Path of Least InductancePath of Least InductancePath of Least InductancePath of Least Inductance”””” PrinciplePrinciplePrinciplePrincipleWhen is Inductance Minimized?When is Inductance Minimized?When is Inductance Minimized?When is Inductance Minimized?

,B Φ

Current I

Magnetic Flux

X X X X X

X X X X X

X X X X X

LI

Φ≜

Loop Area, S


13©Copyright 2009

Circuit Model for Simulation(Simulation run on Agilent Technologies "Momentum" 3D Planar EM Simulator; Courtesy of Alexander Perez, Agilent Technologies)

High Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHow Does The Return Current FlowHow Does The Return Current FlowHow Does The Return Current FlowHow Does The Return Current Flow


14©Copyright 2009

Circuit Return Current Simulation @ F=1 Hz(Simulation run on Agilent Technologies "Momentum" 3D Planar EM Simulator; Courtesy of Alexander Perez, Agilent Technologies)



15©Copyright 2009

Circuit Return Current Simulation @ F=5 GHz(Simulation run on Agilent Technologies "Momentum" 3D Planar EM Simulator; Courtesy of Alexander Perez, Agilent Technologies)



16©Copyright 2009

The Grounds for GroundingThe Grounds for GroundingThe Grounds for GroundingThe Grounds for Grounding


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Purposes for GroundingPurposes for GroundingPurposes for GroundingPurposes for Grounding

• Safety: Prevention of shock hazard to personnel

Due to lightning strokes or power line short circuits to enclosure

Traditionally

• Functionality: Path for return current in particular vehicles (e.g., aircraft)

Vehicle serves as return conductor

• Reduction of EMI in equipment

Due to EM fields, common impedance or other forms of EMI coupling


18©Copyright 2009

A A A A ““““GroundGroundGroundGround”””” ---- What is it ???What is it ???What is it ???What is it ???• To the circuit designer: the circuit voltage circuit voltage referencereference oror

current return pathcurrent return path

• To the system designer: the cabinet or rack cabinet or rack chassischassis

• To the electrician: the safetysafety ground or ground or earth connectionearth connection

One of the problems with grounding is the term itself... One of the problems with grounding is the term itself... One of the problems with grounding is the term itself... One of the problems with grounding is the term itself... One of the problems with grounding is the term itself... One of the problems with grounding is the term itself... One of the problems with grounding is the term itself... One of the problems with grounding is the term itself...

itititititititit’’’’’’’’s too vagues too vagues too vagues too vagues too vagues too vagues too vagues too vague

Too many termsToo many termsToo many termsToo many termsToo many termsToo many termsToo many termsToo many terms……………………; Insufficiently defined; Insufficiently defined; Insufficiently defined; Insufficiently defined; Insufficiently defined; Insufficiently defined; Insufficiently defined; Insufficiently defined……………………


19©Copyright 2009

Ideal Case Real Case

Therefore, in reality, Therefore, in reality, ““floatedfloated”” systems may systems may compromise safetycompromise safety

AC AC

L

B C

VI VC

R Xω= ≅

+

RB

C

/230 10 300 2 50 0.2L V pF m m HzI V C mAω π= ⋅ ⋅ ≅ ⋅ ⋅ ⋅ ⋅ =

Rational for GroundingRational for GroundingRational for GroundingRational for GroundingElectrical Shock HazardsElectrical Shock HazardsElectrical Shock HazardsElectrical Shock Hazards


20©Copyright 2009

• AC power distribution is governed by national codes

• One requirement: With each outgoing phase and neutral wire theremust be a safety ground

Rational for GroundingRational for GroundingRational for GroundingRational for GroundingElectrical Shock HazardsElectrical Shock HazardsElectrical Shock HazardsElectrical Shock Hazards

230V

Phase

0V

Neutral

to Return Ground

230V

Phase

0V

Neutral

to Safety GND

Equipment Enclosure Equipment EnclosureAccidental

Short

Accidental

Short

GND @

Service

EntryGND @

Service

Entry

No Safety Ground: HazardHazard Safety Ground Protection: SafeSafe

The safety ground shunts the fault currents to the power return,The safety ground shunts the fault currents to the power return, bypassing bypassing (and saving) the person(and saving) the person

230230

1,00075 !!!L

B

V VI m mAA

R≈ ≅ = >>

Ω


21©Copyright 2009

Conflicts between Safety and EMI Conflicts between Safety and EMI Conflicts between Safety and EMI Conflicts between Safety and EMI Control Grounding ConsiderationsControl Grounding ConsiderationsControl Grounding ConsiderationsControl Grounding Considerations

Conflicts due to EMI FiltersConflicts due to EMI FiltersConflicts due to EMI FiltersConflicts due to EMI Filters

• In case of broken Safety Ground connection, leakage current through the Filter’s capacitors to the case (CM Caps) will flow through the human body

• For safety purposes, the caps must be limited to about 1µµµµF, limiting the leakage current

Thus CM (line to earth) filtering using Caps is limited for IB ≤ 5mA

230V

Phase

0V

Neutral

Small current

through body

Equipment EnclosureBroken Safety

Ground

Connection

GND @

Service

Entry

CM Filter

Capacitors


22©Copyright 2009

Circuit #1 (Sensitive )

Circuit #2 (Noisy)

ZL2

ZL1

ES1

ES2

I2

I1

VL2

+VN2

VL1

+VN1

ZR

- EN +

I1+I

2Signal Reference "Ground"

So, with A So, with A So, with A So, with A ““““PracticalPracticalPracticalPractical”””” Ground...Ground...Ground...Ground...What Do WE Do???What Do WE Do???What Do WE Do???What Do WE Do???

Noise from circuit #2 (Noisy) may couple into Circuit #1 Noise from circuit #2 (Noisy) may couple into Circuit #1 (sensitive)(sensitive)


23©Copyright 2009

• Lower the impedance of the common return path

Reduces the ground voltage drop below the sensitivity levels of the

victim circuits (a.k.a. Bonding, not to be discussed in this presentation)

• Limit other currents I ≠≠≠≠ IX circulating in the return path used for circuit X

Isolating currents from difference circuits, reducing coupling between

currents flowing in the same path

• Design a noise tolerant system

Using differential circuits with high common mode rejection, for

instance

• The choice of each technique (or their combination) depends on feasibility, system/circuit size, cost, frequency and safety aspects

So, We Have A So, We Have A So, We Have A So, We Have A ““““PracticalPracticalPracticalPractical”””” Ground...Ground...Ground...Ground...What Do WE Do???What Do WE Do???What Do WE Do???What Do WE Do???


24©Copyright 2009

Basic Grounding TopologiesBasic Grounding TopologiesBasic Grounding TopologiesBasic Grounding Topologies


25©Copyright 2009

So, We Have A So, We Have A So, We Have A So, We Have A ““““PracticalPracticalPracticalPractical”””” Ground...Ground...Ground...Ground...There is another wayThere is another wayThere is another wayThere is another way…………


Circuit #2 (Noisy)

ZL2

ZL1

ES1

ES2

I2

I1

VL1

+VN1

I1+I

2ENG

Signal Reference "Ground"

Vi

ZS2

ZS1

ZG


Circuit #2 (Noisy)

ZL2

ZL1

ES1

ES2

I2

I1

Signal Reference "Ground"

ZS2

ZS1

ZG


26©Copyright 2009

It isIt is

O MAGIC!!!O MAGIC!!!

• Grounding within equipment is intended to realize:

Signal return

Power return

Electrical safety connection

• Grounding from the EMI standpoint is intended to:

Implementation of the above functions, with minimum common mode noise

Establishment of a path for diverting interference currents from susceptible circuits

• Therefore, the grounding system topology must be designed to ensure a well controlled current flow in the different paths

The objective: Decreasing ground currents flowing into “critical paths”

The technique:

Proper segregation of ground paths

Careful location of ground nodes

Elimination of “ground loops”

Optimizing Ground System DesignOptimizing Ground System DesignOptimizing Ground System DesignOptimizing Ground System DesignAvoiding A Common Impedance PathAvoiding A Common Impedance PathAvoiding A Common Impedance PathAvoiding A Common Impedance Path


27©Copyright 2009

Optimizing Ground System DesignOptimizing Ground System DesignOptimizing Ground System DesignOptimizing Ground System DesignGoals of Equipment and System Level Goals of Equipment and System Level Goals of Equipment and System Level Goals of Equipment and System Level

Grounding SystemGrounding SystemGrounding SystemGrounding System• The grounding scheme inside a system must accomplish the

following goals:

Analog, low level circuits must have extremely noiseless dedicated returns;

typically wires are used, dictating a single point, “star” grounding scheme

Analog, high frequency circuits (RF, video, etc.) must have low

impedance, noise free return circuits, generally in form of planes or their

extensions (e.g., coaxial cables)

Digital, logic circuit returns, especially high speed digital circuit returns, must have low impedance over the entire bandwidth (determined by the “edge rates” ), as power and signal returns share the same paths

Returns of powerful loads (e.g., solenoids, motors, relays, lamps, etc.) should be separated from all the above, even if they end up at the same power supply output terminal

For signals that communicate between parts of the equipment or system, the grounding scheme must provide a common reference with minimum ground shift (low common mode noise) between system parts


28©Copyright 2009

Ground System Topologies Ground System Topologies Ground System Topologies Ground System Topologies A A A A ““““FloatingFloatingFloatingFloating”””” SystemSystemSystemSystem

∆V

EIA RS-422

S

System #1 System #2 System #3

ESGC

)Safety Ground(

ESGC

(Safety Ground)

ES1 ES3

Signal Reference

Structure

Safety

Signal

Power

Reference


29©Copyright 2009

Ground System Topologies Ground System Topologies Ground System Topologies Ground System Topologies Single Point Ground (SPG)Single Point Ground (SPG)Single Point Ground (SPG)Single Point Ground (SPG)

““““Daisy ChainDaisy ChainDaisy ChainDaisy Chain”””” Single Point Ground (DCSingle Point Ground (DCSingle Point Ground (DCSingle Point Ground (DC----SPG)SPG)SPG)SPG)


30©Copyright 2009

A GREAT method, except for... its DISADVANTAGES!A GREAT method, except for... its DISADVANTAGES!

Most sensitive circuit

V I I I ZA= + + ⋅( )

1 2 3 1

V I I I Z I I Z I ZC = + + ⋅ + + ⋅ + ⋅( ) ( ) ( )1 2 3 1 2 3 2 3 3


““““Daisy ChainDaisy ChainDaisy ChainDaisy Chain”””” Single Point Ground (DCSingle Point Ground (DCSingle Point Ground (DCSingle Point Ground (DC----SPG)SPG)SPG)SPG)

S

System #1 System #2 System #3

Signal Reference

Structure

Safety

Signal

Power

Ground BusZ

3Z

2Z

1

I1

I2

I3I

2+I

3I1+I

2+I3

I3

A B C

GRP

Signal

Source

ES1

ℓℓℓℓ


31©Copyright 2009

V

EIA RS -422


Parallel (Parallel (Parallel (Parallel (““““StarStarStarStar””””) Single Point Ground (P) Single Point Ground (P) Single Point Ground (P) Single Point Ground (P----SPG)SPG)SPG)SPG)


32©Copyright 2009

• At higher frequencies, where the length of the ground conductors approaches λλλλ/4, the SPG is ineffective

Distance along GD Conductor

λ/4

ZS

0

This circuit should be grounded every This circuit should be grounded every λλλλλλλλ/20!/20!


SSignal Reference

Structure

GRP="0V"

Vx

Ix

Vx=0

=0V

Ix=0

=Imax

x=λ/4λ/4λ/4λ/4

Vx=λλλλ/4

=Vmax

Ix=λλλλ/4

=0A

x

Vx

, Ix

inZ →∞x=λ/4λ/4λ/4λ/4


33©Copyright 2009

∆V

EIA RS-422

Ground System Topologies Ground System Topologies Ground System Topologies Ground System Topologies MultiMultiMultiMulti----Point Ground (MPG)Point Ground (MPG)Point Ground (MPG)Point Ground (MPG)


34©Copyright 2009

• When a system comprises of several types of circuits, a composite grounding topology may be used

Single point grounding, for low frequencies (d ≤ λ/20 MHz)

Multi-point grounding for high frequencies (d > λ/20 MHz)

Ground System Topologies Ground System Topologies Ground System Topologies Ground System Topologies Composite Grounding TopologyComposite Grounding TopologyComposite Grounding TopologyComposite Grounding Topology


35©Copyright 2009

The The The The ““““Grounding TreeGrounding TreeGrounding TreeGrounding Tree””””


36©Copyright 2009

EquipmentEquipmentEquipmentEquipment----Level Level Level Level ““““Ground TreeGround TreeGround TreeGround Tree””””Design ProcessDesign ProcessDesign ProcessDesign Process

• Identify circuits

• Define Chassis Ground connections at the circuit level (heat-sink and RF Ground)

• Define PCB-level signal returns (ground) requirements

• Identify isolation requirements

• Define local ground connections

• Define CGP/SPG location

• Connect GNDs from circuits and Power Supply to CGP

• Identify “special cases” (GND System Violations) and potential ground loops

• Incorporate “isolation measures” (transformers, optocouplers, balanced interfaces, e.g.RS-422 and Isolated Ground Connections)

• Define special power supply outputs and connect returns to the CGP when applicable; define special isolated outputs


37©Copyright 2009

Video

Processor

Main CPU

I/O Circuit

Aux. Rx

Active

Antenna

Tx/Rx

Power Supply

5VD

15VA

5/3.3VD

15VA

5VA

5VD

5VD/RF

15VA/RF

15VA/RF

28VA/RF

CGP

DC/DC Module

5VD

3.3VD

15VA

5VA

5VD/RF

15VA/RF

5VD/RF

15VA/RF

15VA/RF

28VA/RF

Tree

Diagram

3.3V/5VD 15VA

5VA

15VA/RF

5VD/RF

15VA/RF

28VA/RF

5VD

LOOP???

Hig

h C

MR

R lin

k

Aux. Rx

Tx/Rx

Main CPU

5VD

15VA

Video

Processor

15VA

5VDI/O Ckt.

EquipmentEquipmentEquipmentEquipment----Level Level Level Level ““““Ground Ground Ground Ground TreeTreeTreeTree”””” Design Design Design Design ProcessProcessProcessProcess


38©Copyright 2009

Understanding and PrecludingUnderstanding and PrecludingUnderstanding and PrecludingUnderstanding and Precluding““““Ground LoopsGround LoopsGround LoopsGround Loops””””


39©Copyright 2009

A model for illustrating the effect of grounding topology on system performance

CA

d= ⋅ε ε π0

91 36 10= × F m/C=Capacitance of PCB to Ground

““““Ground LoopsGround LoopsGround LoopsGround Loops””””SPG vs. MPGSPG vs. MPGSPG vs. MPGSPG vs. MPG

Circuit #1 Circuit #2

ICM#1

ICM#2

VSRS

=VCM

Transmission Line

VL

C d

A

C

A

d

VS

ZS

Z2

Z1

ZCM

R1

R2

ZL

h

S


40©Copyright 2009


Longitudinal Conversion Loss factor, LCLLongitudinal Conversion Loss factor, LCL:

Constant

20'

CMdB

DMVo

VLCL Log

V=

= ⋅


41©Copyright 2009


• At Low Frequencies

Capacitances, C, are dominant

Circuit impedance reduces with Frequency (f)

CM current increases with f

DM voltage increases with f

• At High Frequencies

Low Pass Characteristics of the transmission line are dominant

Circuit impedance increases with f

Termination impedance limits line currents

Both sides floated

Floated Both Ends

Frequency [Hz]

Lo

ad

DM

Vo

ltag

e


42©Copyright 2009



Circuit series impedance, due to the capacitances, C, is reduced by a factor of 2 (6 dB)

CM current (and DM voltage) increases by 6 dB


No change from previous case

One side grounded

Floated One End

Frequency [Hz]

Lo

ad

DM

Vo

ltag

e


43©Copyright 2009



Circuit series impedance, is independent of capacitances, C

Circuit impedance determined by wiring & Load resistance (R)

CM current (and DM voltage) independent of f


No change from previous cases

Both sides grounded

Grounded Both Ends

Frequency [Hz]

Lo

ad

DM

Vo

ltag

e


44©Copyright 2009

Ground System Topologies Ground System Topologies Ground System Topologies Ground System Topologies SPG vs. MPGSPG vs. MPGSPG vs. MPGSPG vs. MPG

• Low frequency circuits Single point grounding only

Floating provides marginal improvement and increased risk

Low frequency performance is strongly dependent on the circuit grounding

topology

Low frequency performance significantly degraded with multipoint

grounding

• High frequency circuits Multipoint grounding only

High frequency performance independent of grounding topology


45©Copyright 2009

““““Ground LoopsGround LoopsGround LoopsGround Loops””””Techniques for Opening Techniques for Opening Techniques for Opening Techniques for Opening ““““Ground LoopsGround LoopsGround LoopsGround Loops””””

Isolation TransformerIsolation TransformerIsolation TransformerIsolation Transformer

Common Mode decoupling Common Mode decoupling of 100of 100--140 dB can be 140 dB can be achieved @ f=1kHzachieved @ f=1kHz

SSignal Reference

Structure

EG

ZGS

ZGL

VN

, V

L

ZS Z

LB

ZG

ES

ZLA

CP

L1

L2


46©Copyright 2009

Common Mode decoupling Common Mode decoupling exceeding 80exceeding 80--100 dB can be 100 dB can be

achieved @ highachieved @ high--ff’’ss


BALUNsBALUNsBALUNsBALUNs (Common Mode Chokes)(Common Mode Chokes)(Common Mode Chokes)(Common Mode Chokes)

Alternative Symbols

SSignal Reference

Structure

EG

ZGS

ZGL

VN

, V

L

ZS Z

LB

ZG

ES

ZLA

CP

IS

ICM2

ICM1

L2

L1

M

CM

Current

Signal DM

Current

Core

Hi µ−

CM-Generated

Flux

DM-Generated

Flux


47©Copyright 2009


Optical Isolator/OptocouplerOptical Isolator/OptocouplerOptical Isolator/OptocouplerOptical Isolator/Optocoupler

Common Mode decoupling Common Mode decoupling of 60of 60--80 dB can be achieved80 dB can be achieved

SSignal Reference

Structure

EG

ZGS

ZGL

VN

, V

L

ZS Z

LB

ZG

ES

ZLA

CP

IS

IS

Light Emitting

Diode (LED)

phototransistor


48©Copyright 2009


Buffer AmplifierBuffer AmplifierBuffer AmplifierBuffer Amplifier

Common Mode decoupling of 60Common Mode decoupling of 60--80 dB (*) can be achieved80 dB (*) can be achieved

(*) 120 dB in special applications(*) 120 dB in special applications

SSignal Reference

Structure

EG

ZGS

ZGL

VN

, V

L

ZS Z

LB

ZG

ES

ZLA

IS

IS

Input Stage Output Stage

+VI

-VI

+VO

-VO


49©Copyright 2009

Common Mode decoupling Common Mode decoupling of 60of 60--80 dB can be achieved80 dB can be achieved


Circuit BypassingCircuit BypassingCircuit BypassingCircuit Bypassing

SSignal Reference

Structure

EGZ

GSZ

GL

VN

, V

L

ZS Z

LB

ZG

ES

ZLA

ICM2

ICM1 I

S


50©Copyright 2009

Grounding on PCBsGrounding on PCBsGrounding on PCBsGrounding on PCBs


51©Copyright 2009

Simultaneous Switching Noise (SSN) in Simultaneous Switching Noise (SSN) in Simultaneous Switching Noise (SSN) in Simultaneous Switching Noise (SSN) in Power Distribution SystemsPower Distribution SystemsPower Distribution SystemsPower Distribution Systems

Switching NoiseSwitching NoiseSwitching NoiseSwitching Noise

Time Pattern of Switching Current of a 74LSXXX NAND Gate

5 nSec/div

7 m

A/d

iv

~ 40 mA

1.5 mA Steady State

VCC

DGND

DC

DC

DC?

IIN

[A]

IIN

IRTN

VIN

IIN

VIN

0 200 400 600 800 1000 1200 1400 1600 1800-100

-90

-80

-70

-60

-50

-40

-30

Frequency (MHz)

Powe

r bus

spe

trum

(dBm

)

VA

Power Bus Spectrum [dBm] of a Clock Driver IDT74FCT807

• Do we actually distribute “DC” in the PCB Power Distribution System?

BWt r

≈⋅

1

π


52©Copyright 2009


Power/Ground Bounce Noise Generation ModelPower/Ground Bounce Noise Generation ModelPower/Ground Bounce Noise Generation ModelPower/Ground Bounce Noise Generation ModelGate Switching from "Lo" ("0") to "Hi"

("1")

Gate 1

Gate 2

GND1

GND2

VS

VN

VOut

VCC

GND

LGND

C

VC

IC

LGND(PS)

LVcc(PS)

Gate 1

Gate 2

GND1

GND2

VOut

VCC

LGND

C

VC

VS

VN

IC

GND

LGND(PS)

LVcc(PS)

Gate Switching from "Hi" ("1") to "Lo" ("0")

( ) ( ) ( ) ( )2

2

D C

G!D G!D G!D

t t

dI t d V tV t L L C

dt dt= ⋅ = ⋅

Q1

Q2

Q3

Q4

R4

R2

R3

R1

Inputs

VCC

VOut

Gate 1

VEE


53©Copyright 2009


Consequences of Ground Bounce on the PCB Consequences of Ground Bounce on the PCB Consequences of Ground Bounce on the PCB Consequences of Ground Bounce on the PCB PerformancePerformancePerformancePerformance

"Ground Bounce" Interference Propagation in a Circuit

Ground Rail

Inductance

1

2

4

( )DI t

( )G!DV tPower Source Return

(0V Ground)

( )CV t( )CV t

VCC

VCC

LGND

3

VCC

GND3

GND4

DC Power

Source

VCC


54©Copyright 2009

Power Supply Distribution Power Supply Distribution Power Supply Distribution Power Supply Distribution SSN in Power Distribution SystemsSSN in Power Distribution SystemsSSN in Power Distribution SystemsSSN in Power Distribution SystemsConsequences of SSN on the PCB PerformanceConsequences of SSN on the PCB PerformanceConsequences of SSN on the PCB PerformanceConsequences of SSN on the PCB Performance

• Ground/Power bounce is exacerbated by a composition of several factors:

Load Capacitance

High-Q of discharge path

Short Discharge Current Transition

Time

Circuit Total Inductance


55©Copyright 2009

• Ground/Power bounce is exacerbated by a composition of several factors:

Reduce Load Capacitance (reduce fan-out)

High-Q of discharge path (add damping)

Short Discharge Current Transition Time

- add damping

- slow transition times

Circuit Total Inductance

- Use of planes

- Keep planes close adjacent

- Allocate power/return pins

- Use SMD technology

- Decouple power and return paths

G!D Pins

VCC

Int (5V) Pins

VCC

IO (3.3 or 5V) Pins

Legend

192-Pin PGA

U

T

R

P

M

L

K

J

H

G

F

E

D

C

B

A

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

EPM 7256E

CSTRAY

RD

VCC

Discharge Current

LG!D

Power Supply Distribution Power Supply Distribution Power Supply Distribution Power Supply Distribution SSN in Power Distribution SystemsSSN in Power Distribution SystemsSSN in Power Distribution SystemsSSN in Power Distribution SystemsConsequences of SSN on the PCB PerformanceConsequences of SSN on the PCB PerformanceConsequences of SSN on the PCB PerformanceConsequences of SSN on the PCB Performance


56©Copyright 2009

Power Supply Distribution Power Supply Distribution Power Supply Distribution Power Supply Distribution Ground Rules for Providing a Stable, LowGround Rules for Providing a Stable, LowGround Rules for Providing a Stable, LowGround Rules for Providing a Stable, Low----Z Voltage Z Voltage Z Voltage Z Voltage

SourceSourceSourceSource• Rule #1: Use low impedance return connections

between gates

• Rule #2: The impedance between power pins on anytwo gates should be just as low as the impedance between ground pins

• Rule #3: A low impedance path must be provided between power and ground


57©Copyright 2009

• Exposed traces over a PCB with no ground plane

• Traces routed as microstrip

• Traces routed as stripline

Crosstalk Reduction on PCBsCrosstalk Reduction on PCBsCrosstalk Reduction on PCBsCrosstalk Reduction on PCBsProper Design of Current Return PathProper Design of Current Return PathProper Design of Current Return PathProper Design of Current Return Path

Magnetic Flux opposes Flux from signal traces (Flux Cancellation)


58©Copyright 2009

W

ht

W

h

t

Zh

w t wr

0

60 4

0 67 0 8[ ] ln

. .Ω = ⋅

⋅ ⋅ +

FHG

IKJε π b g

Centered Stripline

T npd r≈ ⋅0 034. ,ε S / cm

Microstrip

Zh

w tr

0

87

1 414

5 98

0 8[ ]

.ln

.

.Ω =

+⋅

+FHG

IKJε

T npd r≈ ⋅ ⋅ +0 034 0 475 0 67. . . ,ε S / cm

High Speed Return Signals High Speed Return Signals High Speed Return Signals High Speed Return Signals Typical Transmission Line Topologies in PCBsTypical Transmission Line Topologies in PCBsTypical Transmission Line Topologies in PCBsTypical Transmission Line Topologies in PCBs


59©Copyright 2009

High Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHow Will The Return Current FlowHow Will The Return Current FlowHow Will The Return Current FlowHow Will The Return Current Flow

• The current distribution balances to opposing forces: If the return current is concentrated immediately below the trace, it

would have a higher inductance

• A skinny conductor has a higher inductance than a wide conductor

If the return current is spread farther apart from the trace, the loop inductance will increase

• Loop inductance is proportional to the current path loop area

( )i D

I

H D HA m( ) / = ⋅

+0

2

1

1π

H


60©Copyright 2009

High Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHigh Speed Return Signals on PCBsThe Case of the The Case of the The Case of the The Case of the ““““Trace in the Slotted Ground PlaneTrace in the Slotted Ground PlaneTrace in the Slotted Ground PlaneTrace in the Slotted Ground Plane””””

• A “Trace in the ground plane” diverts the return currents

• Signal+Return loop area increases

• Loop inductance increases

• Crosstalk, Radiation increase

•• Do not route high speed signal traces Do not route high speed signal traces above gaps in ground planeabove gaps in ground plane


61©Copyright 2009

• 1kV ESD injected onto PCB with and without split

• Noise coupled into a test circuit was measured

High Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHow do the Signal Return Currents FlowHow do the Signal Return Currents FlowHow do the Signal Return Currents FlowHow do the Signal Return Currents Flow………… with slots in with slots in with slots in with slots in

the ground plane?the ground plane?the ground plane?the ground plane?

Source: “ESD and EMI Effects in Printed Wiring Boards”, by Douglas C. Smith


62©Copyright 2009

• Increased current loop size increased noise coupling

• Violation of the Path of Least Inductance

High Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHigh Speed Return Signals on PCBsHow do the Signal Return Currents FlowHow do the Signal Return Currents FlowHow do the Signal Return Currents FlowHow do the Signal Return Currents Flow………… with slots in with slots in with slots in with slots in

the ground plane?the ground plane?the ground plane?the ground plane?

Source: “ESD and EMI Effects in Printed Wiring Boards”, by Douglas C. Smith3.7V Pk

170mV Pk


63©Copyright 2009

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal Systems Signal Systems Signal Systems Signal Systems Grounding in Combined Analog & Digital CircuitGrounding in Combined Analog & Digital CircuitGrounding in Combined Analog & Digital CircuitGrounding in Combined Analog & Digital Circuit

AMP AMP

I/O I/O

Analog Digital

Microprocessor

Xtal

C

RAM

C

RAM

CB

uffe

r

C

Bu

ffer

C

RAM

C

I/O

C

I/O

C

ADC

DAC

DGNDAGND

DGNDAGND

???


64©Copyright 2009

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal SystemsSignal SystemsSignal SystemsSignal Systems• Designing a high speed mixed (analog/digital) signal system without using a

proper ground is like trying to play basketball on a huge trampoline

• The analog nature of our physical world and the growing need for digital signal processing ⇒ need to design circuits which process both analog and digital signals

• Stringent performance demands on mixed-signal devices e.g., ADCs DACs and fast DSPs:

Increase in resolution

Drop in the signal voltage scale

Devices have become extremely vulnerable to noise

• Many opinions on the best method for grounding of ADCs, DACs and other mixed-signal circuits

Both analog and digital returns should remain at the same potential, but;

• Most data sheets provide little if any useful information

• Usually applies only to simple configurations containing only one converter


65©Copyright 2009

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal SystemsSignal SystemsSignal SystemsSignal SystemsSensitivity of Analog CircuitsSensitivity of Analog CircuitsSensitivity of Analog CircuitsSensitivity of Analog Circuits

• Analog ground plane noise voltages should be kept below the minimum analog signal level of concern

Depends on the sensitivity of the

analog input signal

• In ADCs (or DACs) the minimum resolvable signal level, or least significant bit (LSB) sets the limit

For an ADC, the weight of an LSB

equals the full-scale voltage range of

the converter divided by 2N, where N

is the converter's resolution

For instance, in a 12-bit ADC with a

unipolar full-scale voltage of 2.5V,

1LSB = 2.5V/212 = 610µV

Resolution (LSB) @1V

Number of Bits

59 nV24

1 µµµµV20

15 µµµµV16

60 µµµµV14

240 µµµµV12

1 mV10

4 mV8


66©Copyright 2009

• Consider:

A 24-bit ADC with an LSB of 59nV

A digital processor (e.g., DSPs, ASICs etc.) drawing a current surge of 10A through the common ground plane during state transition

⇒ The necessary impedance required to maintain the stray return path voltage at less than 59nV with 10A of switching current would be 5.9nΩ

⇒ Even with only 16 bit converters a common impedance of less than 0.152µΩ is still required

Practically unattainable

⇒ With 8 bit industrial measurement ADCs, an impedance of 39µΩ would be acceptable and could be achieved

• Sensitive analog circuitry must be provided a quiet return path

Digital

CircuitAnalog

Circuit

G!D-REF

ID

IA

ID

ID+I

A

VAV

D

+ +

VIn

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal SystemsSignal SystemsSignal SystemsSignal Systems““““To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?””””, , , , PourquoiPourquoiPourquoiPourquoi ????


67©Copyright 2009

• The PCB should consist of separate analog and digital power and ground planes

• These return paths meet at a single system common reference point

A "star" or single-point ground system

• The digital and the analog return currents forced to flow directly to the system common reference point in otherwise galvanically isolated paths

• Splitting the plane intended to prevent the digital currents from flowing in the analog section of the ground plane

• Current return paths must consist of large planes exhibiting low impedance to high frequency currents

Digital

CircuitAnalog

Circuit

G!D-REF

ID

IA

ID

IA

VAV

D

+ +

VIn

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal SystemsSignal SystemsSignal SystemsSignal Systems““““To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?””””, , , , PourquoiPourquoiPourquoiPourquoi ????


68©Copyright 2009

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal SystemsSignal SystemsSignal SystemsSignal SystemsElectrical Current Always flows in the Path of Least Electrical Current Always flows in the Path of Least Electrical Current Always flows in the Path of Least Electrical Current Always flows in the Path of Least

ImpedanceImpedanceImpedanceImpedance

Frequency of 1 kHz (Simulation run on Agilent Technologies "Momentum" 3D Planar EM Simulator)

Frequency of 1 GHz


69©Copyright 2009

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal SystemsSignal SystemsSignal SystemsSignal SystemsElectrical Current Always flows in the Path of Least ImpedanceElectrical Current Always flows in the Path of Least ImpedanceElectrical Current Always flows in the Path of Least ImpedanceElectrical Current Always flows in the Path of Least Impedance

• High frequency digital return currents, if not obstructed, tend to flow in the ground plane immediately beneath the signal trace

The path of least impedance

• The current slightly spreads out in the plane, but otherwise remains under the trace

PCB Trace at Height h above the Reference Plane, Carrying Current I0

Reference Plane Carrying the Signal Return Current

+d-d

JGP(d)

JGP(d) for an infinite plane

JGP(d) for a 20 mm wide plane

0

0(0)GP

IJ

hπ≈

PCB Dielectric Substrate

PCB Trace at Height h above the Reference Plane, Carrying Current I0

Reference Plane Carrying the Signal Return Current

+d-d

JGP(d)

JGP(d) for an infinite plane

JGP(d) for a 20 mm wide plane

0

0(0)GP

IJ

hπ≈

PCB Dielectric SubstratePCB Dielectric Substrate( )0

2

1( ) ,

1GP

IJ d A m

h d hπ≈ ⋅

+

97%20

94%10

87%5

70%2

Fraction of Current Density [%]

d/h

•• Why is it necessary, then, to physically split the ground plane Why is it necessary, then, to physically split the ground plane at the first at the first place?place?


70©Copyright 2009

• But; with the 24-bit ADC and the 10A DSP

The LSB of this ADC is equivalent to 59nV

• Assume a practical plane impedance of 40µΩµΩµΩµΩ 59nV equivalent to 0.15mA, approximately

≈≈≈≈0.15% of the digital switching current!

• The separation, d, between the digital and the analog traces must be increased so that 99.98% of the digital return current is contained within that distance

• Such separations are impractical

D

H

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal SystemsSignal SystemsSignal SystemsSignal Systems““““To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?””””, My Reply, My Reply, My Reply, My Reply


71©Copyright 2009

• Split planes pose potential EMC problems

No traces can be routed across the split in the plane

No immediate return path available near the trace

Current must flow through a large loop ⇒ Increased EMI

Differential or galvanically-isolated interfaces required

• Or, interconnect the two ground planes at one point (a.k.a. "drawbridge") and route all the traces only above the bridge

An immediate return path is provided directly underneath each of the

traces

ID

Analog Return Plane

Digital Return PlaneG!D-REF

Analog Return Plane

Digital Return PlaneG!D-REF

Drawbridge

Moat

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal SystemsSignal SystemsSignal SystemsSignal Systems““““To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?To Split or not to Split (the Ground Plane)?””””, My Reply, My Reply, My Reply, My Reply


72©Copyright 2009

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal SystemsSignal SystemsSignal SystemsSignal SystemsThe Mystery of A/D and D/A ConvertersThe Mystery of A/D and D/A ConvertersThe Mystery of A/D and D/A ConvertersThe Mystery of A/D and D/A Converters

• ADCs and DACs should be treated as analog devices and be grounded to the analog ground plane

Device return net often split internally into isolated analog and digital return nets

Stray capacitance exists between the nets

Problem resolved with dedicated AGND reference

AGND and DGND pins should be joined together with minimum lead lengths

Even if application notes suggest that AGND and DGND be connected separately, it is generally better to ignore this guidanceT

• Separate power supplies for analog and digital circuits are also highly desirable (with appropriate decoupling)

• Place a buffer latch adjacent to the converter to isolate converter's digital lines from any noise on the data bus

Grounded and decoupled to DGND

Use even if included internal to the Converter


73©Copyright 2009

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal SystemsSignal SystemsSignal SystemsSignal SystemsGrounding Scheme for a Single ADC/DAC on a Single PCBGrounding Scheme for a Single ADC/DAC on a Single PCBGrounding Scheme for a Single ADC/DAC on a Single PCBGrounding Scheme for a Single ADC/DAC on a Single PCB

Low Res (8-10 bits) : Solid Ground plane, common to

Analog and Digital Circuitry

High Res ADC: Split Ground plane between to Analog and Digital

Circuitry with “Drawbridge”

Solid Return Plane

Analog Zone Digital Zone

Digital

Circuits

Digital

Supply

Analog

Supply

DA

D DAAA

ADC

VDDV

AA

AG!D DG!D

Analog

Circuits

Latch/

Buffer

Digital

Circuits

Digital

Supply

Analog

Supply

DA

D DAAA

ADC

VDDV

AA

AG!D DG!D

Analog

Circuits

Latch/

Buffer

Analog Return Plane Digital Return Plane

Circuit

"Star Ground"

Bridge

Gap


74©Copyright 2009


• Typical width of the gap in the ground plane is 2 to 3 mm (or 80 to 120 mils) for practical PCB constructions (e.g., 1-oz copper and FR-4 dielectric)

• Narrow “drawbridge” between AGND and DGND

A relatively high impedance to HF digital return currents

A relatively low impedance to LF analog return currents

AGD DGD

ADC

AGD DGD

Digital

Interfaces

Analog

Interfaces

"Mickey Mouse" scheme:• “Dead End” for unintentional

currents in each “ear“

• No circulating currents

Digital

Circuits

Digital

Supply

Analog

Supply

DA

D DAAA

ADC

VDDV

AA

AG!D DG!D

Analog

Circuits

Latch/

Buffer


Circuit

"Star Ground"

Bridge

Gap


75©Copyright 2009

Single-ended (chassis-referenced) Analog Driver Connection violates “Mickey Mouse” Scheme


• Single-ended (chassis-referenced) analog I/O complicate the situation:

AGND and DGND connected on the PCB beneath the

converter

AGND must also be connected to the chassis (single-

endedT)

• Stray noise currents flow through the ground loop

• Isolation achieved by the AGND-DGND gap defeated/violated

No longer constitute a "dead end“

• Balanced inputs (e.g., transformer) eliminate this problem

AGD DGD

ADC

AGD DGD

Digital

Interfaces

Analog

Interfaces

Chassis-Conection

at Analog Driver

Stray Noise Current

between the Two

Chassis ConnectionsDigital

Circuits

D DAAA

ADC

AG!DDG!D

Analog

Circuits

Latch/

Buffer


Chassis-Referenced

Analog Driver

Chassis Connection of

the PCB at the Circuit

"Star Ground"

Stray Noise Current

between the Two

Chassis Connections


76©Copyright 2009

• Further complexity

Multiple return leads must all be somehow and somewhere tied together

AGNDs & DGNDs tied together under each converter ⇒⇒⇒⇒ numerous connections between

the two

Analog Zone

Digital ZoneDigital

Device

Analog Analog Analog

Digital

Device

Functional Partition

(No Gap in the Return Plane)

ADC ADC ADC

AGD Planelet 2

DGD Planelet

Digital

Device


Digital

Device

Partitioning Gap

in the Return Plane

ADC ADCADC

AGD Planelet 3AGD Planelet 1

A Properly Partitioned PCB Ground Plane with Multiple ADCs Acceptable Isolation

for Low-Res. (8-bit) Converters

A Properly Partitioned PCB Ground Plane with Multiple ADCs

Higher Noise Isolation for Moderate-Res. (10 to 12-bit) Converters

Grounding in MixedGrounding in MixedGrounding in MixedGrounding in Mixed----Signal SystemsSignal SystemsSignal SystemsSignal SystemsGrounding Scheme for Multiple ADC/DACs on a Single PCBGrounding Scheme for Multiple ADC/DACs on a Single PCBGrounding Scheme for Multiple ADC/DACs on a Single PCBGrounding Scheme for Multiple ADC/DACs on a Single PCB


77©Copyright 2009

• In higher resolution systems (12 bits or more), stray digital currents are a serious concern

With a 5V reference level, the LSB in a 24-bit ADC is equivalent to 30nV, approx.

• Three lines of attack: Minimize level of the

interfering signal (current, waveform control)

Interrupt the interference pathway with gaps

• Single-ended chassis-referenced analog input signals result multiple "ground loops“

– Chassis connections

– PCB connections

• Differential and balanced analog I/Os solves this situation

Bypass GNDs through low-impedance shunts to a massive solid-metal sheet immediately underneath the PCB


Solid and Massive Metal

Plane underneath the PCB

Solid "Stitches" to the Shunt Metal Plane

(Recommended in HF and Digital

Circuits)

Analog

Connections

Digital

Connections

AGND Planelet 2

DGND Planelet

Digital

Device


Digital

Device

Partitioning Gap

in the Return Plane

ADC ADCADC

AGND Planelet 3AGND Planelet 1

Optional "Selective Stitches" to the Shunt

Metal Plane

(Recommended in Lower-Frequency

Analog Circuits)

Capacitors or 0 Ohm

Resistors

(Package 0402 or less)Optional Pairs of Pads for Bridging

the Gap in the Return Plane


78©Copyright 2009

• When high confidence does not exist provide bridging options to interconnect AGND and DGND

• Multiple mounting pads at both sides of the gap, providing the means for "stitching" the AGND and DGND together through short jumpers or 0ΩΩΩΩresistors

Virtually transforming the circuit back into a continuous (even if not solid) plane

• The mounting pads should be closely spaced (approximately 1 to 1.5 cm apart)

• The size of the jumpers should be kept to the absolute minimum ⇒⇒⇒⇒ minimize inductance

• Under no condition may any signal trace, particularly high-speed digital (but also analog), cross the gap in any layer, except over the drawbridge


DGD Planelet

Analog

AGD Planelet 1

80 to 120 m

il

0 Ohm Resistor

(Package 0402 or smaller)

Mounting Pads protrude

into gap

ADC


79©Copyright 2009

Grounding Grounding Grounding Grounding in EMC Engineeringin EMC Engineeringin EMC Engineeringin EMC EngineeringSummarySummarySummarySummary

• “Grounding” is probably among the most important, yet more confusing aspect of electrical/electronic system design, often considered as "black magic“

• Grounding forms an inseparable part of all electronic and electrical designs, from circuit through system up to installation design

• Grounding is r5equired, primarily, for safety and for current return; It is NOT intended for EMI control, but if overlooked, may result in severe EMI

• Grounding is not magic and does make sense!!! It is founded on fundamental scientific theories of good good olol’’ Mike (Faraday) Mike (Faraday) and (J.C.) Maxand (J.C.) Max88

Fundamentals of Grounding, from Circuit to System

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