Euromicro 2008

1

EEUURROOMMIICCRROO 22000088

34th Euromicro Conference on SSooffttwwaarree EEnnggiinneeeerriinngg

and AAddvvaanncceedd AApppplliiccaattiioonnss ((((((((SSSSSSSSEEEEEEEEEEEEEEEEAAAAAAAA))))))))

11th Euromicro Conference on DDiiggiittaall SSyysstteemm DDeessiiggnn

((((((((DDDDDDDDSSSSSSSSDDDDDDDD))))))))

CCoonnffeerreennccee PPrrooggrraamm

September 3rd-5th, 2008

Parma, Italy

Euromicro 2008

2

CCoonntteennttss

Sponsors Organization Welcome Message DSD Tutorial Day Keynote Speeches 34th SEAA Program Overview 11th DSD Program Overview 34th SEAA WiP Sessions 11th DSD WiP Sessions Venue How to reach the Venue Plan of the Venue Local Facilities Social Events Transports and connections Taxi Service Bus Service Maps of bus lines in Parma Useful bus timetable Agreed Hotel Lunch/Dinner in the historic centre Useful links

Euromicro 2008

3

SSppoonnssoorrss

The organizers wish to thank:

UNIVERSITÀ DEGLI STUDI DI PAVIA

Euromicro 2008

4

OOrrggaanniizzeerrss

General Chairs Gianni Conte Dipartimento di Ingegneria di Ingegneria dell'Informazione Università degli Studi di Parma - Italy e-mail: gianni.conte@unipr.it Giovanni Danese Dipartimento di Informatica e Sistemistica Università degli Studi di Pavia - Italy e-mail: gianni.danese@unipv.it

Local Chairs Francesco Leporati Dipartimento di Informatica e Sistemistica Università degli Studi di Pavia - Italy e-mail: francesco.leporati@unipv.it Monica Mordonini Dipartimento di Ingegneria dell'Informazione Università degli Studi di Parma - Italy e-mail: monica.mordonini@unipr.it Program Chairs SEAA Raffaella Mirandola Dipartimento di Elettronica e Informazione Politecnico di Milano - Italy e-mail: mirandola @ elet.polimi.it DSD Luca Fanucci Dipartimento di Ingegneria dell'Informazione: Elettronica, Informatica, Telecomunicazioni Università di Pisa - Italy e-mail: luca.fanucci @ iet.unipi.it

Euromicro Office EUROMICRO, Sankt Augustin, Germany e-mail: office@euromicro.org

Euromicro 2008

5

WWeellccoommee It is our great pleasure to welcome you to the 34th EUROMICRO Conference on Software Engineering and Advanced Application and to the 11th Euromicro conference on Digital System Design. It is a real great honour for the organising universities of Parma and Pavia to host in the scientific Campus of Parma these two firmly established scientific events that annually put together an increasingly growing international community of technology professionals coming from many european (but not only!) countries covering academic, industrial, and R&D institutions. Information technologies, in both aspects of the hardware and software, offer research topics always significant and the presence here of experts from both sectors is a peculiarity of this very exciting Euromicro event. This year the two conferences offer a very strong scientific program with more than 200 technical papers and include seven excellent Keynote Speeches given by well kown scientists and researchers coming from primary companies and Universities. On the day before the conference we have a few tutorials covering some of the latest research areas and background topics in hardware/software system engineering and information technology. We hope you be able to stay and take advantage of this great opportunity. We expect that you will not only enjoy the scientific side of these conferences but that you will also take the opportunity to meet new friends and old friends. The organizing committee wishes you a pleasant stay in Parma, an elegant city celebrated for its architecture and its food. The social events that have been organized will offer you the oppotunity to appreciate both of these aspects. In this booklet you will find all the information about the conferences. Do not hesitate to contact the organizers at the reception desk any other requirement. Gianni Conte and Giovanni Danese General Chairs Francesco Leporati and Monica Mordonini Organising Chairs

Euromicro 2008

6

DDSSDD TTuuttoorriiaall DDaayy

Tuesday, Sept. 2, 2008 Registration 09:00 - 09:30 Tutorial - 1 Lech Jozwiack (Tech. Univers. Eindhoven) Quality-driven Model-based Architecture Synthesis for Real-time Embedded SoCs 09:00 - 09:30 (Room Aula P)

Tutorial - 2 Andreas Hansson (NxP Semiconductors) Application mapping on a composable multi-core NoC-based SoC platform CoMPSoC/1 11:30 - 13:00 (Room Aula P) Tutorial - 3 Andreas Hansson (NxP Semiconductors) Application mapping on a composable multi-core NoC-based SoC platform CoMPSoC/2 14:30 - 16:00 (Room Aula P)

Euromicro 2008

7

3344tthh SSEEAAAA PPrrooggrraamm OOvveerrvviieeww

Wednesday, September 3rd 9.00-9.30 Registration 9.30-10.00 Opening Session 10.00-11.00 Keynote DSD I: R. Goldman - The greening of the integrated circuit how electrical

engineers will save the planet: a practical guide to low power design 11.00-11.30 Coffee break 11.30-12.30 Keynote SEEA I: A. Bertolino - A guided tour of four decades of a sw testing discipline 12.30-14.00 Lunch 14.00-15.30 MTTC 1 (Room L):

Grid computing CBSE1 (Room I): Services

SPPI1 (Room H): Improving Software Management

Special Session SM1 (Room 5): Software Management

15.30-16.30 Coffee break 16.30-18.00 MTTC 2 (Room L):

Multimedia Systems

CBSE 2 (Room I): Product Lines

SPPI 2 (Room H): Defect Prediction and Prevention

Special Session SM2 (Room 5): Software management

20.00 Welcome Cocktail (Palazzo Sanvitale) Thursday, September 4th

9.00-10.00 Keynote SEAA II: J. Münch - Software Process Improvements: Opportunities & Risks 10.00-11.00 Keynote DSD II: T. W. Williams - EDA to the Rescue of the Silicon Roadmap 11.00-11.30 Coffee break 11.30-12.30 Keynote DSD III: A. Cremonesi - Semiconductor Industry Challenges & Opportunities 12.30-14.00 Lunch 14.00-15.30 Special Session

NGW (Room L): Next generation Web Computing

CBSE 3 (Room I): OSGi

SPPI 3 (Room H): Agile Software Engineering and Product Lines

Special Session SM3 (Room 5): Software Management

15.30-16.00 Coffee break 16.00-17.00 CBSE 4 (Room L):

Embedded Systems SPPI 4 (Room I): Requirements Prioritization and Portfolio Management

Special Session (Room H): Quality and Service-Oriented Applications

17.00-23.00 Social program: visit to the city, concert & social dinner Friday, September 5th

9.00-10.00 Keynote SEAA III: R. Rajkumar - Automotive Cyber-Physical Systems: Challenges and Opportunities

10.00-11.00 Keynote SEAA IV: R. Hartenstein - Von-Neumann-centric Computing: unaffordable soon? 11.00-11.30 Coffee break 11.30-13.00 CBSE & SOA PANEL (Room L):

SOA and Quality Assurance SPPI 5 (Room I): Evaluation Methods for Products and Processes

Special Session (Room H): Software Architectures for Pervasive Systems

13.00-14.30 Lunch 14.30-16.00 CBSE 5 (Room L):

Component Models Special Session (Room I): Distributed Embedded Software Systems

Special Session (Sala di presidenza): Quality and Service-Oriented Applications

SEEA WiP II (Room H)

16.00-17.00 Coffee break 17.00-18.30

SEEA WiP II

(Room H)

Euromicro 2008

8

1111tthh DDSSDD PPrrooggrraamm OOvveerrvviieeww

Wednesday, September 3rd 9.00-9.30 Registration 9.30-10.00 Opening Session 10.00-11.00 Keynote DSD I: R. Goldman - The greening of the integrated circuit how electrical engineers

will save the planet: a practical guide to low power design 11.00-11.30 Coffee break 11.30-12.30 Keynote SEEA I: A. Bertolino - A guided tour of four decades of a sw testing discipline 12.30-14.00 Lunch 14.00-15.30 WE 1.1 (Room P):

Prospective aspects of Networks-on-Chip

WE1.2 (Room O): NEWCOM++: Flexible Radio Digital Design

WE1.3 (Room N): Fault Tolerance in Digital System Design - I

WE1.4 (Room M): System-Level Energy Optimization of Embedded Sw

15.30-16.30 Poster Session (Room P) + Coffee break 16.30-18.00 WE2.1 (Room P):

MPSOC and inter-connects

WE2.2 (Room O): Video and Image Processing

WE2.3 (Room N): Fault Tolerance in Digital System Design - II

WE2.4 (Room M): Power issues

20.00 Welcome Cocktail (Palazzo Sanvitale) Thursday, September 4th

9.00-10.00 Keynote SEAA II: J. Münch - Software Process Improvements: Opportunities & Risks 10.00-11.00 Keynote DSD II: T. W. Williams - EDA to the Rescue of the Silicon Roadmap 11.00-11.30 Coffee break 11.30-12.30 Keynote DSD III: A. Cremonesi - Semiconductor Industry Challenges & Opportunities 12.30-14.00 Lunch 14.00-15.30 TH1.1 (Room P):

Design, modeling and verification of cache and cache-based systems

TH1.2 (Room O): FPGA and reconfigurable architectures - I

TH1.3 (Room N): Applications of digital systems

TH1.4 (Room M): Synthesis

15.30-16.30 Poster Session (Room P) + Coffee break 16.30-17.00 Altera speech (Room P): Reducing Power in Embedded Systems by Adding HW Accelerators

17.00-23.00 Social program: visit to the city, concert & social dinner Friday, September 5th

9.00-10.00 Keynote SEAA III: R. Rajkumar - Automotive Cyber-Physical Systems: Challenges and Opportunities

10.00-11.00 Keynote SEAA IV: R. Hartenstein - Von-Neumann-centric Computing: unaffordable soon? 11.00-11.30 Coffee break 11.30-13.00 FR1.1 (Room P):

Planning and Optimiz. of Sensor Network Systems - I

FR1.2 (Room O): Hardware checking

FR1.3 (Room N): FPGA and reconfigurable architectures - II

FR1.4 (Room M): Design methodologies

13.00-14.30 Lunch 14.30-16.00 FR2.1 (Room M):

Planning and Optimiz. of Sensor Network Systems - II

FR2.2 (Room O): Dependability and Testing of Digital Systems - I

FR2.3 (Room N): Digital Signal Processing - I

FR2.4 (Room 5): System synthesis

DSD WiP I (Room P)

16.00-17.00 Poster session + Coffee break 17.00-18.30 FR3.1 (Room M):

Wireless Systems

FR3.2 (Room O): Dependability and Testing of Digital Systems - II

FR3.3 (Room N): Digital Signal Processing - II

FR3.4 (Room 5): Parallel Architectures

DSD WiP II (Room P)

Euromicro 2008

9

KKeeyynnoottee SSppeeeecchheess

WWeeddnneessddaayy,, SSeepptt.. 33rrdd,, 22000088 Keynote 1 (DSD I): Rich Goldman (Synopsis, Armenia) – The greening of the integrated circuit how electrical engineers will save the planet: a practical guide to low power design Chair: Lech Jozwiak 10:30 - 11:30 (Auditorium) Keynote 2 (SEAA I): Antonia Bertolino (ISTI-Cnr, Pisa) – A guided tour of four decades of a software testing discipline Chair: Raffaela Mirandola 12:00 - 13:00 (Auditorium) TThhuurrssddaayy,, SSeepptt.. 44tthh,, 22000088 Keynote 3 (SEAA II): Jürgen Münch, (Fraunhofer IESE) - Software Process Improvements: Opportunities & Risks Chair: Klaus Schmid 10:30 - 11:30 (Auditorium)

Keynote 4 (DSD II): Tomas Williams (Synopsis fellow) – EDA to the Rescue of the Silicon Roadmap Chair: Luca Fanucci 12:00 - 13:00 (Auditorium) Keynote 5 (DSD III): Alessandro Cremonesi (ST Microelectronics) Semiconductor Industry Challenges & Opportunities Chair: Luca Fanucci 12:00 - 13:00 (Auditorium) FFrriiddaayy,, SSeepptt.. 55tthh,, 22000088 Keynote 6 (SEEA IV): Raj Rajkumar (Carnegie Mellon Univ.) Automotive Cyber-Physical Systems: Challenges and Opportunities” Chair: Horst Wedde 10:30 - 11:30 (Auditorium) Keynote 7 (SEAA V): Reiner Hartenstien (Univ. of Kaiserslautern) Von-Neumann-centric Computing: unaffordable soon ? Chair: Erwin Grosspietsch 12:00 - 13:00 (Auditorium)

Euromicro 2008

10

Wednesday 3 September MTTC 1: Grid Computing (14.30 – 16.00) – Room L Chair: Paul Mueller Secure Grid Micro-Workflows Using Virtual Workspaces Tim Dörnemann, Matthew Smith, Ernst Juhnke, Bernd Freisleben Mapping Virtual Organizations in Grids to Peer-to-Peer Networks Kay Dörnemann, Dennis Meier, Markus Mathes, Bernd Freisleben GRAIL - A Tool for Accessing and Instrumenting WSRF-compliant Web Services Thomas Jejkal, Rainer Stotzka, Michael Sutter CBSE1: Services (14.30 – 16.00) – Room I Chair: Ivica Crnkovic Checking Session-Oriented Interactions between Web Services Pavel Parizek, Jiri Adamek Data Model Driven Enterprise Service Bus Interceptors Michael Thonhauser, Christian Kreiner, Egon Teiniker, Gernot Schmoelzer The WebComfort Framework: an Extensible Platform for the Development of Web Applications Joao Saraiva, Alberto Silva SPPI1: Improving Software Management (14.30 – 16.00) – Room H Chair: Klaus Schmid Business Value through Product Line Engineering – A Case Study Devesh Sharma, Aybuke Aurum, Barbara Paech A Method for Balancing Short- and Long-Term Investments: Quality vs. Features Markus Lindgren, Anders Wall, Rikard Land, Christer Norström A Framework for Simulation of Requirements Engineering Processes Martin Höst, Björn Regnell, Christofer Tingström

Special Session: Software Management: SM1 (14.30 – 16.00) – Room 5 Chair: Silvia Abrahao A Meta-model for Assessment of Non-Functional Requirements Size Mohamad Kassab, Maya Daneva, Olga Ormandjieva Evaluation of the Effect of Functional Similarities on Development Effort Ozden Ozcan Top, Seckin Tunalilar, Onur Demirors, IFPUG-COSMIC Statistical Conversion Juan J. Cuadrado-Gallego, Luigi Buglione, Ricardo J. Rejas Muslera, Fernando Machado-Píriz MTTC 2: Multimedia Systems (16.30 – 18.00) - Room L Chair: Markus Hillebrand Multimedia System for Emergency Services over TETRA-DVBT Networks Juan C. Guerri, Román Belda, Ismael de Fez, Francisco Fraile, Víctor Murcia, Pau Arce On Performance of 3GPP Service Triggering Mechanism in IMS Network Xun Zhaoyong, Jianxin Liao, Xiaomin Zhu Business Model Specific Charging Mechanism in Cognitive Radio Isiklar Gulfem, Ayse Basar Bener CBSE 2: Product Lines (16.30 – 18.00) – Christo Angelov InCoME: Integrated Cost Model for Product Line Engineering Jarley Nabrega, Eduardo Almeida, Silvio Meira Managing the Life-cycle of Industrial Automation Systems with Product Line Variability Models Roman Froschauer, Deepak Dhungana, Paul Grunbacher A Case Study in Software Product Lines - The Case of the Mobile Game Domain Leandro Nascimento, Eduardo Almeida, Silvio Meira SPPI 2: Defect Prediction and Prevention (16.30 – 18.00) – Room H Chair: Martin Höst

3344tthh SSEEEEAA SSeessssiioonnss

Euromicro 2008

11

Software Defect Prediction Using Call Graph Based Ranking (CGBR) Framework Gozde Kocak, Burak Turhan, Ayse Bener Towards a Defect Prevention Based Process Improvement Approach Marcos Kalinowski, Guilherme Travassos, David Card Defect Prediction using Combined Product and Project Metrics: A Case Study from the Open Source “Apache” MyFaces Project Family Dindin Wahyudin, Alexander Schatten, Dietmar Winkler, Stefan Biffl, A Min Tjoa Special Session: Software Management: SM2 (16.30 – 18.00) – Room 5 Chair: Maya Daneva Comparing Software Cost Prediction Models by a Visualization Tool Nikolaos Mittas, Lefteris Angelis A Case Study Using Web Objects and COSMIC-FFP for Effort Estimation of Web Applications Filomena Ferrucci, Carmine Gravino, Sergio Di Martino A Proposed Method for Release Planning from Use Case-based Requirements Specification Ákos Szoke Thursday 4 September Special Session: Next Generation Web Computing (NGW) (14.00 – 15.30) – Room L Chair: Konrad Klockner VieCAR – Enabling Self-adaptive Collaboration Services Daniel Schall, Christoph Dorn, Schahram Dustdar, Ignazio Dadduzio Web Browser as an Application Platform Tommi Mikkonen, Antero Taivalsaari, Dan Ingalls, Krzysztof Palacz Evaluation of Task Pattern Use in Web-based Collaborative Engineering Kurt Sandkuhl, Janis Stirna Building Blocks for a Web Programming Language Tuomas Turto

CBSE 3: OSGi (14.00 – 15.30) - Room I Chair: Franck Barbier Enhanced OSGi Bundle Updates to Prevent Runtime Exceptions Premysl Brada Method for resource monitoring of OSGi-based software components Tuukka Miettinen, Daniel Pakkala, Mika Hongisto Service Coroner: A Diagnostic Tool for locating OSGi Stale References Kiev Gama, Didier Donsez, Walter Rudametkin SPPI 3: Agile Software Engineering and Product Lines (14.00 – 15.30) – Room H Chair: Dindin Wahyudin Understanding Decision-Making in Agile Software Development: a Case-study Nils Brede Moe, Aybüke Aurum Investigating UML- and Ontology-Based Approaches for Process Improvement in Developing Agile Multi-Agent Systems Thomas Moser, Klemens Kunz, Kamil Matousek, Dindin Wahyudin Migrating Industrial Systems towards Software Product Lines: Experiences and Observations through Case Studies Hongyu Pei Breivold, Stig Larsson, Rikard Land Special Session: Software Management: SM3 (14.00 – 15.30) – Room 5 Chair: Lefteris Angelis Complementing Measurements and Real Options Concepts to Support Inter-iteration Decision-Making in Agile Projects Zornitza Racheva, Maya Daneva, Luigi Buglione A Metamodeling Approach to Estimate Software Size from Requirements Specifications Silvia Abrahao, Emilio Insfran, Outlining a Risk-Driven Agile Development Model Jaana Nyfjord, Mira Kajko-Mattsson

Euromicro 2008

12

CBSE 4: Embedded Systems (16.00 – 17.00) – Room L Chair: Kung-Kiu Lau Reconfigurable State Machine Components for Embedded Applications Christo Angelov, Yu Guo, Ke Xu, Krzysztof Sierszecki Introducing Component Based Software Engineering at an Embedded Systems Sub-Contractor Mikael Akerholm, Kristian Sandstroem, Ivica Crnkovic SPPI 4: Requirements Prioritization and Portfolio Management (16.00 – 17.00) – Room I Chair: Maya Daneva Requirements Prioritization Based on Benefit and Cost Prediction: A Method Classification Framework Maya Daneva, Andrea Herrmann An Empirical Study into Current Practices and Challenges in IT Project Portfolio Management Egon Gleisberg, Hendril Zondag, Michel R.V. Chaudron Special Session: Quality and Service-Oriented Applications (16.00 – 17.00) – Room H Chair: Raffaela Mirandola Service Consolidation with End-to-End Response Time Constraints Jonatha Anselmi, Edoardo Amaldi, Paolo Cremonesi Iterative Service Orchestration based on Dependability Attributes Joachim Götze, Jochen Müller, Paul Müller Friday 5 September CBSE & SOA PANEL: SOA and Quality Assurance (11.30 – 13.00) – Room L SPPI 5: Evaluation Methods for Products and Processes (11.30 – 13.00) – Room I Chair: Stefan Biffl

The Role of Experience in Software Testing Practice Armin Beer, Rudolf Ramler Evaluating RUP Software Development Processes Through Visualization of Effort Distribution Werner Heijstek, Michel R. V. Chaudron Towards Efficient Software Component Evaluation Rikard Land, Alexandre Alvaro, Ivica Crnkovic Special Session: Software Architectures for Pervasive Systems (11.30 – 13.00) – Room H Chair: Nenad Medvidovic A Flexible Infrastructure for Data Propagation in Heterogeneous Smart Item Environments Falk Brauer, Daniel Barisic, Mario Neugebauer and Guido Stromberg. Vimoware - a Toolkit for Mobile Web Services and Collaborative Computing Hong-Linh Truong, Lukasz Juszczyk, Shariq Bashir, Atif Manzoor and Schahram Dustdar SAIL: a Sensor Abstraction and Integration Layer for Context Aware Architectures Stefano Lenzi, Francesco Furfari, Stefano Chessa and Michele Girolami CBSE 5: Component Models (14.30 – 16.00) – Room L Chair: Christian Kreiner Component design based on model executability Franck Barbier, Eric Cariou A Compositional Approach to Active and Passive Components Kung-Kiu Lau, Ioannis Ntalamagkas A Fault-tolerance Framework for Distributed Component Systems Brahim Hamid, Patrick Vanuxeem, Ansgar Radermacher, Agnes Lanusse, Sebastien Gerard Special Session: Distributed Embedded Software Systems (14.30 – 16.00) – Room I Chair: Horst Wedde A Software Framework for Hard Real-Time Distributed Embedded Systems, C. Angelov, K. Sierszecki, Fenf Zhou

Euromicro 2008

13

Formal Analysis of a Distributed Fault Tolerant Clock Synchronization Algorithm for Automotive Communication Systems, Bo Zhang Distributed Embedded Real-Time Systems and Beyond: A Vision of Future Road Vehicle Management H.F. Wedde, S. Lehnhoff, C. Rehtanz, O. Krause Special Session: Quality and Service-Oriented Applications (14.30 – 16.00) – Dean’s hall (Sala di presidenza) Chair: Markus Hillebrand

Let The Puppets Move! Automated Testbed Generation for Service-oriented Mobile Applications Guglielmo De Angelis, Antonia Bertolino, Francesca Lonetti, Antonino Sabetta, SEMF - Service Evolution Management Framework Martin Treiber, Hong-Linh Truong, Schahram Dustdar BPEL Workflows Combining Standard OGC Web Services and Grid-enabled OGC Web Services Tino Fleuren, Paul Müller

Euromicro 2008

14

September, 3rd

WE1.1: Prospective Aspects of Networks-on-Chip Chair – S. Saponara – Room P (14.00 – 15.30) Large Scale On-Chip Networks : An Accurate Multi-FPGA Emulation Platform Kouadri-Mostefaoui, Abdellah-Medjadji, Benaoumeur Senouci, and Frederic Petrot Network Interface Sharing Techniques for Area Optimized NoC Architectures Alberto Ferrante, Simone Medardoni, and Davide Bertozzi Efficient Application Specific Routing Algorithms for NoC Systems utilizing Partially Faulty Links Dario Frazzetta, Giuseppe Dimartino, Maurizio Palesi, Shashi Kumar, and Vincenzo Catania WE1.2: NEWCOM++: Flexible Radio Digital Design Chair – D. Noguet – Room O (14.00 – 15.30) Flexible Baseband Architectures for Future Wireless Systems Najam-ul-Islam Muhammad, Rizwan Rasheed, Renaud Pacalet, Raymond Knopp, and Karim Khalfallah A Lightweight Operating Environment for Next Generation Cognitive Radios Ismael Gómez, Vuk Marojevic, Jose Salazar, and Antoni Gelonch On Design a High Speed Sigma Delta DAC Modulator for a Digital Communication Transceiver on Chip Ruimin Huang, Niklas Lotze, and Yiannos Manoli A Reconfigurable LFSR for Tri-standard SDR Transceiver, Architecture and Complexity Analysis Laurent Alaus, Dominique Noguet, and Jacques Palicot WE1.3: Fault Tolerance in Digital System Design – I Chair – G. Fuchs – Room N (14.00 – 15.30)

Synthesis of Flexible Fault-Tolerant Schedules with Preemption for Mixed Soft and Hard Real-Time Systems Viacheslav Izosimov, Paul Pop, Petru Eles, and Zebo Peng Digital Systems Architectures Based on On-line Checkers Martin Straka, Zdenek Kotasek, and Jan Winter Fault Models and Injection Strategies in SystemC Specifications Cristiana Bolchini, Antonio Miele, and Donatella Sciuto WE1.4: System-Level Energy Optimization of Embedded Software Chair – E. Villar – Room M (14.00 – 15.30) Temperature and Leakage Aware Power Control for Embedded Streaming Applications Andrea Alimonda, Andrea Acquaviva, and Salvatore Carta Source-Level Estimation of Energy Consumption and Execution Time of Embedded Software Carlo Brandolese Embedded Multicore Implementation of a H.264 Decoder with Power Management Considerations S. Bilavarn, C. Belleudy, M. Auguin, T. Dupont, and A.M. Fouilliart WE P: Poster Session Chair – H. Kubatova – Room P (15.30 – 16.30) A Novel Digital Ultrasound System for Experimental Research Activities Luca Bassi, Enrico Boni, Andrea Cellai, Alessandro Dallai, Francesco Guidi, Stefano Ricci and Piero Tortoli A Parallel and Modular Architecture for 802.16e LDPC Codes François Charot, Christophe Wolinski, Nicolas Fau and François Hamon WirelessUSB – Performance Analysis of an Embedded System in a Peer-to-peer Application Stefano Recchi, Maurizio Persichitti and Massimo Conti Design of a Distributed Embedded System for Domotic Applications Francesco Sechi, Luca Fanucci, Stefano Luschi, Simone Perini and Matteo Madesani

1111tthh DDSSDD SSeessssiioonnss

Euromicro 2008

15

An Embedded Acquisition System for Remote Monitoring of Tire Status in F1 Race Cars through Thermal Images Giovanni Danese, Mauro Giachero, Francesco Leporati, Nelson Nazzicari and Michele Nobis SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation Ayse Neslin Ismailoglu and Murat Askar Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration Gianluca Palermo, Cristina Silvano and Vittorio Zaccaria Design of a High Performance Traffic Generator on Network Processor Gianni Antichi, Andrea Di Pietro, Domenico Ficara, Stefano Giordano, Gregorio Procissi and Fabio Vitucci CART: Communication-Aware Routing Technique for Application-Specific NoCs Rafael Tornero, Juan Manuel Orduña, Andrés Mejía, José Flich and José Duato LIME: A Low-latency and Low-complexity On-chip Mesochronous Link with Integrated Flow Control Sergio Saponara, Francesco Vitullo, Riccardo Locatellli, Philippe Teninge, Marcello Coppola and Luca Fanucci An Analysis of Connectivity and Yield for 2D Mesh Based NoC with Interconnect Router Failures Thomas J Sødring, Åshild Grønstad Solheim, Tor Skeie and Sven-Arne Reinemo WE2.1: MPSOC and Interconnects Chair – S. Saponara – Room P (16.30 – 18.00) A Network-on-Chip Channel Allocator for Run-Time Task Scheduling in Multi-Processor System-on-Chips Markus Winter and Gerhard P. Fettweis A Network on Chip Architecture for Heterogeneous Traffic Support with Non-Exclusive Dual-Mode Switching Simone Secchi, Francesca Palumbo, Danilo Pani, and Luigi Raffo A Look-Ahead Task Management Unit for Embedded Multi-Core Architectures Magnus Själander, Andrei Terechko, and Marc Duranton

A Modular Approach to Model Heterogeneous MPSoC at Cycle Level Matteo Monchiero, Gianluca Palermo, Cristina Silvano, and Oreste Villa Performance and Timing Yield Enhancement using Highway-on-Chip Planning Ali Jahanian and Morteza Saheb Zamani WE2.2: Video and Image Processing Chair – T. Sasao – Room O (16.30 – 18.00) Application Specific Programmable IP Core for Motion Estimation: Technology Comparison Targeting Efficient Embedded Co-Processing Units Nuno Sebastiao, Tiago Dias, Nuno Roma, Paulo Flores, and Leonel Sousa Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, Arnaldo Azevedo, and Ben Juurlink Design of a Two Dimensional PRSI Image Processor Theja Tulabandhula, Amit Patra, and Nirmal B. Chakrabarti A Hardware Design for Camera-Based Power Management of Computer Monitor Vasily Moshnyaga, Koji Hashimoto, and Tadashi Suetsugu WE2.3: Fault Tolerance in Digital System Design – II Chair – Z. Kotasèk – Room N (16.30 – 18.00) A Low-Cost Cache Coherence Verification Method for Snooping Systems Demid Borodin and B.H.H. (Ben) Juurlink Dependability Evaluation of Real Railway Interlocking Device Radek Dobias, Jan Konarski, and Hana Kubatova Formulating MITF for a Multicore Processor with SEU Tolerance Toshimasa Funaki and Toshinori Sato Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip Gottfried Fuchs, Matthias Függer, Ulrich Schmid, and Andreas Steininger

Euromicro 2008

16

WE2.4: Power Issues Chair – A. Acquaviva – Room M (16.30 – 18.00) Analysis of Power Management Strategies for a Large-Scale SoC Platform in 65nm Technology Andrea Marongiu, Luca Benini, Andrea Acquaviva, and Andrea Bartolini Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis Alberto A. Del Barrio, Maria C. Molina, Jose M. Mendias, Esther Andres, and Roman Hermida Power Optimization of Asynchronous Circuits through Simultaneous Vdd and Vth Assignment and Template Sizing Behnam Ghavami, Mehrshad Khosraviani, and Hossein Pedram Why to Use Dual-Vt, If Single-Vt Serves the Purpose Better under Process Parameter Variations? Sudip Roy and Ajit Pal Reimbursing the Handshake Overhead of Asynchronous Circuits using Compiler Pre-Synthesis Optimizations Sharareh ZamanZadeh, Mohammad Mirza-Aghatabar, Mehrdad Najibi, Hossein Pedram, and Abolghasem Sadeghi September, 4th TH1.1: Design, Modeling and Verification of Cache and Cache-based Systems Leveraging Data Chair – P. Foglia – Room P (14.00 – 15.30) Leveraging Data Promotion for Low Power D-NUCA Caches Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete, and Per Stenström Revisiting the Cache Effect on Multicore Multithreaded Network Processors Zhen Liu, Jia Yu, Xiaojun Wang, Bin Liu, and Laxmi Bhuyan Using Empirical Science to Engineer Systems: Optimizing Cache for Power and Performance Ahmed Abdallah, Wayne Wolf, and Graham Hellestrand Reducing Leakage through Filter Cache Roberto Giorgi and Paolo Bennati

TH1.2: FPGA and Reconfigurable Architectures – I Chair – M. Mordonini – Room O (14.00 – 15.30) Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, and Frank Hannig Hardware/Software FPGA-based Network Emulator for High-speed On-board Communications Sergio Saponara, Nicola E. L’Insalata, Tony Bacchillone, Esa Petri, Iacopo Del Corona, and Luca Fanucci Virtual Scan Chains for Online Testing of FPGA-based Embedded Systems Alessandro Cilardo, Nicola Mazzocca, and Luigi Coppolino Pin-limited Frequency Downscaler AHB Bridge for ASIC to FPGA Communication Tommaso Cecchini, Francesco Sechi, Luca Bacciarelli, Luca Mostardini, Francesco Battini, Luca Fanucci, and Marco De Marinis Implementation of Self-Timed Circuits onto FPGAs Using Commercial Tools Maurizio Tranchero and Leonardo M. Reyneri TH1.3: Applications of Digital Systems Chair – P. Kitsos – Room N (14.00 – 15.30) PUFFIN: A Novel Compact Block Cipher Targeted to Embedded Digital Systems Huiju Cheng, Howard M. Heys, and Cheng Wang Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism Rainer Schaffer, Renate Merker, Frank Hannig, and Jürgen Teich Digital Nuclear Magnetic Resonance Acquisition Channel Paola Baldrighi, Marco Castellano, Carla Vacchi, Davide Canina, Paolo Golzi, and Gianni Ferrante Fast FPGA-based Trigger and Data Acquisition System for the CERN Experiment NA62: Architecture and Algorithms G. Collazuol, S. Galeotti, E. Imbergamo, G. Lamanna, G. Magazzu, and M. Sozzi

Euromicro 2008

17

TH1.4: Synthesis Chair A. Zemva – Room M (14.00 – 15.30) Design Flow of Dynamically-Allocated Data Types in Embedded Applications Based on Elitist Evolutionary Computation Optimization José L. Risco-Martín, David Atienza, J. Ignacio Hidalgo, and Juan Lanchares Exploiting Internal Operation Patterns during the High-Level Synthesis of Time-Constrained Circuits Pedro L. García-Repetto, María C. Molina, Rafael Ruiz-Sautua, and Guillermo Botella Multi-Objective Statistical Yield Enhancement using Evolutionary Algorithm Minoo Mirsaeedi, Morteza Saheb Zamani, and Mehdi Saeedi Technology Library Modelling for Information-driven Circuit Synthesis Lech Jóźwiak and Szymon Biegański TH.P: Poster session Chair G. Danese – Room P (15.30 - 16.30) A Fast Transformation-Based Synthesis Algorithm for Reversible Circuits Ehsan Khish Ardestani, Morteza Saheb Zamani and Mehdi Sedighi High Performance Computing for Embedded System Design: A Case Study Vincenzo Catania, Gianmarco De Francisci Morales, Alessandro Giuseppe Di Nuovo, Maurizio Palesi, and Davide Patti Quantum-Dot Cellular Automata Serial Comparator Blaz Lampreht, Luka Stepancic, Igor Vizec, Bostjan Zankar, Miha Mraz, Iztok Lebar Bajec and Primoz Pecar Co-design and Implementation of the H.264/AVC Motion Estimation Algorithm Using Co-simulation Roderick Colenbrander, Arjen Damstra, Wim Korevaar, Kees Verhaar and Albert Molderink Functional Verification of the USB Host Controller Primoz Puhar and Andrej Zemva Exploring ISS Abstractions for Embedded Software Design Sébastien Fontaine, Luc Filion, and Guy Bois An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA Petr Fišer, Pavel Kubalík and Hana Kubátová

Experimental SEU Impact on Digital Design Implemented in FPGAs Jiri Kvasnicka, Pavel Kubalik, and Hana Kubatova Concurrent Error Detection for a Network of Combinational Logic Implemented with Memory Embedded in FPGAs Andrzej Krasniewski Hierarchical Analysis of Short Defects between Metal Lines in CMOS IC Witold A. Pleskacz, Maksim Jenihhin, Jaan Raik, Michal Rakowski, Raimund Ubar and Wieslaw Kuzmicz TH.A: Altera speech Chair G. Danese – Room P (16.30 - 17.00) Reducing Power in Embedded Systems by Adding HW Accelerators A. Montanaro September, 5th

FR1.1: Planning and Optimization of Sensor Network Systems – I Chair W. Fornaciari – Room P (11.30 – 13.00) A Novel Technique for Low Latency Data Gathering in Wireless Sensor Networks Itziar Marín, Aitzol Zuloaga, and Iker Losada A Solar-powered Video Sensor Node for Energy Efficient Multimodal Surveillance Michele Magno, Davide Brunelli, Piero Zappi, and Luca Benini Exploiting WSN for Audio Surveillance Applications: The VoWSN Approach Roberto Alesii, Fabio Graziosi, Luigi Pomante, and Claudia Rinaldi Code Generation from Statecharts: Simulation of Wireless Sensor Networks Marcello Mura and Maria Giovanna Sami FR1.2: Hardware Checking Chair C. Wolinski – Room O (11.30 – 13.00) Improving SER Immunity of Combinational Logic Using Combinations of Spatial and Temporal Checking Tsau-Shuan Wu, Cengiz Alkan, and Tom W. Chen

Euromicro 2008

18

Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking Robert Wille, Görschwin Fey, Marc Messing, Gerhard Angst, Lothar Linhard, and Rolf Drechsler How to Live with Uncertainties: Exploiting the Performance Benefits of Self-Timed Logic In Synchronous Design G. Paci, A. Nackaerts, F. Catthoor, L. Benini, and P. Marchal An Efficient Non-Tree Clock Routing Algorithm for Reducing Delay Uncertainty Morteza Saheb Zamani, Maryam Taajobian, and Mehdi Saeedi FR1.3: FPGA and Reconfigurable Architectures – II Chair F. Leporati – Room N (11.30 – 13.00) VLSI Implementation of a Cryptography-Oriented Reconfigurable Array Scott Miller, Ambrose Chu, Mihai Sima, and Michael McGuire A New Array Fabric for Coarse-Grained Reconfigurable Architecture Yoonjin Kim and Rabi N. Mahapatra Power/Area Analysis of a FPGA-Based Open-Source Processor using Partial Dynamic Reconfiguration Izhar Zaidi, Atukem Nabina, C.N. Canagarajah, and Jose Nunez-Yanez System-on-an-FPGA Design for Real-time Particle Track Recognition and Reconstruction in Physics Experiments Ming Liu, Wolfgang Kuehn, Zhonghai Lu, and Axel Jantsch FR1.4: Design Methodologies Chair D. Tabak – Room M (11.30 – 13.00) IRIS: A Firmware Design Methodology for SIMD Architectures Jan Jacobs, Leroy van Engelen, Jan Kuper, Gerard J.M. Smit, and Rui Dai Measurement, Analysis and Modeling of RTOS System Calls Timing Carlo Brandolese and William Fornaciari Development of Functional Delay Tests Eduardas Bareiša, Vacius Jusas, Kestutis Motiejunas, and Rimantas Šeinauskas

Application Analysis for Parallel Processing Muhammad Rashid, Damien Picard, and Bernard Pottier FR2.1: Planning and Optimization of Sensor Network Systems – II Chair W. Fornaciari – Room M (14.30 – 16.00) Ultra-Low Power Passive UHF RFID for Wireless Sensor Networks R. Morales–Ramos, A. Vaz, D. Pardo, and R. Berenguer Models and Tradeoffs in WSN System-Level Design Simone Campanoni and William Fornaciari Pearson–based Analysis of Positioning Error Distribution in Wireless Sensor Networks Stefano Tennina, Marco Di Renzo, Fabio Graziosi, and Fortunato Santucci On the Need for Passive Monitoring in Sensor Networks Abdalkarim Awad, Rodrigo Nebel, Reinhard German, and Falko Dressler FR2.2: Dependability and Testing of Digital Systems – I Chair H. Kubatova – Room O (14.30 – 16.00) Efficient Test Pattern Compression Method Using Hard Fault Preferring Jiri Jenicek Digital Implementation of a BIST Method based on Binary Observations C. Le Blanc, E. Colinet, J. Juillard, and L. Anghel Generating RTL Synthesizable Code from Behavioral Testbenches for Hardware-Accelerated Verification Mohammad Reza Kakoee, Mohammad Riazati, and Siamak Mohammadi Power Conscious RTL Test Scheduling Jaroslav Skarvada, Zdenek Kotasek, and Tomas Herrman

Euromicro 2008

19

FR2.3: Digital Signal Processing – I Chair K. Kuchcinski – Room N (14.30 – 16.00) An FPGA Implementation of a Quadruple-Based Multiplier for 4D Clifford Algebra S. Franchini, A. Gentile, F. Sorbello, G. Vassallo, and S. Vitabile On the Use of Diminished-1 Adders for Weighted Modulo 2n + 1 Arithmetic Components H.T. Vergos and D. Bakalis A New Rounding Algorithm for Variable Latency Division and Square Root Implementations D. Piso and J.D. Bruguera An RNS based Specific Processor for Computing the Minimum Sum-of-Absolute-Differences Pedro Miguens Matutino and Leonel Sousa FR2.4: System Synthesis Chair P. Kent – Room 5 (14.30 – 16.00) Logic Transformations by Multiple Wire Network Addition Enrique San Millán, Luis A. Entrena, and José A. Espejo On Projecting Sums of Products Anna Bernasconi, Valentina Ciriani, and Roberto Cordone On Lookup Table Cascade-Based Realizations of Arbiters Petr Mikusek and Vaclav Dvorak FR.P: Poster Session Chair G. Conte – Room L (16.00 – 17.00) Architecture of a Power-Gated Wireless Sensor Node Goran Panic, Daniel Dietterle and Zoran Stamenkovic Transaction Level Modeling and Performance Analysis in SystemC of IEEE 802.15.4 Wireless Standard Alessandro Mignogna, Massimo Conti, Massimiliano D'Angelo, Massimo Baleani and Alberto Ferrari A Hardware Implementation of CURUPIRA Block Cipher for Wireless Sensors Paris Kitsos, George Selimis, Odysseas Koufopavlou and Athanassios Skodras

A Variable Length Vector Pipeline Architecture Design Methodology Takashi Kambe, and Makoto Saituji Cellflow: a Parallel Application Development Environment with Run-Time Support for the Cell BE Processor Martino Ruggiero, Michele Lombardi, Michela Milano and Luca Benini Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits Enrico Macii, Leticia Bolzani, Andrea Calimera, Alberto Macii and Massimo Poncino Automatic Identification of Concurrency in Handel-C Joseph Charles Libby, Farnaz Gharibian, and Kenneth Kent A Scheduling Postprocessor to Exploit Morphable RTL Components During High-Level Synthesis George Economakos and Sotiris Xydis Implementation of Microprogrammed Hard Disk Drive Servo Sequencer Paola Baldrighi, Marco Maurizio Maggi, Marco Castellano, Carla Vacchi, Davide Crespi and Piero Bonifacino Evaluation and Improvement of Quantum Synthesis Algorithms based on a Thorough Set of Metrics Mehdi Saeedi, Naser MohammadZadeh, Mehdi Sedighi and Morteza Saheb Zamani FR3.1: Wireless Systems Chair M. Conti – Room M (17.00 – 18.30) A Wireless Sensor Platform for Assistive Technology Applications Valentina Bianchi, Ferdinando Grossi, Guido Matrella, Ilaria De Munari, and Paolo Ciampolini Reliable Data Transmission over Simple Wireless Channels: A Case Study Pawel Gburzynski, Bozena Kaminska, and Ashikur Rahman A Long-term Wearable Vital Signs Monitoring System using BSN D.G. Guo, Francis E.H. Tay, L. Xu, L.M. Yu, M.N. Nyan, F.W. Chong, K.L. Yap, and B. Xu Design of an Ultra Low-Power RFID Baseband Processor Featuring an AES Cryptography Engine Andrea Ricci, Matteo Grisanti, Ilaria De Munari, and Paolo Ciampolini

Euromicro 2008

20

FR3.2: Dependability and Testing of Digital Systems – II Chair Z. Kotasèk – Room O (17.00 – 18.30) Architectural Synthesis with Control Data Flow Extraction toward an Asynchronous CAD Tool Morteza Damavandpeyma and Siamak Mohammadi TASTE: Testability Analysis Engine and Opened Libraries for Digital Data Path Josef Strnadel Embedded Diagnostic Logic Test Exploiting Regularity H.T. Vierhaus and R. Kothe On the Complexity of Error Detection Functions for Redundant Residue Number Systems Tsutomu Sasao and Yukihiro Iguchi FR3.3: Digital Signal Processing – II Chair G. Conte – Room N (17.00 – 18.30) Programmable Numerical Function Generators for Two-Variable Functions Shinobu Nagayama, Jon T. Butler, and Tsutomu Sasao SIMD Enhancements for a Hough Transform Implementation Francisco J. Jaime, Javier Hormigo, Julio Villalba, and Emilio L. Zapata Hardware-oriented Adaptation of a Particle Swarm Optimization Algorithm for Object Detection Shahid Mehmood, Stefano Cagnoni, Monica Mordonini, and Guido Matrella FR3.4: Parallel Architectures Chair F. Leporati – Room 5 (17.00 – 18.30) Acceleration of Smith-Waterman using Recursive Variable Expansion Zubair Nawaz, Mudassir Shabbir, Zaid Al-Ars, and Koen Bertels Maximizing Resource Utilization by Slicing of Superscalar Architecture Shruti Patil and Venkatesan Muthukumar

Euromicro 2008

21

SSEEEEAA WWiiPP SSeessssiioonn

Software Engineering and Advanced Applications I Friday 5th September, 14.30 - Room H Chair Konrad Klockner

Concepts for Flexible Component Integration for Product Lines Holger Eichelberger, Klaus Schmid Operationalizing Project Controlling Edward Fischer A Proposed Method to Project Planning from UML Models Ákos Szőke Process Improvement Framework for Software Product Lines Sathya Ganesha, Muthu Ramachandran Risk Assessment in Software Development Projects Jitka Kreslíková, Šárka Květoňová Software Reliability Estimation for Component-based Systems by Evaluation of Operational Experience gained with Components S. Söhnlein, F. Saglietti Psychological Design Factors in Web Usability Mushtaq Raza Translation regular expressions Vít Fábera, Vlastimil Jáneš, Mária Jánešová Recognizing of Language by an Acceptor or a Petri Net Josef Bokr, Vlastimil Jáneš, Mária Jánešová SaferTIP -- A Safety Extension to the Test Improvement Profile (TIP) Sergey Vinogradov 16.00 Coffee Break

Software Engineering and Advanced Applications II Friday 5th September, 17.00 - Room H Chair Konrad Klockner MAC Sublayer in IEEE 802.11 using DCF and PCF Sweta Verma, Sanjay Singh A Truly Jitter-Free Real-Time Kernel Nicolae Marian, Peng Jiang A Web-based Data-sharing Scheme in Peer-to-Peer File-transfer System for Collaborated CAE Min-hwan Ok, Hyun-seung Jung SEMIC.EU - An Open Repository for Interoperability Specifications Helmut Adametz, Sören Bittins, Jan Gottschick EUFORIA --- Simulation Environment for ITER Fusion Research Rainer Stotzka, Enrique Morales-Ramos, Mats Aspnäs, Jan Aström, Miguel Cárdenas–Montes, Francisco Castejón, José María Cela, David P. Coster, Antonio Gómez-Iglesias, Bernard Guillerminet, Ahmad Hammad, Marcus Hardt, Leon Kos, Daniela Piccioni–Koch, Isabel Campos Plasencia, Marcin Plociennik, Gevorg Poghosyan, Lorna Smith, Eric Sonnendrücker, Pär Strand, Jan Westerholm Using MUSICXML in Real-Time Applications Joachim Ganseman, Paul Scheunders, Wim D’haes

Euromicro 2008

22

DDSSDD WWiiPP SSeessssiioonn Digital System Design I Friday 5th September, 14.30 pm – Room P Chair Erwin Grosspietsch

Evaluating and Improving an OpenMP-based Circuit Design Tool Timothy F. Beatty, Kenneth B. Kent, Eric E. Aubanel NoC-based MPSoCs on FPGA - a Tool for Design Automation Slobodan Lukovic, Leandro Fiorin, Gianluca Palermo End–To–End Statistical Process/Device/Circuit/System Design А.Belous, V. Nelayev, V. Sjakerskii Towards a Hybrid Methodology for Reliability Assessment of Quantum Circuits Mihai Udrescu, Oana Boncalo, Lucian Prodan, Mircea Vladutiu, Alexandru Amaricai Floating Point Divide-Add Fused Unit for Newton's Interval Method Alexandru Amaricai, Mircea Vladutiu, Lucian Prodan, Mihai Udrescu, Oana Boncalo A Novel Methodology for the Construction of Fault Trees from MATLAB-Simulink System Model F. Tajarrod, G. Latif-Shabgahi Architecture of precise and time efficient implementation of Householder algorithm for face recognition on FPGA I. Sajid, M.M. Ahmed, I. Taj FPGA Implementation of an MPSoC for Driver Assistance System Based on Multiple Target Tracking with Radar Jehangir Khan, Smail Niar, Atika Menhaj, Yassin Elhillali 16.00 Coffee Break

Digital System Design II Friday 5th September, 17.00 pm – Room P Chair Erwin Grosspietsch

On-Chip Networks: Impact on the Performance of NUCA Caches Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete Single-Rail Globally Asynchronous Locally Synchronous Network-on-Chip Design Katsunori Tanaka, Yuichi Nakamura, Joao Otero, Marcello Lajolo Fast Memory Design Space Exploration Reusing Past Simulation Results Takatsugu Ono, Koji Inoue, Kazuaki Murakami A System-Level Co-Design Methodology for DBMS-Specific Architectures Luigi Pomante Demonstrator of 3 axis gyroscope/accelerometer using embedded 3D demo architecture Francesco Sechi, Luca Fanucci, Ermanno Maci, Adolfo Giambastiani, Alessandro Rocchi, Marco De Marinis

Euromicro 2008

23

VVeennuuee

Conference site The location is in the “Auditorium - Plesso Polifunzionale” of the “Area delle Scienze” and in the adjacent School of Engineering. ( V.le G.P. Usberti, Campus Universitario, Parma)

Centro S. Elisabetta

Lectures hall

Auditorium Bus stop. No 7-14 e “Campus express”

Lunchroom

Euromicro 2008

24

Plan of the Venue - School of Engineering

HALL A

HALL B Room P

Room O

Auditorium

Bus stop

Lab 4

Room N Room

M

Room “Presidenza”

Room L Room

I

Room H

Auditorium Room 5

Euromicro 2008

25

How to reach the Campus

• Coming from Milan (A1 motorway), exit at Parma Ovest, take the Via Emilia Ovest, then

turn right onto Tangenziale Sud (Campus, Langhirano direction). Coming from Bologna or from Verona (A1 motorway), take Parma exit, turn right onto Tangenziale Nord, then follow the indications to La Spezia and Campus, Langhirano. Then you have to follow the direction for “Parco Area delle Scienza, Campus Universitario”. It will take about 20-30 minutes in regular traffic conditions.

• If you arrive by plane at Giuseppe Verdi airport (airport code: PMF), taxi is the only reasonable choice. It will take about 20 minutes in regular traffic conditions.

• The other closest airports are located in Milano and Bologna. It is possible to reach Parma by train.

• Upon arriving at the Parma railway station, take the n. 7 or 14 bus (direction "Campus - Università") and get off at the end of the ride. It will take about 20-25 minutes in regular traffic conditions.

Once in the University Campus, look for the “Auditorium - Plesso Polifunzionale” or “Facoltà di Ingegneria – Sede Didattica”.

Euromicro 2008

26

LLooccaall FFaacciilliittiieess

Coffee breaks Coffee breaks will be held in the Auditorium aftre the Keynote Sessions in the morning and in the hall of the school of Engineering (hall B in the map) in the afternoon. Lunch Lunches will be served in the lunchroom adjacent the Auditorium. Each participant has to show the right ticket at the cash. It is possible to obtain vegetable meals for those people observing religious diets. For particular cases (i. e. medical diets) please contact the Registration desk. Social Program The social program will consist of a Welcome Cocktail on Wednesday September 3rd at 7.30 pm and of the Social Dinner on Thursday September 4th at 8.30 pm. Please do not forget your invitation ticket, received at the Registration. Accompanying persons could attend the two events by paying 30€ and 60€ respectively. Internet Access Wireless Internet access is available (free of charge) for all Euromicro participants. You have to activate wireless connection and use the login/password you received at the registration desk. Computer Room It is possible to use the computers of Lab 4 as Internet points. The username is printed on each computer, while the password is “noncopiare”. Registration The registration desk is located in the hall of the auditorium. It will be open for registration and general information on: Wednesday 8:30 -12:30 14.00-18.00 Thursday 8:30 -12:30 14.00-17.00 Friday 8:30 -13:00 14.00-18.00 The tutorial registration desk is located in the hall B of school of Engineering and it is open on Tuesday 8:30-13:00; 14:30-16:00

Euromicro 2008

27

SSoocciiaall EEvveennttss

Welcome cocktail September 3, 19:30: the Welcome cocktail will be held in the “Salone delle Feste” of the “Palazzo Sanvitale” (1700-1800) remembering the golden age of Parma which culminated with the rule of Maria Luigia (Napoleon’s wife), when the city was called the ‘petite capitale’ for the high level of its cultural life. The Palace is located near both the square of Municipio (Piazza Garibaldi) and the famous religious square (Piazza Duomo).

Social program: art and music September 4, 17.30-18:30: after a brief stop in the most famous and uniquely harmonious square of the Romanic Cathedral, we will reach the Cusani Palace (Palazzo della musica) where we will attend a concert by Corale Verdi a world famous chorus specialised in opera pieces and performing since in 1905 with the best opera singers.

Social Dinner

September 4, 20:30: After the concert we will leave Parma to reach the Road of Culatello which runs through the villages along the Po river. After an exclusive visit to the cellars (elegant dress is not required) where Luciano and Massimo Spigaroli (Massimo is the President of the Culatello Consortium) make their cheese and salami age, we will have a traditional “parmesan” dinner at: http://www.acpallavicina.com/cavallino/new/index.htm

Euromicro 2008

28

How to reach the social dinner restaurant

Ristorante “AL CAVALLINO BIANCO” s.r.l. Via Sbrisi, 2 - 43010 Polesine Parmense (PR)-ITALY

Satellite Navigator Coordinates : 45.0208 North 10.0913 East From Highway A1 (Milan - Bologna) Exit: Fidenza Direction: Soragna - Zibello - Polesine Parmense From Highway A1 (Milan - Bologna) Exit: Fiorenzuola Direction: Cortemaggiore - Busseto - Polesine Parmense

Local map

Euromicro 2008

29

TTrraannssppoorrttss aanndd ccoonnnneeccttiioonnss Parma is located in northern Italy, in the region Emilia-Romagna. Its strategic position allows to reach in a short time several towns, such as Venice, Ferrara, Verona, Turin as well as the coast of Liguria and the coast of Romagna. Once you get to town, it is quite simple to travel within it. Parma can boast good public transports both in the urban area and in the surroundings. Tep, the local transport company, provides extensive daytime and night service covering the whole area, from town to province. Access to the two areas called Isole ambientali is allowed only to residents and shopkeepers holding the specially provided permit. Besides, there are a few Restricted Traffic Areas or ZTL where access, from 7.30am to 8.30pm, is only allowed to residents and shopkeepers holding the specially provided permit and tourists directed to the hotels. In all other areas parking is allowed in the blue lines: spaces for prepaid parking actually marked by the color blue. It is possible to pay at the parking meters scattered in the area or to buy a special prepaid ticket. Parking in the blue lines is free for all cars with a foreign plate. The most convenient way to reach the historical centre is by leaving the car in one of the pay parking, at short walking distance from the centre: Goito Parking, Toschi Parking, Duc Parking, Via Abbeveratoia Parking, Central Parking Repubblica and the Dus Parking. Another option is leaving the car in one of the exchange parking, located right out of the city, then reach the historical centre by shuttle bus.

Euromicro 2008

30

Parma Taxi Service Radiotaxi headquarter T el. +39 0521252562 Rates: starting rate euros 2,60 following rates euros 1,20 each km Extras: 30% night duty from 10.00pm to 6.00am 10% on festivities euros 0,30 for heavy luggage transport euros 0,55 for skis and pets transport euros 0,65 for calls from home euros 20,00 per hour for waiting while on duty Shared taxi The Shared taxi is an alternative and less expensive way of transport in Parma. Now more than one passenger undertaking separate trips can jointly use the same vehicle for their journey. Even people who are not acquainted but whose journeys coincide, can catch the same taxi and get off along or at the end of the journey. The service is only available on taxis carrying the logo Taxi collettivo. The minimum number of passengers required is 2, the maximum is 4. Shared taxi ranks: Railway station tel. 0521771077 Piazza Garibaldi tel. 0521233101 How it works: Same departure point, same destination; same departure point, passengers get off in different places along the way. The driver might suggest the shortest way. Rates and discounts: Discount on usual rates can rise up to 70%, depending on the kind of journey and number of passengers. Discount for one destination journeys: 2 passengers 40% discount each 3 passengers 60% discount each 2 passengers 70% discount each In case of different destinations, along the same way, the discount will be the following: 70% discount for the first passengers getting off the taxi 70% discount on the first part of the journey and 60% for the remaining part of the journey for the second passenger 70% discount on the first part of the journey, 60% on the second part and 40% on the remaining part of the journey for the third passenger 70% discount on the first part of the journey, 60% on the second part, 40% on the third part and 10% on the remaining part of the journey

Euromicro 2008

31

Parma Bus Service Tep bus lines in town Bus run in town during daytime from 6.30am to 8.00pm. Two night lines run from 8.00pm to 10.00pm. Lines 7,14, 21 connect the railway station (in the historical centre of the town) and the Campus. You can buy the ticket at the station or in every newspaper kiosk or tobacco shop or straight on the bus with a little over price. Punto Tep Piazza Ghiaia, 41/a Help desk providing info, parking maps, selling tickets and season tickets, receiving complaints and suggestions from Monday to Saturday from 7.45am to 7.10pm. Automatic ticket machines: located at the ticket offices in via Bixio and Piazzale Dalla Chiesa and at the bus stop in Viale Toschi from 6.00am to 7.30pm; 24 hours a day in the entrance of the railway station. Ticket prices in town:

• 1 hour ticket euros 1,00 • 1 hour ticket on sale on the bus euros 1,50 • 6 runs tickets euros 4,80 • month ticket euros 25,00

Special services: Prontobus, The Prontobus is the bus service running in town at night. It can be booked on the phone by calling the free number 800977900 from 6.00pm to 1.00am. A Tep employee will arrange the schedule and stops of the bus. On line booking and info is also available 24 hours a day in the Tep web site. Schedule: every day, festivities included; on Friday and Saturday from 8.00pm to 1.30am, from Sunday to Thursday from 8.00pm to 1.00am. Ticket prices:

• one hour ticket euros 2,00 • all night ticket to travel on the Prontobus and all other night buses euros 2,50 • all night ticket for two people euros 3,50 • all night ticket for three people euros 4,50

Campus express.

It connects the station and the Campus in only 20 minutes.

Euromicro 2008

32

Maps of bus lines in Parma

Campusbus 7, 14, 21, campus express

Railwaystation

Lungoparma

Euromicro 2008

33

Useful bus timetable

Bus stop working days holidays

Bus stop working days holidays

Euromicro 2008

34

Bus stop only working days (not Saturday)

Bus stop only working days (not Saturday)

Euromicro 2008

35

Bus stop working days holidays

Bus stop working days holidays

Euromicro 2008

36

AAggrreeeedd HHootteellss In the historic center Starhotel Du Parc Viale Piacenza, 12/C Phone +39 0521 292929 Stendhal Via Bodoni, 3 (corner of Via Verdi) Phone +39 0521.208057 Toscanini Viale Toscanini Arturo, 4 Phone. +39 0521 289141 Astoria Via Trento, 9 Phone +39 0521 272717 Button Borgo della Salina, 7 Phone +39 0521 208039 Torino Borgo Mazza Angelo, 7 Phone +39 0521 281046 Close to the city center Best Western Farnese International Hotel Via Reggio, 51/A Phone +39 0521 994 247 Express Holiday Inn Parma Strada Naviglio Alto, 50 Phone +39 0521 270 593 Ostello della Gioventù di Parma Via San Leonardo, 86 Phone +39 0521 1917547

Euromicro 2008

37

LLuunncchh oorr ddiinnnneerr iinn tthhee hhiissttoorriicc cceennttrree Ristoranti

Nome Chiuso Nome Chiuso

ALDO Piazzale Inzani, 15 Tel. 0521206001

domenica sera e lunedì

I MERLI Borgo Piccinini, 7/a Tel. 0521386846

Open only in the evenings

ANGIOL D’OR Vicolo Scutellari, 1 Tel. 0521282632

lunedì I TRE PORCELLINI Borgo del Correggio 60/a Tel. 0521236138

martedì e sabato a pranzo

APRITI SESAMO Via Montecorno, 4 Tel. 0521270274 Fax 0521270274

Ristorante macrobiotico domenica e festivi

IL CORTILE Borgo Paglia, 3 Tel. 0521285779 Fax 0521507192

domenica

ANTICA CERERIA Via Tanzi, 5 Tel. 0521207387

lunedì IL PIANETINO Via XX Settembre, 51 Tel. 0521233102

mercoledì in inverno e domenica in estate

ANTICA OSTERIA DELLA GHIAIA Borgo Paggeria, 12 Tel. 0521287930

domenica

IL RIGOLETTO Borgo Ronchini, 4/b Tel. 0521234852

martedì. Luglio e agosto

domenica

CANON D’OR Via Nazario Sauro, 3/a Tel. 0521221350

mercoledì

IL TROVATORE Via Affò, 2/a Tel. 0521236905

domenica

CORALE VERDI Vicolo Asdente, 9 Tel. 0521237912

lunedì LA CANTINA DI… P. le del Carbone, 3/c Tel. 0521030815

Sabato e domenica a pranzo e lunedì sera

CORRIERI Via Conservatorio, 1 Tel. 0521234426

sempre aperto L’OCA NERA Via Borghesi, 3/a Tel. 0521233126

lunedì

CROCE DI MALTA Borgo Palmia, 8 Tel. 0521208681

domenica e lunedì LA FATA BEMA Via A. Turchi, 4/B Tel. 0521208798

domenica, lunedì e martedì a pranzo

DEL GESSO Via Maestri, 11 Tel. 0521230505

mercoledì tutto il giorno e giovedì a pranzo

LA FILOMA Borgo XX Marzo, 15 Tel. 0521206181

martedì e mercoledì a pranzo

GALLO D’ORO Borgo Salina, 3 Tel. 0521208846

domenica sera LA FORCHETTA Borgo San Biagio, 6/d Tel. 0521208812

domenica sera

HOSTARIA DA BEPPE Strada Imbriani, 51 Tel. 0521206508

lunedì

LA GREPPIA Via Garibaldi, 39/a Tel. 0521233686

lunedì e martedì

Euromicro 2008

38

HOSTERIA 20 SETTEMBRE Via XX Settembre, 8 Tel. 0521385594

domenica LA PILOTTA Via Bodoni, 3 Tel. 0521282825

domenica sera e lunedì

LEON D’ORO Viale Fratti, 4 Tel. 0521773182 Fax 0521707878

sempre aperto

SAN BARNABA Via Trento, 11 Tel. 0521270365 Fax 0521272724

sempre aperto

MOSAIKO Borgo Marodolo 8/a Tel. 0521289794

lunedì SANTA CHIARA Piazzale Cervi, 5 Tel. 0521286098

domenica

OMBRE ROSSE Borgo Tommasini, 18 Tel. 0521289575

domenica SCARPETTA Via N. Sauro, 13/b Tel. 0521238547

sabato a pranzo, domenica tutto il

giorno e lunedì sera

OSTERIA DELLA GATTA MATTA Borgo degli Studi, 9/a Tel. 0521231475

domenica e lunedì SORELLE PICCHI Via Farini, 27 Tel. 0521233528

Domenica e tutte le sere

OSTERIA DEL 36 Strada Saffi, 26/a Tel. 0521287061

domenica

TAVERNA GRECA KELARI B.go Tommasini, 19/a Tel. 0521386653

domenica e lunedì

OSTERIA DEI MASCALZONI Vicolo Cinque Piaghe, 1 Tel. 0521281809

domenica

TRIBUNALE Vicolo Politi, 5 Tel. 0521285527 Fax 0521238991

lunedì

OSTERIA DELLO ZINGARO B. go del Correggio, 5/b Tel. 0521207483

domenica

PARIZZI Strada Repubblica, 71 Tel. 0521285952

lunedì

Pizzerie and self-service

AL CORSARO Strada Cavour, 37 Tel. 0521235402

giovedì

LA DUCHESSA Piazza Garibaldi, 3 Tel. 0521235962

lunedì

L’ARTISTA Via B. Longhi, 3/a Tel. 0521230146

lunedì MAGNOSFERA Via Oberdan, 5 Tel. 0521231039

domenica

ORFEO Via Carducci, 5 Tel. 0521285483

martedì PAN AM Via Palermo, 10/a Tel. 0521784516

sabato e domenica

IL GATTOPARDO Via D’Azeglio, 63/a Tel. 0521286183

lunedì BIXIO52 Via N. Bixio, 52 Tel. 0521289428

Euromicro 2008

39

UUsseeffuull lliinnkkss

Organization http://www.ce.unipr.it/em08/ http://www.ce.unipr.it/ http://dis.unipv.it/ Conference site http://ingegneria.unipr.it/ http://www.unipr.it/www.php?ID=12&info=Chisiamo&tipo=sedi Accomodation http://www.parmahotel.it http://www.aeroportoparma.it/ http://www.trenitalia.com/en/index.html Tourism in Parma http://turismo.comune.parma.it/ http://turismo.parma.it/ http://www.comune.parma.it/tourvirtuale/ http://www.castellidelducato.it/

Comune di Parma - Informazioni e Accoglienza Turistica Via Melloni 1/A , Phone +39 0521218889 - 218855

Euromicro 2008

40

NNootteess

Euromicro 2008

41

NNootteess