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     J. KRISHNA CHAITHANYAAssociate Professor

     [email protected]

    EMBEDDED SYSTEMS(A1430)

    UNIT-III & IV RTOS

    Depa!"e#! $% Ee'!$#' a#* C$""+#'a!$#E#,#ee#,

    VARDHAMAN CO!"! O# !N"$N!!R$N"(AUTONOMOUS)

    Sa"aa*/ H*eaa* - 0121

    mailto:[email protected]:[email protected]

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    3.0 INTRODUCTION TO REA-TIMEO5ERATIN6 SYSTEMS (RTOS)

    A more com%&e' soft(are architect)re is needed to hand&e m)&ti%&etasks* coordination* comm)nication* and interr)%t hand&ing + an R,O-architect)re

    Distinction

    Deskto% O- + O- is in contro& at a&& times and r)ns a%%&ications* O-r)ns in di/erent address s%ace

    R,O- + O- and em0edded soft(are are integrated* !- starts andactivates the O- + 0oth r)n in the same address s%ace 1R,O- is &ess%rotected2

    R,O- inc&)des on&y service ro)tines needed 0y the !- a%%&ication

    R,O- vendors V'3orks 1(e got it42* V,R5* N)c&e)s* yn'O-* )C6O- Most conform to PO-$5 1$!!! standard for O- interfaces2

    Desira0&e R,O- %ro%erties )se &ess memory* a%%&ication%rogramming interface* de0)gging too&s* s)%%ort for variety ofmicro%rocessors* a&ready7de0)gged net(ork drivers

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    3.1 Ta7 a#* Ta7 S!a!e

    A task + a sim%&e s)0ro)tine

    !- a%%&ication makes ca&&s to the R,O- f)nctions to start tasks* %assingto the O-* start address* stack %ointers* etc. of the tasks

     ,ask -tates

    R)nning

    Ready 1%ossi0&y s)s%ended* %ended2

    8&ocked 1%ossi0&y (aiting* dormant* de&ayed2

    9!'it:

    -ched)&er + sched)&es6sh);es tasks 0et(een R)nning and Readystates

    8&ocking is se&f70&ocking 0y tasks* and moved to R)nning state via

    other tasks< interr)%t signa&ing 1(hen 0&ock7factor isremoved6satis=ed2

    3hen a task is )n0&ocked (ith a higher %riority over the >r)nning<task* the sched)&er >s(itches< conte't immediate&y 1for a&& %re7em%tive R,O-s2

    1-ee #ig ?.2

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    3.1 Ta7 8 1

    $ss)e + -ched)&er6,ask signa& e'change for 0&ock7)n0&ock oftasks via f)nction ca&&s

    $ss)e + A&& tasks are 0&ocked and sched)&er id&es forever 1notdesira0&e42

    $ss)e + ,(o or more tasks (ith same %riority &eve&s in Ready

    state 1time7s&ice* #$#O2

    !'am%&e sched)&er s(itches from %rocessor7hog veve&s,askto v8)tton,ask 1on )ser interr)%tion 0y %ressing a %)sh70)tton2* contro&&ed 0y the main12 (hich initia&ies the R,O-*

    sets %riority &eve&s* and starts the R,O-

    1-ee #ig ?.B* #ig ?.* #ig ?.2

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    3.3 Ta7 a#* Da!a

    !ach tasks has its (on conte't 7 not shared* %rivate registers*

    stack* etc. $n addition* severa& tasks share common data 1via g&o0a& data

    dec&arationE )se of >e'tern< in one task to %oint to another taskthat dec&ares the shared data

    -hared data ca)sed the >shared7data %ro0&em< (itho)t

    so&)tions disc)ssed in Ch% or )se of >Reentrancy

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    3.2 Ta7 8 2

    Reentrancy + A f)nction that (orks correct&y regard&ess of then)m0er of tasks that ca&& it 0et(een interr)%ts

    Characteristics of reentrant f)nctions +

    On&y access shared varia0&e in an atomic7(ay* or (hen varia0&eis on ca&&ee

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    $ns%ecting code to determine Reentrancy

    -ee #ig ?.I + 3here are data stored in CJ -hared* non7shared*or stackedJ

    -ee #ig ?.K + $s it reentrantJ 3hat a0o)t varia0&e fError J $s printf  reentrantJ

    $f shared varia0&es are not %rotected* co)&d they 0e accessed)sing sing&e assem0&y instr)ctions 1g)aranteeing non7atomicity2J

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    20

    Ra'e '$#*!$# Assume the scenario in which

    process A reads the free slot (e.g.

    7) but before printing, CPU

    switches to process B and process

    B reads the free slot ( again 7 )

    and prints its file name there andupdates it to 8. n that case when

    CPU switches bac! to process A , it

    starts from the point it left off

    and writes its file in 7. "hus

    process B ne#er gets the print of

    its file.

    $ituations li!e this , when two

    processes are using the shared

    data and result depends on who

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    21

    Ra'e '$#*!$#

    $emaphore is one of the wa%s for pro#idingmutual e&clusion b% protecting critical regions.

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    22

    Se"ap$e

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    Se"ap$e De9#!$#

    "o indicate a process has gained access to the resource,the process decrements the semaphore.

    -or e#ents to progress correctl%, the test and

    decrement operation on the semaphore must be atomic

    (i.e., no interruptibleindi#isible). "here are two !inds of $emaphores

    Binar% semaphores

    * Control access to a single resource, ta!ing

    the #alue of / (resource is in use) or 0

    (resource is a#ailable).

    Counting semaphores

    * Control access to multiple resources, thusassumin a ran e of nonne ati#e #alues.

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    Se"ap$e De9#!$#

    $emaphore is a nonnegati#e integer that isstored in the !ernel.

     Access to the semaphore is pro#ided b% a

    series of semaphore s%stem calls.

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    Cea!#, a#* A''e#,Se"ap$e Se!

    Before a semaphore set can be used, it mustbe created.

    "he creation of the semaphore set generates

    a uni1ue data structure that the s%stem usesto identif% and manipulate the semaphores.

    A conceptual arrangement of a s%stem

    semaphore structure for a newl% allocated setof three semaphores is shown in -igure 0.

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    Cea!#, a#* A''e#,Se"ap$e Se!

    Figure 1. Data structures for a set of three semaphores.

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    Cea!#, a#* A''e#,Se"ap$e Se!

    Return

    int semget (key_t key,intnsems,int semflg); Summary

    2 Manual Section   < sys/typ es.h >

    < sys/ip c.h >

    < sys/sem .h>

    I#'+*e:e()

    Sets errno Failure Success

     Yes -1 Te sema!ore i"entifier

    Table 1. Summary of the semget System Call

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    3.3 Se"ap$e a#* Sae* Da!a 8 A #e; !$$%$ a!$"'!

    -ema%hore + a varia0&e6&ock6Lag )sed to contro& access to sharedreso)rce 1to avoid shared7data %ro0&ems in R,O-2

    Protection at the start is via %rimitive f)nction* ca&&ed take*inde'ed 0y the sema%hore

    Protection at the end is via a %rimitive f)nction* ca&&ed release*a&so inde'ed simi&ar&y

    -im%&e sema%hores + 8inary sema%hores are often ade)ate forshared data %ro0&ems in R,O-

    1-ee #ig ?.B and #ig ?.2

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    3.3 Se"ap$e a#* Sae* Da!a 8 1

    R,O- -ema%hores $nitia&iing -ema%hores

    sing 0inary sema%hores to so&ve the >tank monitoring< %ro0&em

    1-ee #ig ?.B and #ig ?.2

     ,he n)c&ear reactor system ,he iss)e of initia&iing the

    sema%hore varia0&e in a dedicated task 1not in a >com%eting

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    3.3 Se"ap$e a#* Sae* Da!a 8 2

    Reentrancy* -ema%hores* M)&ti%&e -ema%hores* Device -igna&ing*

    #ig ?.F + a reentrant f)nction* %rotecting a shared data* c!rrors*in critica& section

    !ach shared data 1reso)rce6device2 re)ires a se%arate

    sema%hore for individ)a& %rotection* a&&o(ing m)&ti%&e tasks anddata6reso)rces6devices to 0e shared e'c&)sive&y* (hi&e a&&o(ingecient im%&ementation and res%onse time

    #ig ?.? + e'am%&e of a %rinter device signa&ed 0y a re%ort7

    0)/ering task* via sema%hore signa&ing* on each %rint of &inesconstit)ting the formatted and 0)/ered re%ort

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    * *

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    3.3 Se"ap$e a#* Sae* Da!a 8 3

    -ema%hore Pro0&ems + >Messing )%< (ith sema%hores ,he initia& va&)es of sema%hores + (hen not set %ro%er&y or at

    the (rong %&ace

     ,he >symmetry< of takes and re&eases + m)st match orcorres%ond + each >take< m)st have a corres%onding >re&ease<some(here in the !- a%%&ication

    >,aking< the (rong sema%hore )nintentiona&&y 1iss)e (ith

    m)&ti%&e sema%hores2Ho&ding a sema%hore for too &ong can ca)se >(aiting< tasks<

    dead&ine to 0e missedPriorities co)&d 0e >inverted< and )s)a&&y so&ved 0y >%riority

    inheritance6%romotion<

    1-ee #ig ?.G2

    Ca)sing the dead&y em0race %ro0&em 1cyc&es2

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    3.3 Se"ap$e a#* Sae* Da!a 8 4

    Variants

    8inary sema%hores + sing&e reso)rce* one7at7a time*a&ternating in )se 1a&so for reso)rces2Co)nting sema%hores + m)&ti%&e instances of reso)rces*

    increase6decrease of integer sema%hore varia0&eM)te' + %rotects data shared (hi&e dea&ing (ith %riority

    inversion %ro0&em

    -)mmary + Protecting shared data in R,O-Disa0&ing6!na0&ing interr)%ts 1for task code and interr)%t

    ro)tines2* faster ,aking6Re&easing sema%hores 1can

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    More O%erating -ystem-ervices

     ,he other feat)res o/ered 0ycommercia& R,O-s.

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    Contents

    Message Q)e)es* Mai&0o'es and Pi%es ,imer #)nctions

    !vents

    Memory Management$nterr)%t Ro)tines in an R,O- !nvironment

    Mea,e

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    Mea,e

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    Mea,e

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    De!a ;! Mea,e

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    De!a ;! Mea,e

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    5$#!e a#*

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    static O-S!V!N, W%OseQ)e)e,em%E

    void vRead,em%erat)res,ask1void2

      int W%,em%erat)resE

      3hi&e1,R!2

      …

      %,em%erat)res Y1intW2ma&&oc1BWsieofW%,em%erat)res2E

    %,em%erat)res9K: Y

    %,em%erat)res9: Y

    O-QPost1%OseQ)e)e,em%*

      1voidW2%,em%erat)res2E

      U

    U

    void vMain,ask1void2

      int W%,em%erat)resE

      8T,! 0y!rrE

      (hi&e1,R!2

      %,em%erat)res Y1intW2O-QPend1%OseQ)e)e,em%*3A$,S#OR!V!R* 0y!rr2E

      if 1%,em%erat)res9K: 4Y %,em%erat)res9:2

      44 -et O/ ho(&ing a&armE

      U

    U

    #ig. G. Passing Pointer on Q)e)es

    5$#!e a#*

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    Ma$=e

    M)ch &ike )e)es.R,O- can

    Create* (rite *check and read from mai&0o'es.

     ,he n)m0er of messages in a mai&0o' is&imited.

    ser can %rioritie mai&0o' messages.M)&ti,ask4

    sndmsg* rcvmsg* chkmsg

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    5pe

    M)ch &ike )e)es.R,O- can

    Create* (rite *check and read from %i%es.

    8yte7oriented.

    se fread12* f(rite12

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    5!%a

    void vRead,em%erat)res,ask1void2

      int W%,em%erat)resE

      3hi&e1,R!2

      …

      %,em%erat)res Y1intW2ma&&oc1BWsieofW%,em%erat)res2E

    %,em%erat)res9K: Y%,em%erat)res9: Y

    O-QPost1%OseQ)e)e,em%*

      1voidW2%,em%erat)res2E

      U

    U

    void vRead,em%erat)res,ask1void2

      int i,em%erat)res9B:E

      3hi&e1,R!2

      …

     

    i,em%erat)res9K: Y

    i,em%erat)res9: Y

    O-QPost1%OseQ)e)e,em%*

      1voidW2i,em%erat)res2E

      U

    U

    •Passing Pointers thro)gh a )e)e may create

    ae* *a!a +,

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    T"e :+#'!$#

    M)st Zee% track of the %assage of timeO/er taskDe&ay12 f)nctions.

    void vMakePhoneCa&&,ask1void2

      …

      taskDe&ay1KK2E

      vDia&ing,oneOn1W%SchPhoneN)m0er  –’K’2E

      taskDe&ay1KK2E

      vDia&ing,oneO/12E  …

    U

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    E>e#!

    Proced)re. More than task can 0&ock (aitingB.  ,he events occ)rs.  ,he R,O- (i&& )n0&ock a&& of tasks

    #orm gro)% of events and any s)0set ofevents (ithin the gro)% Need to reset events a)tomatica&&y or

    man)a&&y

    C$"pa$# %$ I#!e !a7

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    C$"pa$# %$ I#!e !a7C$"".

    -ema%hore the fastest and sim%&est

      not m)ch information

    !vents more com%&icated thansema%ohre

      can (ait severa& events at thesame time

      take more CP time

    Q)e)es m)ch information

      CP7intensive

      0)gs7o%%ort)nity.

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    I ! ! R !

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    I#!e+p! R$+!#e # a# RTOSE#>$#"e#!

    #ig. G. Ho( $nterr)%t Ro)tines -ho)&d 3ork

    $nterr)%t Ro)tines

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    $nterr)%t Ro)tines in an R,O-!nvironment

    #ig. G.F 3hat 3o)&d Rea&&y Ha%%en

    I#!e+p! R$+!#e

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    I#!e+p! R$+!#e # a# RTOSE#>$#"e#!

    #ig. G.? Ho( $nterr)%t Ro)tines Do 3ork

    1. The RTOS intercepts all the interrupts and

    then call your interrupt routine.

    I#!e+p! R$+!#e OS

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    I#!e+p! R$+!#e # a# RTOSE#>$#"e#!

    #ig. G.G Ho( $nterr)%t Ro)tines Do 3orkP&an 8

    2. Disabling the scheduler for the

    duration of the interrupt routine.

    I#!e+p! R$+!#e RTOS

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    I#!e+p! R$+!#e # a# RTOSE#>$#"e#!

    .  A se%arate set of f)nctions for  interr)%t ro)tines s%ecia&&y

    O--emPost O-$-R-emPost for interr)%t ro)tines

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    Ne!e* I#!e+p!

    • ,he R,O- m)st kno((hen the &o(er7%riority interr)%t

    ro)tine.

    #ig. G. Nested $nterr)%ts and the R,O-

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    . Overvie(

    Prior to design* (e m)st constr)ct a s%eci=cation of the !- to meets)ch re)irements 6 %ro%erties as

    Com%&eteness  ,ime 1timing constraints 7 res%onse time* reactive time* dead&ines + soft vs.

    hard2

    Pro%erties of the target hard(are 1for e/ective design of the !-2* e.g.* a I?KK70%s seria& %ort that receives BKK chars %er second* re)ires an $R thathand&es interr)%ts BKK times each second. $f chars can 0e (ritten to RAM)sing DMA* $R code (i&& 0e di/erent

    Zno(&edge of micro%rocessor s%eed + can the µ%roc r)n the $R BKK times %ersecJ

    Need a&& the soft(are engineering ski&& yo) have* %&)s s)ch %ro%erties asstr)ct)res* enca%s)&ation* info7hiding* mod)&arity* co)%&ing* cohesion*maintaina0i&ity* testa0i&ity

    !/ective )se of design too&s and methodo&ogies + RoseR,* OO* M* T!-7M*

    [

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    .B Princi%&es +

    3rite -hort $R

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    .B Princi%&es + B

    Consider the / s%ecs A system res%onds to commands from a seria& %ort A&& commands end (ith a carriage7ret)rn 1CR2 Commands arrive one at a time* the ne't arrives i/ the %receding one is

    %rocessed

    -eria& %ort

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    .B Princi%&es +

    Pro0&em Decom%osition into ,asks + Ho( many tasksJ

    Considerations 1>< if caref)&&y decom%osed and fe( tasksE and >+< if there

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    .B Princi%&es +

    Priorities 1advantage of )sing R,O- soft(are architect)re2

    Decom%osing 0ased on >f)nctiona&ity< and >time critica&ity*< se%arates !-com%onents into tasks 1nat)ra&&y2* for )icker res%onse time )sing task%rioritiation + high %riority for time7critica& ones* and &o( %riority for others

    !nca%s)&ating f)nctiona&ity in ,asks

    A dedicated task to enca%s)&ate the hand&ing of each shared device 1e.g.*%rinter dis%&ay )nit2 or a common data str)ct)re 1e.g.* an error &og2

    1-ee #ig .2

    Parts of a target hard(are storing data in a Lash memory + a sing&e taskenca%s)&ates the hand&ing of %ermission7to7(rite7to7Lash 1set 6 reset of Lashat given times2

    1-ee #ig . + )sing PO-$5 standard R,O- f)nctions mq_open, mq_receive,

    mq_send, nanosleep2

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    .B Princi%&es +

    Other ,asks J Need many sma&&* sim%&e tasksJ 8)t (orry a0o)t data7sharing* intertask

    comm [

    Need a task %er stim)&iJ -ame %ro0&ems4

    Recommended ,ask -tr)ct)re

    Mode&ed6-tr)ct)red as -tate7Machines +  ,asks r)n in an in=nite &oo%

     ,asks (ait on R,O- for an event 1e'%ected in each task

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    .B Princi%&es + F

    Avoid Creating and Destroying ,asks Creating tasks takes more system time

    Destroying tasks co)&d &eave destroy %ointers7to7messages* removesema%hore others are (aiting on 10&ocking them forever2

    R)&e7of7th)m0 Create a&& tasks needed at start* and kee% them if memory ischea%4

     ,)rn ,ime7-&icing O/  sef)& in conventiona& O-fairness< to )ser %rograms

    $n !-

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    .K 8A-$C D!-$"N O# !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    .B Princi%&es + ?

    Restrict the )se of R,O- f)nctions6feat)res C)stomie the R,O- feat)res to yo)r needs 1Note the R,O- and yo)r !- gets

    &inked and &ocated together into same address s%ace of ROM6RAM + -eeCha%ter I2

    $f %ossi0&e (rite !- f)nctions to interface (ith R,O- se&ect feat)res tominimie e'cessive ca&&s to severa& R,O- f)nctions 1increases o%%ort)nity forerrors2

    Deve&o% a she&& aro)nd the R,O- f)nctions* and &et yo)r o(n !- tasks ca&& theshe&& 1and not the R,O- direct&y2 + im%roves %orta0i&ity since on&y the she&&

    may 0e re(ritten fro R,O- to R,O-

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    . An !'am%&e + Designing an ndergro)nd ,ank Monitoring !- -ystem

    -)mmary of Pro0&em -%eci=cation -ystem of )ndergro)nd tanks Meas)res read

    tem%erat)re of gas 1thermometer2 read at any time Loat &eve&s 1Loat hard(are2 interr)%ted %eriodica&&y 0y the micro%rocessor

    Ca&c)&ate the n)m0er of ga&&ons %er tank )sing 0oth meas)res -et an a&arm on &eaking tank 1(hen &eve& s&o(&y and consistent&y fa&&s over time2 -et an a&arm on overLo( 1&eve& rising s&o(&y c&ose to f)&&7&eve&2 ser interface a2 ?70)tton contro& %ane&* CD* therma& %rinter -ystem can override )ser dis%&ay o%tions and sho( (arning messages Histories of &eve&s and tem%erat)re over time can 0e re)ested 0y )ser 1K7FK &ines

    &ong2 and )ser can )e)e )% >severa&< re%orts $ss)ing commands re)ire B or 0)ttons* and system can %rom%t the dis%&ay in the

    midd&e of a )ser command se)ence 8)ttons interr)%t the micro%rocessor One dedicated 0)tton t)rns a&arm o/ 1connected to the system2 thro)gh soft(are  ,he %rinter %rints one &ine at a time* and interr)%ts the micro%rocessor (hen done  ,he CD %rints the most recent &ineE saves its dis%&ay7data and doesn

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    . An !'am%&e

    3hich Architect)reJ

    $f R,O-* meeting dead&ines de%ends on dea&ing (ith the 7F secs timere)ired to ca&c)&ate the ] of ga&&ons + re)ires task s)s%ensions* %erha%s*(ith &ess $R

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    An !'am%&e

    -ystem Decom%osition for ,asks One &o( %riority task that hand&es a&& ] ga&&ons ca&c)&ations and detects &eaks

    as (e&& 1for a&& tanks + at a time2 A high %riority overLo(7detection task 1higher than a &eak7detection task2

    A high %riority Loat7hard(are task* )sing sema%hores to make the &eve&7ca&cand overLo(7detection task (ait on it for reading 1sema%hores (i&& 0esim%&er* faster than )e)ing re)ests to read &eve&s2

    A high %riority 0)tton hand&ing tasks + need a state7machine mode& 1an $RJ(ith interna& static data str)ct)res* a sim%&e (ait on 0)tton7signa&* and anaction (hich is %redicated on se)ence of 0)tton signa&s2 since sema%hores(on

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    . An !'am%&e

    Moving -ystem #or(ard + P)tting it together as -cenarios

    -ystem is interr)%t driven via interr)%t ro)tines res%onding to signa&s*activating tasks to their (ork

    ser %resses 0)tton* 0)tton hard(are interr)%ts the micro%rocessor* the0)tton $R sends message to 0)tton7hand&ing task to inter%ret command*(hich activates dis%&ay task or %rinter task

     ,imer interr)%ts* timer $R 7\ signa& to OverLo(7Detection task

    UM A'!>! Da,a"

    8, 8H$ 8$R 8H,

    D

     ,

    P,

    9dt:

    9%t:

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    Moving -ystem #or(ard + P)tting it together as -cenarios +

    ser %resses %rinter 0)tton* %rint $R signa&s %rint7formatting task 7\ (hich sends=rst &ine to %rinterE %rinter interr)%ts for %rint $R to send ne't &ine to %rinterE (hena&& &ines 1for re%ort2 are done* %rint $R signa&s %rint7formatting task for ne't re%ort

    A &eve& task need to read* it interr)%ts the &eve&7read7hard(are ro)tineE the &eve& isread 0y the hard(are and the $R interr)%ts the task to read the ne( Loat &eve&

    Dea&ing (ith -hared eve&7Data

     ,hree tasks need this data &eve&7ca&c for &eak detectionE dis%&ay taskE %rint formatting task Reading &eve& data and >%rocessing< it 0y given task takes a fe( msec or msec

    se sema%hores &et &eve&7ca&c and dis%&ay tasks read and %rocess &eve& in critica& section1C-2 and &et formatting task co%y &eve& data in C-* re&ease sema%hore* and format o)tsideC-

    -ee #ig .I and code &isting in Cha% + 8&ack magic and (iardry44 -!ng* an Art4

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    . !nca%s)&ating -ema%hores and Q)e)es

    !nca%s)&ating -ema%hores Don

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    .F Hard Rea&7,ime -ched)&ing Considerations

    ")aranteeing that the system (i&& meet hard dead&ines + comes from(riting fast code

    $ss)es fast a&gorithms* ecient data str)ct)res* code in assem0&y 1if%ossi0&e2

    Characteriing rea&7time systems

    Made of n tasks that e'ec)te %eriodica&&y every ,n )nits of time

    !ach task (orst case e'ec)tion time* Cn )nits of time and dead&ine of Dn Ass)me task s(itching time is K and non70&ocking on sema%hore

    !ach task has %riority Pn

    Q)estion ΣCn Y Σ1Dn  ^n2 _ ,n* (here ^n is some varia0i&ity in taskvaria0i&ity< ine'ec)tion times for tasks* f)nctions* access time of data str)ct)res60)/ers*sema%hore 0&ocking + any o%eration that can

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    .? -aving Memory -%ace +

     ,echni)es 6 -)ggestions

    -)0stit)te or e&iminate &arge f)nctions* (atch for re%eated ca&&s to &argef)nctions

    Consider (riting yo)r o(n f)nction to re%&ace R,O- f)nctions* (atch R,O-f)nctions that ca&& severa& others

    Con=g)re or c)stomie the R,O- f)nctions to s)it on&y the needs of the !-

    -t)dy assem0&y &isting of cross7com%i&ers* and re(ork yo)r C code or (riteyo)r o(n assem0&y )nit6task

    se >static< varia0&e instead of re&ying on stack varia0&es 1%)sh6%o% and%ointering takes s%ace2

    Co%y data str)ct)res %assed to a f)nction* via a %ointer* into the f)nction

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    .K 8A-$C D!-$"N O# AN !M8!DD!D -O#,3AR! 1!-2 -$N" R,O-

    -aving Po(er

    -ome em0edded systems r)n on 0attery* t)rning 0attery o/ for someor a&& devices is good

    "enera&&y* ho( to do yo) save %o(erJ ook for the %o(er7saving modes 1ena0&ers2 (hich the man)fact)rers %rovide -oft(are can %)t micro%rocessor in one the modes + via s%ecia& instr)ction or

    (riting a code to s%ecia& register in the %rocessor. ,he soft(are m)st 0efast44

    Po(er saving modes s&ee%* &o(7%o(er* id&e* stand0y* etc.  ,y%ica& )%roc sto%s r)nning* a&& 0)i&t7in devices* and c&ock circ)it 10)t &eave

    static RAM %o(er on since the (attage is very sma&&2

    3aking )%roc )% is done 0y s%ecia& circ)itry and soft(are 1to avoid restart andreset + (rite s%ecia& code to RAM address and &et soft(are check if it is co&dstart or restart from %o(er saving mode2

    A&ternative )%roc sto%s r)nning 0)t a&& devices stay a&ive* )%roc is res)me 0yinterr)%t 1this is &ess a hass&e that sto%%ing a&& devices2

    $f soft(are t)rns %o(er of devices 0ack on* stat)s data for res)m%tion m)st0e in !!ROM* and for those devices

     ,)rn o/ 0)i&t7in devices that signa& fre)ent&y from hi7&o(* &o(7hi + %o(erh)ngry4

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    I.K !M8!DD!D -O#,3AR! D!V!OPM!N, ,OO-

    I. $ntrod)ction

    A%%&ication %rograms are ty%ica&&y deve&o%ed* com%i&ed* and r)n on hostsystem

    !m0edded %rograms are targeted to a target %rocessor 1di/erent from thedeve&o%ment6host %rocessor and o%erating environment2 that drives a deviceor contro&s

    3hat too&s are needed to deve&o%* test* and &ocate em0edded soft(are intothe target %rocessor and its o%erating environmentJ

    Distinction

    Host 3here the em0edded soft(are is deve&o%ed* com%i&ed* tested*de0)gged* o%timied* and %rior to its trans&ation into target device. 18eca)sethe host has key0oards* editors* monitors* %rinters* more memory* etc. fordeve&o%ment* (hi&e the target may have not of these ca%a0i&ities for

    deve&o%ing the soft(are.2  ,arget After deve&o%ment* the code is cross7com%i&ed* trans&ated + cross7

    assem0&ed* &inked 1into target %rocessor instr)ction set2 and located  into thetarget

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    I.K !M8!DD!D -O#,3AR! D!V!OPM!N, ,OO-

    I. $ntrod)ction +

    Cross7Com%i&ers + Native too&s are good for host* 0)t to %ort6&ocate em0edded code to target*

    the host m)st have a too&7chain that inc&)des a cross7com%i&er* one (hichr)ns on the host 0)t %rod)ces code for the target %rocessor

    Cross7com%i&ing doesn

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    I.K !M8!DD!D -O#,3AR! D!V!OPM!N, ,OO-

    I.B inker6ocators for !m0edded -oft(are

    Native &inkers are di/erent from cross7&inkers 1or &ocators2 that %erformadditiona& tasks to locate em0edded 0inary code into target%rocessors

    Address Reso&)tion + Native inker %rod)ces host machine code on the hard7drive 1in a named

    =&e2* (hich the &oader &oads into RAM* and then sched)&es 1)nder the O-contro&2 the %rogram to go to the CP.

    $n RAM* the a%%&ication %rogram6code

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    I.K !M8!DD!D -O#,3AR! D!V!OPM!N, ,OO-

    ocating Program Com%onents + -egments

    nchanging em0edded %rogram 10inary code2 and constants m)st 0eke%t in ROM to 0e remem0ered even on %o(er7o/ 

    Changing %rogram segments 1e.g.* varia0&es2 m)st 0e ke%t in RAM Chain too&s se%arate %rogram %arts )sing e,"e#! conce%t

    Chain too&s 1for em0edded systems2 a&so re)ire a >start7)%< code to 0ein a se%arate segment and >&ocated< at a micro%rocessor7de=ned&ocation (here the %rogram starts e'ec)tion

    -ome cross7com%i&ers have defa)&t or a&&o( %rogrammer to s%ecify

    segments for %rogram %arts* 0)t cross7assem0&ers have no defa)&t0ehavior and %rogrammer m)st s%ecify segments for %rogram %arts

    1-ee #ig I.F 7 &ocating of o0ject7code segments in ROM and RAM2

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    I.K !M8!DD!D -O#,3AR! D!V!OPM!N, ,OO-

    ocating Program Com%onents + -egments +

     ,e&&ing6directing the &ocator (here 1(hich segments2 to %&ace %arts

    !.g.* #ig I.?  ,he +X te&&s (hich segments 1&ist of segments2 to )se and the start7address of

    the =rst segment  ,he =rst &ine te&&s (hich segments to )se for the code %arts* starting at

    address KE and the second &ine te&&s (hich segments to )se for the data %arts*starting at 'KKK

     ,he %ro%er names and address info for the directing the &ocator are )s)a&&y inthe cross7com%i&er doc)mentation

    Other directives range of RAM and ROM addresses* end of stack address

    1segment is %&aced 0e&o( this address for stack to gro( to(ards the end2 -egments6%arts can a&so 0e grouped * and the gro)% is &ocated as a )nit

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    I.K !M8!DD!D -O#,3AR! D!V!OPM!N, ,OO-

    ocator Ma%s and !'ec)ting O)t of RAM

    O)t%)t =&e of &ocators are Ma%s + &ist addresses of a&& segments

    Ma%s are )sef)& for de0)gging

    An >advanced< &ocator is ca%a0&e of r)nning 1a&0eit s&o(&y2 a start)%

    code in ROM* (hich 1co)&d decom%ress and2 &oad the em0edded codefrom ROM into RAM to e'ec)te )ick&y since RAM is faster* es%ecia&&yfor R$-C micro%rocessors

    1-ee #ig I.G + Ma%s2

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    I.K !M8!DD!D -O#,3AR! D!V!OPM!N, ,OO-

    I. "etting !m0edded -oft(are into ,arget -ystem

    Moving ma%s into ROM or PROM* is to create a ROM )sing hard(aretoo&s or a PROM %rogrammer 1for sma&& and changea0&e soft(are*d)ring de0)gging2

    $f PROM %rogrammer is )sed 1for changing or de0)gging soft(are2*%&ace PROM in a $'7e! 1(hich makes it erasa0&e + for !PROM* or

    remova0&e6re%&acea0&e2 rather than >0)rnt< into circ)itry

    PROM

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    I K !M8!DD!D -O#,3AR! D!V!OPM!N, ,OO-

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    I.K !M8!DD!D -O#,3AR! D!V!OPM!N, ,OO-

    I. "etting !m0edded -oft(are into ,arget -ystem +

    ROM !m)&ators + Another a%%roach is )sing a ROM em)&ator1hard(are2 (hich em)&ates the target system* has a&& the ROMcirc)itry* and a seria& or net(ork interface to the host system. ,he&ocator &oads the Ma% into the em)&ator* es%ecia&&y* for de0)gging%)r%oses.

    -oft(are on the host that &oads the Ma% =&e into the em)&ator m)st)nderstand 10e com%ati0&e (ith2 the Ma%

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    I K !M8!DD!D -O#,3AR! D!V!OPM!N, ,OO-

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    I.K !M8!DD!D -O#,3AR! D!V!OPM!N, ,OO-

    I. "etting !m0edded -oft(are into ,arget -ystem + B

    sing #&ash Memory #or de0)gging* a Lash memory can 0e &oaded (ith target Ma% code )sing a

    soft(are on the host over a seria& %ort or net(ork connection 1j)st &ike )singan !PROM2

    Advantages

    No need to %)&& the Lash 1)n&ike PROM2 for de0)gging di/erent em0edded code

     ,ransferring code into Lash 1over a net(ork2 is faster and hass&e7free

    Ne( versions of em0edded soft(are 1s)%%&ied 0y vendor2 can 0e &oaded into Lashmemory 0y c)stomers over a net(ork 7 Re)ires a2 %rotecting the Lash %rogrammer*saving it in RAM and e'ec)ting from there* and re&oading into Lash after ne( version is(ritten and 02 the a0i&ity to com%&ete &oading ne( version even if there are crashes and%rotecting the start)% code as in 1a2

    Modifying and6or de0)gging the Lash %rogramming soft(are re)ires moving it intoRAM* modify6de0)g* and re&oading it into target Lash memory )sing a0ove methods

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    K K D!8""$N" ,!CHN$Q!-

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    K.K D!8""$N" ,!CHN$Q!-

    K. ,esting on Host Machine

    Some reasons why you can’t test (much, if any) on target machine

     ,est ear&y 1target may not ready or com%&ete&y sta0&e2

    !'ercise a&& code* inc&)ding e'ce%tions 1rea& sit)ations may 0e dic)&t

    to e'ercise2 Deve&o% re)sa0&e* re%eata0&e test 1dic)&t to do in target environment*

    and &ike&ihood of hitting the same 0)g is &o(2

    -tore test res)&ts 1target may not even have disk drive to store res)&ts2

    K K D!8""$N" ,!CHN$Q!-

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    K.K D!8""$N" ,!CHN$Q!-

    K. ,esting on Host Machine +

    8asic ,echni)es

    #ig K. +

     ,arget system on the &eft 1hard(are7inde% code* hard(are7de% code* h(2  ,est system 1on host2 on the right 1hard(are7inde% code + same* sca/o&d +

    rest2

    -ca/o&d %rovides 1in soft(are2 a&& f)nctiona&ities and ca&&s to hard(are as inthe hard(are7de% and hard(are com%onents of the target system + more &ikea sim)&ator for them4

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    Figure 10.2  A Poor Plan for Testing

    /* File: radio.c */

    void vRadioTask (void)

    {...!! Complicated code to determine if turning on the radio now

    !! is within FCC regulations....!! More complicated code to decide if turning on the radio now

    !! makes sense in our protocol.

    If (!! Time to send something on the radio)

    {

    vTurnOnTransitter (FR!"#$OR%A&)'!! Send data out 

    vTurnOffRadio ()'

    (continued)

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    Figure 10.2 (continued)

    /* File: radio+.c */

    void vTurnOnTransitter (int iFre,uenc-alue)

    {

    0T! 1-Po+er' /* -te read fro device controll ing 2o+er. */

    int i'

    /* Turn on ain 2o+er for te radio. */

    disa1le#interru2ts ()'

     1-Po+er 3 in2 (P4R#5O$TROA66R)'

     1-Po+er 73 P4R#5O$TRORA6IO#%AI$'

    out2 (P4R#5O$TROA66R8 1-Po+er)'

    ena1le#interru2ts ()'

    /* 9ift te fre,uenc- value out to ard+are. */

    for (i 3 ' i ;

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    Figure 10.2  (continued)

    else

    {

    /* Te data is a 1inar- */

    /* 2ut a on te data line' 2ulse te clock line. */

    out2 (FR"#5O$RO&8 6ATA# ? 5&O5B#&O4)

    out2 (FR"#5O$RO&8 6ATA# ? 5&O5B#CIDC)'

    /* 9ift iFre,uenc-alue to get te ne@t lo+est 1it. */

    iFre,uenc-alue EE3

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    Figure 10.2  (continued)

    /* File: test.c */

    void out2 (int Address8 0T! 1-6ata)

    {

    Gifdef &!T#H9!R#9I%H&AT!#CAR64AR!

    PRI$TF (2rogra +rote JK@ to [email protected] 1-6ata8 iAddress)'

    Gendif 

    Gifdef 9I%H&AT!#CAR64AR!

    !! Remember that software wrote bata to i"ddress!! #pdate state of simulated hardware.

    Gendif 

    0T! in2 (int iAddress)

    {

    int i6ata'

    Gifdef &!T#H9!R#9I%H&AT!#CAR64AR!

    PRI$TF (2rogra +rote JK@ to JL@. !nter value.8iAddress)'

    scanf (J@8 ?i6ata)'

    Gendif 

    Gifdef 9I%H&AT!#CAR64AR!

    MM Figure out +at te real ard+are +ould return

    Gendif 

    return ((0T!) i6ata)'

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    Figure 10.3  etter Plan for Testing

    /* File: radio.c */

    void vRadioTask (void)

    {...!! Complicated code to determine if turning on the radio now

    !! is within FCC regulations....!! More complicated code to decide if turning on the radio now

    !! makes sense in our protocol.

    If (!! Time to send something on the radio)

    {

    vTurnOnTransitter (FR!"#$OR%A&)'!! Send data out 

    vTurnOffRadio ()'

    (continued)

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    Figure 10.3  (continued)

    /* File: test.c */

    static OO& fRadionOn'

    static int iRadioFre,uenc-alue'

    void vTurnOnTransitter (int iFre,uenc-alue)

    {

    /* Record te state of te radio. */fRadionOn 3 TRH!'

    iRadioFre,uenc-alue 3 iFre,uenc-alue'

    /* Tell te user */

     2rintf (Radio turned on +it fre,uenc- JL@8 iFre,uenc-alue)'

    void vTurnOffRadio (void){

    /* Record te state of te radio. */

    fRadioOn 3 FA&9!'

    /* Tell te user */

     2rintf (Radio no+ off)'

    K.K D!8""$N" ,!CHN$Q!-

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    K.K D!8""$N" ,!CHN$Q!-

    K. ,esting on Host Machine +

    Ca&&ing $nterr)%t Ro)tines +

    !m0edded systems are interr)%t7driven* so to test 0ased on interr)%ts

    2 Divide interr)%t ro)tines into t(o com%onents A2 a com%onent that dea&s (ith the hard(are

    82 a com%onent of the ro)tine (hich dea&s (ith the rest of the system

    B2 ,o test* str)ct)re the ro)tine s)ch that the hard(are7de%endent com%onent1A2 ca&&s the hard(are7inde%endent %art 182.

    2 3rite com%onent 8 in C7&ang)age* so that the test sca/o&d can ca&& it

    !.g.* #ig K. + H( com%onent 1A2 is vHand&eR'Hard(are12* (hich reads characters from the

    h(

    -( com%onent 182 is vHand&e8yte* ca&&ed 0y A to 0)/er characters* amongothers

     ,he test sca/o&d* v,estMain12* then ca&&s vHand&e8 te12* to test if the s stem

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    Figure 10.4  (continued)

    void vCandleR@-te (0T! 1-Received)

    {

    static 0T! *2#1-5oandufferTail 3 a# 1-5oanduffer'

    e@tern 0T! *2#1-5oandufferCead'

    unsigned long a#ul%essageL' /* %essage 1uffer. */

    /* Advance te tail 2ointer and +ra2 if necessar- */

    >> 2#1-5oandufferTail'

    if (2#1-5oandufferTail 33 ?a# 1-5oanduffer 

      9IN!OF#5%6#HFF!R)

     2#1-5oandufferTail 3 a# 1-5oanduffer'

    /* If te 1uffer is not full . . . . */

    if (2#1-5oandufferTail M3 2#1-5oandufferCead)

    {

    /* 9tore te caracter in te 1uffer. */

    *2#1-5oandufferTail 3 1-Received'

    /* If +e got a carriage return8 +ake u2 te coandandling task. */

    if (*2#1-5oandufferTail 33 5R)

    {

    /* uild te essage . . . */

    a#ul%essage 3 %9D#5O%%A$6#ARRI!6'

    a#ul%essage

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    Figure 10.4  (continued)

    /* . . . and send it. */

    ,#send (,id5oands8 a#ul%essage)'

    else

    {

    /* 6iscard te caracter' ove te 2ointer 1ack. */

    if (2#1-5oandufferTail 33 a# 1-5oanduffer)

     2#1-5oand ufferTa il 3 3

      ?a# 1-5oanduffer9IN!OF#5%6#HFF!R' 2#1 -5oandufferTail'

    /* File: test.c */

    void vTest%ain (void)

    {

    0T! a#1-Test5oand 3 TCH%9 HPS@d9I%O$ 9A09 TCH%9 HPS@d'

    0T! *2#1-'

    ../* 9end eac of te caracters in a#1-Test5oand */

     2#1- 3 a#1-Test5oand'

    +ile (*2#1-)

    {

    /* 9end a single caracter as toug received 1- te interru2t */

    vCandleR@-te (*2#1-)'

    /* Do to te ne@t caracter */

    >>2#1-'

    ..

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    K.K D!8""$N" ,!CHN$Q!-

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    K. ,esting on Host Machine +

    Ca&&ing the ,imer $nterr)%t Ro)tine Design the test sca/o&d ro)tine to direct&y ca&& the timer interr)%t ro)tine*

    rather than other %art of the host environment* to avoid interr)%tions in thesca/o&d

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    K.K D!8""$N" ,!CHN$Q!-

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    K.B $nstr)ction -et -im)&ators

    sing soft(are to sim)&ate  ,he target micro%rocessor instr)ction set

     ,he target memory 1ty%es 7 RAM2

     ,he target micro%rocessor architect)re 1interconnections and com%onents2

    -im)&ator + m)st )nderstand the &inker6&ocator Ma% format* %arse andinter%ret it

    -im)&ator + takes the Ma% as in%)t* reads the instr)ctions from sim)&atedROM* reads6(rites from6to sim)&ated registers

    Provide a )ser interface to sim)&ator for $6O* de0)gging 1)sing* e.g.* a macro&ang)age2

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    K.K D!8""$N" ,!CHN$Q!-

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    K. ,he ae! Macro

     ,he assert is )sed 1(ith a 0oo&ean7e'%ression %arameter2 to checkass)m%tions

    $f the e'%ression is ,R! nothing ha%%ens* if #A-!* a message is%rinted and the %rogram crashes

    Assert (orks (e&& in =nding 0)gs ear&y* (hen testing in the hostenvironment

    On fai&)re* assert ca)ses a ret)rn to the host o%erating systems 1can

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    K.K D!8""$N" ,!CHN$Q!-

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    K. sing a0oratory ,oo&s + Hard(are7foc)sed 7

    ogic Ana&yer ike storage sco%es that 1=rst2 ca%t)re many signa&s and dis%&ays them

    sim)&taneo)s&y

    $t kno(s on&y of VCC and gro)nd vo&tage &eve&s 1dis%&ays are &ike timingdiagrams2 + Rea& sco%es dis%&ay e'act vo&tage 1&ike ana&og2

    Can 0e )sed to trigger on7sym%tom and track 0ack in stored signa& to iso&ate%ro0&em

    Many signa&s can 0e triggered at their &o( and6or high %oints and for ho( &ongin that state

    sed in ,iming or -tate Mode

    K.K D!8""$N" ,!CHN$Q!-

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    K. sing a0oratory ,oo&s + Hard(are7foc)sed + B

    ogic Ana&yers in ,iming Mode

    #ind o)t if an event occ)rred + did cord&ess scanner t)rn on the radioJ

    Meas)re ho( &ong it took soft(are to res%ond to an interr)%t 1e.g.* 0et(een a0)tton interr)%t signa& and activation signa& of a res%onding device + to t)rn

    o/ an 0e&&2 $s the soft(are %)tting o)t the right %attern of signa&s to contro& a hard(are

    device + &ooking 0ack in the ca%t)red signa& for e&a%sed time

    1-ee #ig K.F on res%onse time2

    1-ee #ig K.? on e&a%sed time2

    1-ee #ig K.G + a ty%ica& ogic Ana&yer (ith on7screen 0)tton* mo)se*key0oard* net(ork ada%tor* disk storage for storing con=g)rations6settings*ri00on ca0&es2

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    K.K D!8""$N" ,!CHN$Q!-

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    K. sing a0oratory ,oo&s + Hard(are7foc)sed +

    ogic Ana&yers in -tate Mode Ca%t)res signa&s only on clock-event  occ)rring from the attached hard(are

     ,y%ica& )se instr)ctions read6fetched 0y micro%rocessor* data read from or(ritten to ROM* RAM* or $6O devices

     ,o do so* connect A to address and data signa&s and R!6 signa& on the ROM

    1or RAM2 $f triggering is on rising edge of R!6 %in* address and data signa&s (i&& 0e

    ca%t)red

    O)t%)t of A* ca&&ed !a'e* is stored for &ater ana&ysis + see #ig K.

    A can 0e triggered on )n)s)a& event occ)rrences* then ca%t)re signa&stherefrom + es%ecia&&y for de0)gging %)r%oses 1e.g.* (riting data to (rongaddress* tracking a rare&y occ)rring 0)g* =&tering signa&s for se&ect devices orevents2

    A can

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    K. D!8""$N" ,!CHN$Q!-

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    K. sing a0oratory ,oo&s + Hard(are7foc)sed + ?

    -oft(are7On&y Monitors Monitors a&&o( r)nning an em0edded system in the target environment* (hi&e

    %roviding de0)gging interfaces on 0oth the host and target environments A sma&& %ortion of the Monitor resides in the target ROM (*e+,,#, 7e#e $

    "$#!$)?

     ,he codes receives %rograms from seria& %ort* net(ork* co%ies into target

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