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ELECTRIC FORCE MICROSCOPY OF CHARGE TRAPPING IN THIN-FILM PENTACENE TRANSISTORS A Dissertation Presented to the Faculty of the Graduate School of Cornell University in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy by Erik Matthew Muller August 2005

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ELECTRIC FORCE MICROSCOPY OF CHARGE

TRAPPING IN THIN-FILM PENTACENE

TRANSISTORS

A Dissertation

Presented to the Faculty of the Graduate School

of Cornell University

in Partial Fulfillment of the Requirements for the Degree of

Doctor of Philosophy

by

Erik Matthew Muller

August 2005

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c© 2005 Erik Matthew Muller

ALL RIGHTS RESERVED

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ELECTRIC FORCE MICROSCOPY OF CHARGE TRAPPING IN

THIN-FILM PENTACENE TRANSISTORS

Erik Matthew Muller, Ph.D.

Cornell University 2005

Charge trapping in pentacene thin film transistors is investigated using electric

force microscopy. The observed spatial distribution of trapped charge strongly

suggests that charge traps not correlated with grain boundaries as expected.

Pentacene is a cyclic aromatic hydrocarbon that forms a well-ordered polycrys-

talline material in the thin film phase. Pentacene has shown some of the highest

mobilities of any organic semiconductor. Hole mobility is thought to be limited

by charge trapping. The origin of charge trapping, whether a bulk phenomenon or

associated with grain boundaries, is poorly understood.

Thin-film field-effect transistors using thermally deposited pentacene were fab-

ricated and studied using a custom built electric force microscope. The design,

construction and performance of the microscope is presented.

The microscope is capable of both contact and non-contact imaging modes

for atomic force microscopy. Electrical measurements are made in non-contact

mode utilizing frequency shift detection (dynamic mode). Theory describing the

interaction between a metal-coated cantilever and an organic semiconductor is

presented.

Imaging the spatial distribution of the charge density in a thin-film pentacene

transistor showed the trapping of long-lived traps are not homogeneous and not

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confined to the grain boundaries. Efforts to make ultrathin pentacene transistors is

presented to further determine the role of the grain boundaries in charge trapping.

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BIOGRAPHICAL SKETCH

Erik Matthew Muller was born on October 24, 1976 in Bellflower, California.

He graduated from Valley Christian High School in 1994. Staying in Southern

California, he completed his undergraduate studies at the University of California,

San Diego where he earned his Bachelor of Science degree in Physics in 1998. Erik’s

undergraduate research included the study of the magnetic properties of thin films

with Professor Frances Hellman.

Erik decided to enter the physics graduate program at Cornell University, where

he quickly experienced a dramatic change in climate. There, he joined the group

of Professor John Marohn in the Department of Chemistry and Chemical Biology

in early 2001 as Professor Marohn’s third graduate student. His doctoral research

was conducted under the the guidance of Professor Marohn, his advisor, Professor

Dan Ralph (Physics), the chair of his special committee, Professor Paul McEuen

(Physics), and Professor Tomas Arias (Physics). He completed his Ph.D. in physics

in August 2005.

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To my family

for their unconditional love and support

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ACKNOWLEDGEMENTS

I would like to express my sincere gratitude to Professor John Marohn for his

guidance and support, and for making doctoral education both fun and challenging.

I would also like to thank my committee, Professor D. Ralph, Professor P. McEuen

and Professor T. Arias for their insights and support.

I am also very grateful to the Department of Chemistry and Chemical Biology

and the Physics Department for funding this research.

I would like to thank Bill Silveira for his dedication and help towards designing

and building the microscope. Without his talents much of this work would not

be possible. Thanks to all of the Marohn Group, Sean Garner, Neil Jenkins, Tina

Ng, Seppe Kuehn, Jahan Dawlaty and Michael Jaquith – you have created a great

atmosphere, in which to conduct research and were always willing to help.

Many thanks to Professor George Malliaras and the members of his group,

particularly, Dr. Ricardo Ruiz and Yunjia Zhang, for their useful discussions and

assistance with samples. I would also like to thank Michael Woodside, Markus

Brink and Jun Zhu for making discussions about electric force microscopy fun and

sometimes funny. Robert Snedeker was an invaluable resource during the design

and construction of the microscope and I am truly grateful for his help.

Finally, I would like to thank my family for their unconditional love and sup-

port: My mom, Brigit, who is always willing to proof read despite not knowing

what she is reading about; my dad, Carl, who is always making sure my computer

is as fast as can be; my sister, Amy, who supports me despite my dorkiness; and

my wife, Yizhi, who is always at my side (sometimes with a biscuit).

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TABLE OF CONTENTS

1 Introduction 11.1 Organic Electronic Materials . . . . . . . . . . . . . . . . . . . . . . 51.2 Charge Trapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81.3 Microscopic characterization of organic electronic materials . . . . . 13

References 13

2 Pentacene - Description, Transistors and Performance 182.1 The pentacene molecule . . . . . . . . . . . . . . . . . . . . . . . . 182.2 Thin-film Transistor . . . . . . . . . . . . . . . . . . . . . . . . . . 192.3 Substrates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232.4 Deposition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 292.5 Characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

References 38

3 Electric Force Microscopy 403.1 Introduction to Electric Force Microscopy . . . . . . . . . . . . . . 403.2 Charge Trapping in EFM . . . . . . . . . . . . . . . . . . . . . . . . 41

3.2.1 Metal Plates . . . . . . . . . . . . . . . . . . . . . . . . . . . 423.2.2 Organic Device with Two Co-planar Electrodes . . . . . . . 443.2.3 Organic Field-Effect Transistor with Trapped Charge . . . . 473.2.4 Nonuniform Distribution of Trapped Charge . . . . . . . . . 513.2.5 Deviations from the Parallel Plate Geometry . . . . . . . . . 53

3.3 Cantilever Response to Thermal Fluctuations . . . . . . . . . . . . 543.4 The Electric Force Microscope – Components Overview . . . . . . . 593.5 EFM - Peripheral Components . . . . . . . . . . . . . . . . . . . . . 60

3.5.1 Vibration Isolation . . . . . . . . . . . . . . . . . . . . . . . 603.5.2 Electrical Connections and Wiring . . . . . . . . . . . . . . 633.5.3 Vacuum System . . . . . . . . . . . . . . . . . . . . . . . . . 653.5.4 Cryogenic System . . . . . . . . . . . . . . . . . . . . . . . . 653.5.5 Computer Systems, GPIB and Data Aquisition . . . . . . . 66

3.6 EFM - Core Components . . . . . . . . . . . . . . . . . . . . . . . . 673.6.1 Probe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 673.6.2 Fiber Optic Interferometer . . . . . . . . . . . . . . . . . . . 673.6.3 Frequency Shift Detection . . . . . . . . . . . . . . . . . . . 853.6.4 Coarse Approach . . . . . . . . . . . . . . . . . . . . . . . . 913.6.5 Scanning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 943.6.6 Cantilever . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

3.7 Measurement Techniques . . . . . . . . . . . . . . . . . . . . . . . . 96

References 99

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4 Charge Trap Experiments 1024.1 Sample Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 1024.2 EFM - Trap Detection Protocol . . . . . . . . . . . . . . . . . . . . 1054.3 Trap Imaging I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1064.4 Trap Imaging II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1094.5 Trap Density . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

References 117

5 Ultrathin Pentacene Transistors and Future Directions 119

References 125

A Bottom Contact Recipe 126

B Shadow Mask Recipe 129

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LIST OF FIGURES

1.1 Number of pentacene transistor journal articles . . . . . . . . . . . 21.2 Organic thin film transistor . . . . . . . . . . . . . . . . . . . . . . 41.3 The three categories of organic electronic materials. . . . . . . . . . 61.4 Bias stress current decay in a pentacene transistor. . . . . . . . . . 9

2.1 The pencacene molecule . . . . . . . . . . . . . . . . . . . . . . . . 192.2 Impurity defects in pentacene . . . . . . . . . . . . . . . . . . . . . 202.3 Introduction to thin-film transitors . . . . . . . . . . . . . . . . . . 202.4 Bottom contact fabrication process . . . . . . . . . . . . . . . . . . 242.5 Oxide quality comparison . . . . . . . . . . . . . . . . . . . . . . . 262.6 Transistor substrate wafer layout . . . . . . . . . . . . . . . . . . . 282.7 Effects of cleaning with pirana . . . . . . . . . . . . . . . . . . . . 312.8 Pentacene topography over metal and SiO2 . . . . . . . . . . . . . 332.9 Current-voltage characteristics for a standard pentacene thin film

transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352.10 Pentacene topography over metal and SiO2 . . . . . . . . . . . . . 362.11 Current-voltage characteristics for an interdigitated pentacene thin

film transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

3.1 Cantilever/sample models . . . . . . . . . . . . . . . . . . . . . . . 423.2 Cantilever/trapped charge models . . . . . . . . . . . . . . . . . . 483.3 Block diagram for the electric including all the support instrumen-

tation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 603.4 Picture of the EFM . . . . . . . . . . . . . . . . . . . . . . . . . . 613.5 Top plate and probe mount . . . . . . . . . . . . . . . . . . . . . . 623.6 Power spectrum of room vibrations . . . . . . . . . . . . . . . . . . 633.7 Vacuum can . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 683.8 Picture of the probe head . . . . . . . . . . . . . . . . . . . . . . . 693.9 Fiber optic interferometer block diagram . . . . . . . . . . . . . . . 713.10 Representation of the light lost due to the escape angle out of the

optical fiber . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 743.11 Phasor diagram for the interference pattern from the fiber-optic

interferometer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 773.12 Plot of the theoretical interferometer output . . . . . . . . . . . . . 793.13 Plot of the experimental interferometer output . . . . . . . . . . . 803.14 RF injection effects on spectral density . . . . . . . . . . . . . . . . 813.15 RF injection power and frequency dependence . . . . . . . . . . . . 833.16 Interferometer summary . . . . . . . . . . . . . . . . . . . . . . . . 843.17 Cantilever response to drive piezo . . . . . . . . . . . . . . . . . . . 863.18 Analog frequency demodulation circuit . . . . . . . . . . . . . . . . 873.19 Positive feedback filter . . . . . . . . . . . . . . . . . . . . . . . . . 883.20 Sensitivity of analog frequency demodulation . . . . . . . . . . . . 89

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3.21 Analog Phase-locked Loop Drift . . . . . . . . . . . . . . . . . . . 903.22 Frequency jitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 913.23 Coarse approach mechinism . . . . . . . . . . . . . . . . . . . . . . 923.24 SEM pictures of cantilever tips . . . . . . . . . . . . . . . . . . . . 953.25 Cantilever resonance frequency versus tip-Sample Voltage . . . . . 973.26 Sample tilt correction circuit . . . . . . . . . . . . . . . . . . . . . 98

4.1 Experimental setup and topography . . . . . . . . . . . . . . . . . 1034.2 Simple model of tip sample interaction . . . . . . . . . . . . . . . . 1064.3 Trap imaging protocol 1 . . . . . . . . . . . . . . . . . . . . . . . . 1074.4 Trap imaging I protocol . . . . . . . . . . . . . . . . . . . . . . . . 1084.5 Shielding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1084.6 Trap imaging protocol II . . . . . . . . . . . . . . . . . . . . . . . . 1094.7 EFM images of charge trapping . . . . . . . . . . . . . . . . . . . . 1114.8 Trap density linescans . . . . . . . . . . . . . . . . . . . . . . . . . 1124.9 Traps density histograms . . . . . . . . . . . . . . . . . . . . . . . 1144.10 Summary table of trapping theories . . . . . . . . . . . . . . . . . 115

5.1 Pentacene islands . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1215.2 Shadow masks diagram . . . . . . . . . . . . . . . . . . . . . . . . 1225.3 Shadow mask result . . . . . . . . . . . . . . . . . . . . . . . . . . 1225.4 Current-voltage characteristics for a top contact pentacene thin film

transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

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CHAPTER 1

INTRODUCTION

Organic electronic materials have been promoted for use in low-cost novel de-

vices that are otherwise not possible using inorganic semiconductors, such as smart

tags or large-area and/or flexible displays [1,2]. Organic electronic materials have

been known for a long time [3,4], but they have only recently been used in products

commercially available and have been mostly in the form of organic light-emitting

diode displays, but not at a promised low cost. The recent surge in commer-

cially available products is mostly due to advances in chemical synthesis [5, 6].

The commercial appeal of organic electronic devices is the potential to develop

low-cost novel applications that are not otherwise suitable for crystalline inorganic

semiconductors such as silicon or gallium arsenide. Among these devices are high-

efficiency light emitting diodes [7–10], solar cells [11, 12], large-area displays and

solution-processable thin-film transistors [8, 13–20].

Pentacene, a model organic semiconductor, rivals amorphous silicon in mobility

and is compatible with plastic flexible substrates. However, the commercialization

of pentacene-based devices is challenging because it is sensitive to air and moisture

and it is not solution processable. Its high mobility, reported to be upwards of

3 cm2/Vs [24], has placed it in a dominant position for scientific study in search

of the fundamental mechanisms determining its performance. Fig. 1.1 shows the

number of journal articles per year that refer to pentacene transistors according

to the Inspec database. Plotted on the right of Fig. 1.1 is the highest reported

mobility in pentacene for that year. The first use of pentacene in a thin film

field effect transistor [21] yielded a hole mobility of 0.002 cm2/Vs which is hardly

noteworthy and is perhaps the reason the next article did not appear until several

1

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Projected

Schön

Nichols, et. al.First Kelvin Probe

Imaging

Klauk,Mobility Record

et. al.

Figure 1.1: The total number of journal articles mentioning pentacene

transistors per year according to the Inspec search engine. The highest

reported mobility in each year is plotted on the right axis. The mobility

record was placed in 2002 by Klauk et. al. at 3 cm2/Vs. The year 2005 is

a projected number; the current number of articles reporting on Inspec

is 27.

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years later. In 1996, two articles appeared that improved on the mobility to an

extent which thrust pentacene into the forefront of organic electronic materials.

The reported mobilities of 0.038 cm2/Vs [22] and 0.6 cm2/Vs [23] were attributed

to a highly ordered morphology. From this point on, the amount of research

studying pentacene transistors skyrocketed (note the log scale in Fig. 1.1). All

of this work has not significantly increased the mobility from the initial jump in

1996. The current record for the hole mobility of 3 cm2/Vs was seen by Klauk,

et. al. [24] which is near the estimated theoretical limit for pentacene at around

10 cm2/Vs [25]. Determining the theoretical limit for the mobility in pentacene is

difficult because transport mechanism is not well understood [26–28].

The motivation to study pentacene is not derived from chasing the mobility

record but to understand how to maintain the device performance in real-world

conditions. Pentacene is a model compound for studying charge trapping because

it has a well defined chemical structure and forms well ordered films. This requires

a detailed microscopic understanding of charge trapping, charge transport and

contact effects in device-grade materials. Fig. 1.2 illustrates the issues important

in optimizing organic based thin-film transistors.

The mobility of holes through the accumulation layer of the transistor and the

contacts determine the amount of current carried by the transistor. Because of the

irreproducibility of organic based devices [29], separating contact and bulk effects

from current voltage measurements is challenging and typically not done. As a

result, bulk current voltage measurements typically underestimate the mobility of

holes in the bulk if there is a large contact resistance.

For a polycrystalline material, such as the thin-film form of pentacene, there

can be similar resistance barriers between grain boundaries which adversely affect

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EF

Metal Organic

Evac

HOMO

LUMO

VG

VSD

Pentacene

Figure 1.2: Organic thin-film transistor. Applying a voltage to the

gate electrode generates an electric field across the insulator which can

either accumulate or deplete charges from the semiconductor-insulator

interface. The formation of this charged channel allows current to flow

from a source to a drain electrode; the gate voltage switches the channel

open or closed. The performance of the transistor depends on charge

injection, which is determined by energy level alignment and is affected

by interface dipoles (left box), as well as on charge flow through the

polycrystalline pentacene film (right box; 1 µm × 1 µm image).

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the mobility (see right box of Fig. 1.2). These barriers are thought to manifest

themselves as charge traps and there is a debate in the scientific community as

to their origin and correlation with grain boundaries. The association with grain

boundaries arises from the phenomenological observation that the mobility in some

organic materials depends on crystallite grain size [30–34]. However, many other

factors are also associated with effects on mobility such as substrate roughness

[33, 34], exposure to oxygen and moisture [35, 36], and pentacene purity [37]. The

sensitivity of thin-film transistors to oxygen, moisture and pentacene purity point

to a bulk effect, chemically changing the pentacene molecule creating charge traps.

This type of degradation could also be associated with grain boundaries if the grain

boundaries are more reactive than the rest of the film.

This thesis describes the development, construction and utilization of an electric

force microscope, capable of observing charge, voltage and capacitance to image

the charge trap distribution locally and determine the correlation, if any, to the

pentacene topography in a thin film transistor.

This chapter will proceed with a short introduction to organic electronic mate-

rials followed by a description of charge trapping in pentacene thin film transistors.

1.1 Organic Electronic Materials

The interesting electronic behavior of many organic molecules arises from a

delocalization, or conjugation, of the π electrons over the entire molecule. From

a practical standpoint, this just means there is an alternating single and double

bonds along the carbon backbone of the molecule. Organic electronic materials

made from such molecules generally fall into one of three categories shown in

Fig. 1.3.

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N

CH3 CH3

N

CH CH2( )n

SS

SS

. . .. . .

(a) (b) (c)

Poly (3-hexylthiophene)Triarylamine, TPD,

in polystyrene. Pentacene

Figure 1.3: (a) Molecularly doped polymer system, (b) polymer system

and (c) small molecules

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The first category is called molecularly doped (or dispersed) polymers where

small conjugated organic molecules are dispersed in an insulating polymer host

such as polystyrene. Conduction occurs through thermally assisted tunneling be-

tween neighboring conjugated molecules. Tuning the concentration of conjugated

molecules varies the average distance between molecules greatly affecting the mo-

bility, up to 8 orders of magnitude. The model system for this type of organic

material are TPD molecules dispersed in an insulating polymer host. TPD is a

well studied material and has been commercially used in xerography for many

years. These materials have most of the favorable characteristics associated with

organic semiconductors, namely that they are solution processable and compatible

with flexible substrates. However, their mobilities tend to be quite low – in the

range of 10−10 − 10−4 cm2/Vs [4].

The second category is simply called polymers. These polymers, such as poly-

thiophene, have a conjugated backbone where the conjugation length can be chem-

ically tuned by adding non-conjugated side chains or spacers causing an interrup-

tion in the conjugation. Oligomers of these polymers also fall into this category.

This is the ideal system for chemists because it is solution processable and the

electronic/optical properties can be readily tuned using chemical synthesis [6].

However, conjugated polymer systems are plagued with low mobilities without go-

ing to great lengths in purification and/or doping. Many of these materials can be

spin-cast to form devices.

Pentacene falls into the third category of organic materials called small mole-

cules. The conjugated molecules are typically evaporated or sublimed onto sub-

strates forming polycrystalline thin films. These materials can be highly purified

and yield some of the highest mobilities. High mobility devices made of these

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materials cannot be spin-cast from solution as good crystals typically do not form.

There has been many efforts to make pentacene soluble [38], however the mobilities

are not quite as good as the thermally evaporated pentacene. More specific infor-

mation relating to the growth and performance of pentacene thin-film transistors

will be discussed in Chapter 2.

1.2 Charge Trapping

An unspoken consensus seemed to have developed in the community of scien-

tists studying pentacene that the charge trapping occurs mostly at grain boundaries–

despite most of the evidence being circumstantial. The observation in oligothio-

phenes that the mobility is dependent on grain size strongly suggests that the num-

ber of grain boundaries plays an important role in determining the mobility [39,40].

In fact, grain boundaries are often invoked in introductory and concluding para-

graphs as a source of charge trapping [41–47]. The observation that the electrical

performance of pentacene thin-film transistors is dependent on humidity [35, 48]

and purity [37] may also suggest a creation of traps within the grain boundaries.

The idea of bias stress and its origin is the topic of much research which will be

summarized below.

The signature of bias stress is a slow decrease in the source-drain current when

the device remains on for an extended time. This has been observed in polymer

systems [49] as well as in pentacene, as shown in Fig. 1.4. The most noticeable

feature is that the decay times are very long as charge slowly gets trapped inside

the device. The source of these charge traps can be states inside the gate dielectric

layer, the pentacene/dielectric interface, or in the pentacene film itself. Bias stress

in pentacene typically refers to a slow structural or electrical change induced by

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Figure 1.4: A plot of the bias stress current decay with time in a pen-

tacene thin film transistor. Source drain current through a 50 nm thick

pentacene transistor with ISD = −80 V and VG = −60 V is plotted versus

time. t = 0 immediately following the application of the gate voltage.

the charge carriers creating traps within the semiconductor.

The findings of Street et. al. [50] support a bipolaron mechanism that is re-

sponsible for the trap states induced by bias stress in poly(9-9’-dioctyl-flourene-

co-bithiophene)(F8T2). Their studies compared the bias stress current using two

different gate dielectrics with vastly different trap densities enabling them to rule

out states in the dielectric as a source for stress effects. Additionally, the applica-

tion of light reversed the stress effects, thereby eliminating the possibility of slow

structural changes which would typically require annealing to reverse. The obser-

vation of a bipolaron mechanism in F8T2 sets a precedent in organic materials.

Bipolaron formation is the combination of two holes, h to form a bipolaron,

(hh)BP ,

h + h → (hh)BP (1.1)

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From this reaction, a rate equation for the hole concentration, Nh can be formed,

dNh

dt= −kN2

h + bNBP (1.2)

where k and b are rate constants and the second term on the right is from the

breakup of a bipolaron into two holes. All of the data measuring dNh/dt fit to

Eq. 1.2, providing strong evidence for a bipolaron trapping mechanism. In ad-

dition, elimination of stress effects by the application of light is consistent with

optically excited charge carriers which can neutralize the metastable bipolaron.

A possible origin for bipolarons in pentacene was suggested by Northup and

Chabinyc [28], although not experimentally observed. Using ab initio gas-phase

calculations they determined the effect of hydrogen- and oxygen-induced defect

states in pentacene. Gap states are introduced by removing one of the double

bonds in the central benzene ring to participate in bonding with other atoms. One

such defect would be to form C22H15 by the addition of a hydrogen atom to the

central carbon. Another defect results from the addition of an -OH group to one

of the central carbons, forming C22H15O. Both of these defects remove one of the

pz orbitals from participating in the conjugation of the pentacene molecule. The

dissociation of H2O can result in both of these two defects and may explain the

sensitivity of pentacene to humidity. When these defects were introduced into the

crystal structure of pentacene they led to charge defects and hole trapping sites in

the presence of an external electric field.

Tsiper and Soos [27], present a theoretical description of how each pentacene’s

local dielectric environment affects the energy levels of that pentacene molecule.

They calculated how the energy of an isolated pentacene cation compares to a

pentacene cation surrounded by a dielectric material. A rough approximation can

be made by considering the polarization energy of a pentacene cation surrounded

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by neutral pentacene molecules having a relative dielectric constant of ǫr. This is

compared to the energy of an isolated pentacene cation.

The energy density is given by

dU =1

2D ·E dV (1.3)

where dV is a differential volume element, D, is the electric displacement vector,

and E is the electric field. The electric field outside the pentacene molecule is

E =q

4πǫ

1

r2r (1.4)

The energy stored in the dielectric material can be calculated by substituting

dV = 4πr2dr and D = ǫE, then integrating from the edge of the pentacene

molecule to infinity

U(ǫ) =q

4πǫ

R

1

r2dr =

q2

2R

1

4πǫ(1.5)

Subtracting off the energy of the system with no dielectric present will give the

polarization energy

P = U(ǫ) − U(ǫ0) =q2

2R

1

(

1

ǫ− 1

ǫ0

)

(1.6)

Introducing the dielectric constant, κ = ǫr = ǫ/ǫ0 and by dividing by the charge,

the polarization energy can be written in units of voltage

P± =q

2R

1

(

1 − 1

κ

)

(1.7)

The dielectric constant for pentacene is κ ∼ 3. An effective size of the pentacene

molecule is estimated from the lattice vectors

a = (7.900, 0.000, 0.000) (1.8)

b = (0.4444, 6.044, 0.000) (1.9)

c = (−6.153,−2.858, 14.502) (1.10)

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The volume of the unit cell is given by

Vcell = a · (b × c) = 6.924 × 10−28 m3 (1.11)

There are two pentacene molecules per unit cell, so the effective diameter of one

pentacene molecule can be found as

D ≈(

Vcell

2

)1/3

= 7.02 × 10−10 m (1.12)

Using R = D/2, the polarization, in terms of voltage is found to be

P± = 1.37 V (1.13)

This is roughly the same value of P± = 1.00V calculated by Tsiper and Soos. Their

calculation also shows that the polarization energy in the bulk varies about 10%

compared to the polarization energy at surfaces or interfaces. This suggests the

≃ 100mV deep traps might easily occur at surfaces and interfaces due to variations

in dielectric constant alone. The picture to be drawn from this analysis is not that

a mobile hole must pay a cost of 1.37 eV to move from one pentacene molecule to

the next, but that the mobile home moves between pentacene molecules and must

drag this polarization with it. A trap can occur if the dielectric environments differ

significantly creating a large barrier to the hole moving.

It is difficult to discern among these different hypotheses with bulk measure-

ments. Perhaps grain boundaries are more susceptible to these types of defects or

these defects could be bulk phenomena. This provides solid motivation to study

pentacene devices microscopically by directly imaging the spatial distribution of

charge traps.

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1.3 Microscopic characterization of organic electronic ma-

terials

The inability of bulk measurement techniques to definitively determine the

location of the charge traps has led to the need for a microscopic technique that

is sensitive to charge and compatible with these materials. Many microscopic

techniques have been employed to study organic electronic materials including

electric force microscopy (EFM), conducting probe atomic force microscopy (CP-

AFM), near-field scanning optical microscopy (NSOM), and scanning tunneling

microscopy (STM). High vacuum EFM is the only technique that is capable of

imaging charge, potential and capacitance directly in a working device. By working

in vacuum, the sensitivity is increased and provides an environment free of much

of the oxygen and water which degrade organic based devices.

Chapter 3 will cover in detail the microscope built to investigate charge trapping

in pentacene. Pentacene thin film transistors and their experimental development

are discussed in the next chapter.

References

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[5] R. D. McCullough, R. D. Lowe, S. Tristram-Nagle, M. Jayaraman, D. L.Anderson, and P. C. Ewbank, “Design and control of conducting polymerarchitectures: Synthesis and properties of regiochemically well-defined poly(3-alkylthiophenes,” Synth. Met., vol. 55, pp. 1198–1203, 1993.

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Mater., vol. 8, no. 11, p. 2542, 1996.

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[26] J. H. Kang, D. da Silva, J. L. Bredas, and X. Y. Zhu, “Shallow trap statesin pentacene thin films from molecular sliding,” Appl. Phys. Lett., vol. 86,no. 15, 2005.

[27] E. V. Tsiper and Z. G. Soos, “Electronic polarization in pentacene crystalsand thin films,” Phys. Rev. B, vol. 68, no. 8, 2003.

[28] J. E. Northrup and M. L. Chabinyc, “Gap states in organic semiconductors:hydrogen- and oxygen-induced states in pentacene,” Phys. Rev. B, vol. 68,no. 4, p. 041202, 2003.

[29] Y. L. Shen, A. R. Hosseini, M. H. Wong, and G. G. Malliaras, “How to makeohmic contacts to organic semiconductors,” ChemPhysChem, vol. 5, no. 1,pp. 16–25, 2004.

[30] D. J. Gundlach, Y. Y. Lin, T. N. Jackson, S. F. Nelson, and D. G. Schlom,“Pentacene organic thin-film transistors - molecular ordering and mobility,”IEEE Electr. Device L., vol. 18, no. 3, pp. 87–89, 1997.

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[31] Y. Y. Lin, D. J. Gundlach, S. F. Nelson, and T. N. Jackson, “Pentacene-based organic thin-film transistors,” IEEE T. Electron Dev., vol. 44, no. 8,pp. 1325–1331, 1997.

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[40] G. Horowitz and M. E. Hajlaoui, “Grain size dependent mobility in polycrys-talline organic field-effect transistors,” Synth. Met., vol. 122, no. 1, pp. 185–189, 2001.

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[43] T. Minari, T. Nemoto, and S. Isoda, “Fabrication and characterizationof single-grain organic field-effect transistor of pentacene,” J. Appl. Phys.,vol. 96, no. 1, pp. 769–772, 2004.

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CHAPTER 2

PENTACENE - DESCRIPTION, TRANSISTORS AND

PERFORMANCE

2.1 The pentacene molecule

The pentacene molecule is an cyclic aromatic hydrocarbon (C22H14) that re-

sembles five fused benzene rings. It is highly planar where the pz orbitals from

each of the carbon atoms forms molecular orbital that are delocalized over the

entire molecule. The energy difference between the highest occupied molecular or-

bital (HOMO) and the lowest unoccupied molecular orbital (LUMO) of pentacene

films has been reported to be in the range of 2 eV [1, 2]. Fig. 2.1(a) shows the

structure of the pentacene molecule along with its dimensions. Fig. 2.1(b) shows

the delocalized pz electrons that extend over the entire molecule. Fig. 2.1(b) is

a conceptualization to convey the idea that the electrons are free to move in this

region of space.

Pentacene forms a herring-bone arrangement when deposited onto a surface

of sufficient quality (low surface roughness, hydrophobic and clean) as shown in

Fig. 2.1(c) [3]. It is interesting to note that the typical direction of current flow

in electrical devices made from pentacene is not along the length of the molecule.

The unit cell has a triclinic basis with two pentacene molecules per unit cell [3].

The interaction between pentacene molecules is mostly due to relatively weak Van

der Waals forces. The interaction between molecules plays an important role in

understanding the electrical properties, as many of the trapping hypotheses invoke

the structural quality of the film. The extent to which structural variations affect

the electrical properties is the subject of much theoretical work [4–6].

18

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16 Å

(a)

(b)

(c)C H22 14

Figure 2.1: (a) The chemical structure of the pentacene molecule, (b) a

side view of the pentacene molecule showing the delocalized pz electrons,

and (c) the herring-bone packing arrangement of pentacene molecules

in the thin-film phase.

The two center carbon atoms are the most reactive resulting in common forms

of impurities in device grade pentacene. Two possible impurities that can be

found in pentacene film are shown in Fig. 2.2. The first, shown in Fig. 2.2(a)

involves the addition of a hydrogen atom to each of the central carbon atoms.

The second, shown in Fig. 2.2(b), involves the addition of an -OH group to the

central carbon atoms. Not only do these two impurities break the conjugation by

using the pz orbital, they also remove the planarity of the molecule. It has been

shown using high pressure liquid chromatography that pentacene purchased from

Aldrich contains a easily measurable amount of 6,13-pentacenequinone, shown in

Fig. 2.2 [7].

2.2 Thin-film Transistor

The metal-oxide-semiconductor field effect transistor (MOSFET) is one of the

basic components of most modern microelectronics. MOSFETs are well suited to

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C H22 16 dihydropentacene C H O22 12 2 6,13-pentacenequione

(a) (b)

Figure 2.2: Two possible defects causing impurity in pentacene thin

films. (a) Dihydropentacene results from an addition of a hydrogen atom

to each of the cental carbons and (b) 6,13-pentacenequinone results from

the addition of an -OH group to both central carbon atoms.

VG

VSD

VG

VSD

L(a) (b)

(d)(c)

Figure 2.3: Introduction to thin-film transistors. (a) Bottom contact

geometry, (b) top contact geometry, (c) current voltage characteristics,

and (d) ISD,sat vs. VG used to determine the mobility.

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low conductivity semiconductors such as amorphous silicon and semiconducting

organic materials. Amorphous silicon and organics, particulary pentacene, share

common values of performance such as the conductivity and mobility. However, a

major difference is that amorphous silicon is held together by covalent bonding and

organics are held together by weak van der Waals forces. This difference manifests

itself as structural changes in the organic due to the presence of charges, i.e. the

molecule stretches or contracts due to the breaking of chemical bonds as charge

resides on or off the molecule. This small structural change is localized and is

called a polaron moving through the organic. Many review articles summarize

the operation of MOSFETs using organic materials as their active components [8].

The term organic field effect transistor (OFET) is commonly used to describe

MOSFETs that use organic materials.

A MOSFET is essentially a parallel plate capacitor where one plate consists

of the charge carriers in the semiconductor and the other plate is a metal gate

electrode. The density of charge carriers in the organic is therefore modulated by

the gate voltage. Contacts are made to the organic and use the charge carriers to

form a conducting channel. Two device geometries commonly used with organics

are shown in Fig 2.3. A large electrode is used as a back gate which can be made of

heavily doped silicon, conducting polymers [9], or anything conductive. Electrically

separating the gate from the semiconductor is a gate insulator or dielectric layer.

The source and drain electrodes, as well as the organic, are then deposited on the

dielectric layer.

Fig 2.3(a) shows a bottom-contact field effect transistor (BC-FET) configura-

tion where the source and drain electrode are defined before the addition of the

organic layer. The main advantage of a BC-FET is that the source and drain

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electrodes can be defined using optical or e-beam lithography enabling gap lengths

down to 30 nm or smaller [10]. The main disadvantage is that, for many organics,

the source and drain electrodes form a poor contact to the organic material [11,12].

Fig 2.3(b) shows a top contact field effect transistor (TC-FET) configuration

where the organic is added prior to defining the source and drain electrodes. The

advantages/disadvantages of a TC-FET are exactly opposite of those of a BC-FET.

Most organics are not compatible with the solvents used in optical and e-beam

lithography, requiring an alternate route to define source and drain electrodes.

This is usually achieved through shadow masking which limits the device gap to

10 µm or larger – 10 µm devices are very difficult to reliably fabricate. Despite

the difficulty in defining the source and drain electrodes, the TC-FET has a huge

advantage by making good ohmic contact to most organic materials, particularly

pentacene [12].

The electrical properties of an organic MOSFET are described using a similar

treatment as with inorganic MOSFET. The main difference is that organic MOS-

FETs operate through injection of majority charge carriers into the accumulation

layer, whereas inorganic MOSFETs typically inject minority carriers into an inver-

sion layer. A plot showing the source-drain current, ISD, versus the source drain

voltage, VSD, at various gate voltages, VG is shown in Fig. 2.3(c). The mobility is

determined in the saturation regime according to [8]

ISD, sat =W

2LµCi (VG − VT )2 (2.1)

where ISD,sat is the current at saturation, W is the width of the transistor gap, L

is the length of the transistor gap, µ is the hole mobility, Ci is the capacitance per

unit area of the gate dielectric. The threshold voltage, VT accounts for any voltage

drops across the gate dielectric or at the insulator/semiconductor interface due to

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trapped charge or dipoles.

Fig. 2.3(d) shows the square root of ISD,sat versus VG. Fitting this plot to

Eq. 2.1 yields the hole mobility in the saturation regime and also VT . The parallel

plate geometry makes the determination of Ci quite easy by using the following

equation,

Ci =ǫ0κ

d(2.2)

where ǫ0 is the permittivity of free space, κ is the dielectric constant of the gate

dielectric; κ = 3.9 for SiO2. Here, d is the thickness of the gate dielectric which

is typically ∼ 325 nm for devices used in these experiments. This yields a typical

value of Ci:

Ci =(8.85 × 1012 F ·m−1) · 3.9

325 nm= 1.062 × 10−8 F · cm−2 (2.3)

The next section outlines the fabrication process of making the thin film field

effect transistor substrates used in these experiments.

2.3 Substrates

Transistors in both bottom- and top- contact configurations were fabricated for

use in these trap imaging experiments. The requirements of our microscope put

design limitations on the device geometries which will be addressed throughout

this section. Bottom contact device fabrication will be discussed first followed by

the fabrication of shadow masks to make top contact devices. All device substrates

were fabricated at the Cornell Nanofabrication Facility (CNF).

The development of the bottom-contact recipe has been passed down through

a couple of research groups and the specific history is not known. Most of the trap

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Define Gate Electrodes

Develop (300 MIF)

Etch oxide and silicon

Deposit chrome/gold(thermal or e-beam)

Develop (MF 321)

Cr/Au

Mask

Lift-off(acetone or 1165)

Image reversal(YES oven, HTG flood expose)

Resist

Oxide

n Si++

Define source/drainelectrodes

(a) (b)

(c) (d)

(e) (f)

Figure 2.4: The nanofabrication process used to make bottom contact

device substrates

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imaging experiments were performed using the bottom-contact configuration. The

main steps to the fabrication process are outlined in Fig. 2.4.

The fabrication process starts with a commercial prime silicon wafer with low

resistivity (0.001 − 0.005 Ω · cm). The low resistivity silicon is used as the back

gate. A thermal oxide is grown to a thickness of ∼ 300 nm (not shown) using

a wet oxidation process at 900C for 90 min. This layer acts as a good quality

dielectric layer insulating the source and drain electrodes from the gate electrode.

The oxidation process begins by performing a MOS clean of the wafers which is a

specific series of chemicals designed to remove trace metals and organic material

prior to placing them in the furnace. The first step in the MOS clean is a base

rinse for 10 min in a 10:2:1 solution of H2O, H2O2 and NH4OH followed by a rinse

in deionized (DI) water. The second step is an acid rinse for 10 min in a 10:2:1

solution of H20, H2O2 and H2SO4 followed by a rinse in DI water. The wafers

are then considered “MOS Clean” for approximately 6 hours. The wafers can be

placed in the furnace anytime during this 6-hour period. About 10 wafers are

stacked in the furnace at one time with one additional sacrificial wafer used at

each end. The outside wafers do not have good uniformity.

The oxidation step is an arduous task and an attempt to bypass this step by

purchasing wafer with oxide already grown on them yielded poor results. The

purchased oxide was 200 nm of thermally grown oxide from Silicon Quest. The

quality of the oxide was tested by evaporating small gold pads directly on the oxide

and increasing the voltage between the gold pad and the gate until there was a

failure. The maximum electric field at breakdown of both the Silicon Quest oxide

and CNF oxide is ∼ 5 MV/cm which is consistent with industry standards and

previously quoted values [13].

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10-11

10-10

10-9

10-8

10-7

Leak

age

Cur

rent

[A]

-40 -30 -20 -10 0Gate Voltage [V]

Oxide CNF (~260 nm) Silicon Quest Oxide (~200 nm)

Figure 2.5: The gate leakage current through the gate oxide layer in both

Silicon Quest oxide and oxide grown at CNF. The total area through

which the current flows is estimated as 20 × 10−6m2

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Fig. 2.5 shows the leakage current through both purchased oxide and oxide

grown at CNF through contact pads of the same area. Note the log scale. The

leakage current through the CNF oxide is flat at 10−10 A for the entire range of gate

voltages that we use in our experiments. The leakage current through the silicon

quest oxide, however, is 2-3 orders of magnitude higher, increasing with the gate

voltage. The oxide thickness is different but not enough to account for the large

difference in leakage current. Even though using a commercial oxide from Silicon

Quest saves a dreaded MOS clean and oxide growth in the transistor fabrication

process, the purchased oxide does not perform to a satisfactory standard to be

used in our devices.

Contact to the gate from the top of the devices simplifies the experimental setup

for use in a probe station or the electric force microscope. The gate electrodes are

defined using contact photolithography. The oxide is completely etched away and

about 500 nm of silicon is also etched to assure good contact (see Fig. 2.4(a) and

Fig. 2.4(b)).

The source and drain electrodes are also defined using contact photolithography

with image reversal. The image reversal gives a negatively sloped side profile to

the photoresist and is important for lift-off (see Fig. 2.4(c) and Fig. 2.4(d)).

An adhesion layer of chrome, typically 5 nm, and gold, typically 50 nm, is

thermally evaporated over the entire wafer at a rate of 0.5−1 A/s. Lift-off is done

in acetone or 1165 remover for at least 4 hours (see Fig. 2.4(e) and Fig. 2.4(f)).

The complete recipe is in Appendix A.

The resulting wafer layout, shown in Fig. 2.6(a), allows for twenty-one indi-

vidual devices to be arranged on a standard 100 mm (4”) wafer. Separating the

devices can be tricky. The preferred technique is to use a wafer dicer that cuts

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Source Drain

Gate

InterdigitatedFingers

GapLength

StandardGeometry

(a) (b) 1.6 cm

100 mm

Figure 2.6: (a) The layout of 21 individual devices on a on 4” wafer.

(b) The individual parts making up one single device. Each device

includes three transistors that are in the standard geometry (i.e. non-

interdigitated, W:L ratio = 10)

the individual devices out of the wafer. It is important to protect the devices from

scratches and dust by applying a coat of photoresist prior to dicing. An alternate

technique (i.e. used when the wafer dicer at CNF is being repaired) is to scribe the

wafer and just snap the pieces off. This generally results in breaks right though

the center of many devices.

The layout of an individual transistor substrate is shown in Fig. 2.6(b). The

requirements of the electric force microscope limit us to substrates that are 1.6 cm

or smaller while still enabling access to the electrodes beyond the scan head of the

microscope. To achieve this, the source, drain, and gate contacts are brought near

the edge of the device. The contacts must also be at least 2 mm away from the edge

to avoid unnecessary gate leakage. The very center of the device contains roughly

60 interdigitated gold fingers that make up the source and drain electrodes. The

This makes the active area approximately 3 × 3 mm square. The gold fingers are

40µm wide resulting in about 70 device gaps. The number of gaps vary slightly

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depending on the gap length, L. The large area enables an easier location of a

single gap with the electric force microscope. The device substrate includes three

transistors that are in the typical configuration, i.e. the gap width to gap length

ratio is 10. These are included for the purpose of testing that the interdigitated

geometry has similar characteristics as the standard geometry. It is generally true

that the standard device performs similarly to the interdigitated device, except that

the gate leakage is larger with the interdigitated geometry because of the larger

area. The substrates are now ready for pentacene deposition which is described in

Sec. 2.4.

Some work was done developing a shadow mask to define top-contact source

and drain electrodes. The basic idea is to fabricate two square holes separated

by a small beam in a silicon wafer. This beam defines the transistor gap. In

this case the pentacene would first be deposited (see Sec. 2.4) onto a clean wafer

containing only the oxide layer. The shadow mask is clamped to the device wafer

and gold is thermally evaporated through the mask defining the source and drain

electrodes. The complete recipe for the shadow mask can be found in Appendix B.

The reliability of shadow masking was rather poor and is discussed in detail in

chapter 5.

2.4 Deposition

Pentacene was purchased from Aldrich and used without further purification.

It is a light- and oxygen-sensitive purple powder that is kept in a dark bottle inside

a desiccator when not being used.

Prior to evaporation, the substrates are cleaned by sonication for 10 min in ace-

tone, then 10 min in isopropanol. They are sprayed with acetone and isopropanol

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while spinning at 3000 rpm and allowed to dry while still spinning. The last step

in the clean process is a 10 min UV-ozone clean. Small variations to this clean

procedure have been used and all seem to work similarly – other solvents have been

tried such as chloroform and methanol, as well as cleaning them mechanically with

soap, water and a swab.

The cleaning procedure cannot include any acid or base because of the presence

of the gold electrode in the bottom-contact configuration. However, an attempt to

clean the substrates using a Piranha solution was tried on the suggestion of CNF

staff and because the cleaning procedure in the previous paragraph does not get

the sample perfectly clean as can be seen by the AFM image of a gold electrode

in Fig. 2.7(a). The sample was then placed in the Piranha solution for 30 min.

The Piranha solution attacked the gold electrode and made the surface extremely

clean, but extremely rough.

After cleaning, the substrates were taken immediately to the evaporation cham-

ber and placed under vacuum. The vacuum chamber is allowed to reach a pressure

of ∼ 10−6 torr prior to evaporation. A crucible containing a small amount of

pentacene powder is heated to a temperature of ∼ 230C, the sublimation tem-

perature of pentacene in vacuum. It is important to heat the pentacene slowly

as it tends to spit resulting in an unpredictable sublimation rate and ultimately

poor films. A typical deposition rate is ∼ 0.1 A/s or slower. A typical thin-film

thickness is ∼ 50nm. Under these conditions, polycrystalline grain sizes on the

scale of 1 − 3 µm can be expected to grow on the SiO2. Grain sizes on the gold

electrode are always very small, nm typically.

An alternative deposition procedure was followed to achieve larger grain sizes

and for the purpose of burning off any remaining water or any organics minimizing

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(a)

(b)

Figure 2.7: (a) Gold electrode prior to cleaning with Piranha solution

and (b) the effect of the Piranha solution on the roughness of the gold

electrode.

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the number of pinning centers. Prior to deposition, that substrate was heated

to 180C then allowed to cool to 60C. Depositing at an elevated temperature

gives the pentacene molecules more kinetic energy, allowing them to sample more

of the surface before sticking. It usually takes about 6-8 hours for the substrate

to cool since it is under vacuum, providing no place for the heat to dissipate.

The deposition is performed holding the substrate at 60C. This procedure was

typically followed when growing the thin 1-4 monolayer films and was required to

get island sizes on the scale of 4 − 5 µm.

2.5 Characterization

The first step to understanding what is important about pentacene thin-film

transistors as they relate to microscopic studies is to understand their bulk elec-

trical characteristics.

The electrical characterization of the pentacene thin film transistors consists

mainly of extracting the mobility from the current voltage characteristics using

Eq. 2.1. Almost all of the bottom-contact devices made using our technique yield

a mobility in the range of 0.01 − 0.001 cm2/Vs, which is not uncommon for a

bottom contact film with an untreated surface [14].

One of the main goals of this experiment is to understand how the topography

is correlated with the trap location. The experiment began with an investigation of

the topography to understand its correlation with the trap location. The growth

of pentacene is well known to form a polycrystalline film with grain sizes from

200 nm to 20 µm when thermally deposited on SiO2 [15]. The typical topography

of the pentacene film grown for these experiments is shown in Fig. 2.8. Fig. 2.8(a)

shows the pentacene film on the gold electrode, which shows much smaller grains

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(b)

(a)

(c)

Figure 2.8: (a)Pentacene Topography over metal and (b)over SiO2.

(c)Topography at the interface between the gold and SiO2 showing the

mismatch in the grain sizes. The line profile shows the height mismatch.

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34

compared to the pentacene grown on the SiO2 (Fig. 2.8(b)). This mismatch in grain

sizes causes a problem at the interface of the contact electrode where the charges

must be injected and leads to high contact resistance [12]. Additionally, if the

electrodes are not recessed, there is a height mismatch, suggesting implications for

injection. Fig. 2.8(c) shows both the height mismatch and the grain size mismatch.

Fig. 2.9 (a) shows the I-V characteristics for a standard non-interdigitated

pentacene thin-film transistor. The source-drain current shows good saturation.

Near VSD, the low slope of ISD indicates poor contact resistance. The square root

of the source-drain current at saturation versus the gate voltage is shown in figure

Fig. 2.9(b). The mobility and threshold voltage is calculated using Eq. 2.1 and

have values of 0.01 cm2/Vs and −5.1 V respectively.

A procedure for recessing the source and drain electrodes was implemented to

both aid in the electric force microscopy imaging (see Chap. 3) and to eliminate

the height mismatch mentioned in the previous paragraph. As can be seen from

topography and line profile of Fig. 2.10(a), recessing the electrodes did produce a

flat device. However, there is still a poor matching of the grain sizes at the contact,

which is magnified in Fig. 2.10(b). There even appears to be a small build-up of

pentacene on the gold side of the contact interface and a small valley of pentacene

on the SiO2 side of the contact interface.

Fig. 2.11 (a) shows the current-voltage characteristics for an interdigitated pen-

tacene thin-film transistor. The source-drain current shows good saturation. The

square root of the source-drain current at saturation versus the gate voltage is

shown in figure Fig. 2.11(b). The mobility and threshold voltage is calculated

using Eq. 2.1 and have values of 0.012 cm2/Vs and −17 V respectively.

No real noticeable increase or decrease in the device mobility were apparent;

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(a)

(b)

Figure 2.9: (a) Current-voltage characteristics for a pentacene (25 nm

thick) thin-film transistor with W = 600 µm, L = 60 µm and an oxide

thickness of T = 200 nm. The gate voltage goes from 0 to −30 V in −1.5V

steps. (b) The square root of the source-drain current at saturation

versus the gate voltage. The mobility, threshold voltage and on/off

ratio is calculated from the saturation regime.

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Figure 2.10: Pentacene Topography over the entire transistor gap. The

gain size mismatch can be seen at the metal-SiO2 interface. (b) An

enlarged image at the metal-SiO2 interface showing the buildup of pen-

tacene and many small grains at the interface.

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(a)

(b)

Figure 2.11: (a)Current-voltage characteristics for a pentacene(50 nm

thick) thin-film transistor with W = 20.1 cm, L = 6.5 µm and an oxide

thickness of T = 275 nm. The gate voltage goes from 0 to −50 V in −5 V

steps. (b) The square root of the source-drain current at saturation ver-

sus the gate voltage. The mobility and threshold voltage are calculated

from the saturation regime.

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38

however there were negative effects on the contact resistance, expressed as the slow

rising source-drain current at low source-drain voltages. In contrast, the transistor

did reach good saturation. The recessed electrodes were used in the electric force

microscopy experiments because the benefits of the flat device out-weighed the

costs of having bad contacts, given that contacts and injection are not the focus

of these experiments.

It can also be concluded from the current-voltage characteristics that a majority

of the charge traps have been filled in the time it takes to sweep one current voltage

curve, which is typically under 1 minute. If traps were continuing to fill, there

would be a noticeable drop in the current in the saturation regimes. It was noticed

that there is a very long time scale decay to the source drain current as traps

continue to fill, however, the majority are filled on the timescale of 1 minute or

less.

The next section will describe the instrument used to image charge trapping in

these pentacene thin-film transistors.

References

[1] L. Sebastian, G. Weiser, and H. Bassler, “Charge transfer transitions in solidtetracene and pentacene studied by electroabsorption,” Chem. Phys., vol. 61,no. 1-2, pp. 125–35, 1981.

[2] S. Park, S. Kim, J. Kim, C. Whang, and S. Im, “Optical and luminescencecharacteristics of thermally evaporated pentacene films on si,” Appl. Phys.

Lett., vol. 80, no. 16, p. 2872, 2002.

[3] C. D. Dimitrakopoulos, A. R. Brown, and A. Pomp, “Molecular beam de-posited thin films of pentacene for organic field effect transistor applications,”J. Appl. Phys., vol. 80, no. 4, pp. 2501–2508, 1996.

[4] R. Endres, C. Fong, L. Yang, G. Witte, and C. Woll, “Structural and electronicproperties of pentacene molecule and molecular pentacene solid,” Comp.

Mater. Sci., vol. 29, no. 3, pp. 362–370, 2004.

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39

[5] M. L. Tiago, J. E. Northrup, and S. G. Louie, “Ab initio calculation of theelectronic and optical properties of solid pentacene,” Phys. Rev. B, vol. 67,no. 11, pp. 115212–1–6, 2003.

[6] J. E. Northrup and M. L. Chabinyc, “Gap states in organic semiconductors:hydrogen- and oxygen-induced states in pentacene,” Phys. Rev. B, vol. 68,no. 4, p. 041202, 2003.

[7] O. D. Jurchescu, J. Baas, and T. T. M. Palstra, “Effect of impurities onthe mobility of single crystal pentacene,” Appl. Phys. Lett., vol. 84, no. 16,pp. 3061–3063, 2004.

[8] G. Horowitz, “Organic field-effect transistors,” Adv. Mater., vol. 10, no. 5,pp. 365–77, 1998.

[9] H. Sirringhaus, T. Kawase, R. Friend, T. Shimoda, M. Inbasekaran, W. Wu,and E. Woo, “High-resolution inkjet printing of all-polymer transistor cir-cuits,” Science, vol. 290, no. 5499, pp. 2123–2126, 2000.

[10] Y. J. Zhang, J. R. Petta, S. Ambily, Y. L. Shen, D. C. Ralph, and G. G.Malliaras, “30 nm channel length pentacene transistors,” Adv. Mater., vol. 15,no. 19, pp. 1632–1635, 2003.

[11] J. A. Nichols, D. J. Gundlach, and T. N. Jackson, “Potential imaging ofpentacene organic thin-film transistors,” Appl. Phys. Lett., vol. 83, no. 12,pp. 2366–2368, 2003.

[12] K. P. Puntambekar, P. V. Pesavento, and C. D. Frisbie, “Surface potentialprofiling and contact resistance measurements on operating pentacene thin-film transistors by kelvin probe force microscopy,” Appl. Phys. Lett., vol. 83,no. 26, pp. 5539–5541, 2003.

[13] H. Klauk, D. Gundlach, M. Bonse, C.-C. Kuo, and T. Jackson, “A reducedcomplexity process for organic thin film transistors,” Appl. Phys. Lett., vol. 76,no. 13, pp. 1692–4, 2000.

[14] Y. L. Shen, A. R. Hosseini, M. H. Wong, and G. G. Malliaras, “How to makeohmic contacts to organic semiconductors,” ChemPhysChem, vol. 5, no. 1,pp. 16–25, 2004.

[15] R. Ruiz, B. Nickel, N. Koch, L. C. Feldman, R. F. Haglund, A. Kahn, andG. Scoles, “Pentacene ultrathin film formation on reduced and oxidized sisurfaces,” Phys. Rev. B, vol. 67, no. 12, 2003.

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CHAPTER 3

ELECTRIC FORCE MICROSCOPY

3.1 Introduction to Electric Force Microscopy

The versatility of the atomic force microscope (AFM) [1] has made it an in-

valuable tool useful across many fields of study, from physics and chemistry to

biology. The electric force microscope (EFM) used in this experiment is a type

of AFM sensitive to electrostatic forces between a sharp metalized cantilever tip

and the sample. The EFM is capable of measuring local capacitance and potential

with a resolution that is set by the tip radius, the tip-sample separation, and the

long range nature of the electrostatic interaction. While the resolution may be

limited to ∼ 100 nm, it is sensitive to potential shifts due to charges at buried

interfaces [2,3]. By taking advantage of the force sensitivity of cantilevers, the sen-

sitivity of the EFM is solely matched by scanning single electron transistors, which

only operate at cryogenic temperatures. The sensitivity of an EFM operating in

vacuum and at room temperature easily reaches single charge sensitivity [4–8].

The microscopic study of pentacene thin film transistors investigating contacts

is limited to only two prior studies. The first, done by the Frisbie group at the

University of Minnesota [9], compared the contact effects for both top and bottom

contact devices using Kelvin probe force microscopy. They showed that bottom

contact devices have a large voltage drop at the contact, whereas the top contact

devices do not. The conclusion was that bottom contact devices are contact limited

and top contact devices are bulk limited.

The Jackson group investigated how band lineup between the contact metal

and pentacene affects injection [10]. They observed voltage drops at the contact

40

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using different types of metal as electrodes. They concluded that band lineup is

important for efficient charge injection.

These two studies show the value that microscopy studies have in proving or

disproving commonly held assumptions, such as the notion that bottom contacts

make poor contact to pentacene. This type of information is nearly impossible to

deduce from bulk measurements.

The purpose of the experiments presented in this document are not meant

to study contacts or transport, but to concentrate on charge trapping [2]. A

description of the concepts, design, construction and utilization of an electric force

microscope to study charge trapping will be the focus of this chapter.

3.2 Charge Trapping in EFM

This section outlines theory developed in the Marohn Lab to explain current

EFM data on organic systems, including transport contact effects, and trapping

[3, 11,12].

The central assumptions surrounding the trapping theories is that the traps are

either isolated at the grain boundaries or that they are homogeneously distributed

throughout the pentacene. The physical and chemical origins of these traps are

not known.

The simplest electric force microscope measurement involves bringing a metal-

coated cantilever near a surface and measuring the mechanical resonance frequency

of the cantilever as a function of the voltage applied between the cantilever and

the sample surface. This measurement was applied to films of organic electronic

materials present in co-planar two-terminal devices and field effect transistors. In

this section the free energy, force, and force gradient experienced by the cantilever

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V +Q

-Q

µt

µs

V +Q

-Q

µt

µ (x)s

V =0S VD

(a) (b)

Figure 3.1: (a) Cantilever near a metal sample. (b) Cantilever posi-

tioned over a two-terminal device.

when studying such organic electronic devices are derived.

3.2.1 Metal Plates

Analysis of the situation is sketched in Fig. 3.1(a). A metal-coated cantilever

tip having chemical potential µt is brought near a metal sample with chemical

potential µs. The sample is grounded and a voltage V is applied to the tip. As

a result of the tip-sample chemical potential difference and the applied voltage,

a charge Q is transferred from the sample to the tip. The energy to charge the

system at constant temperature, the Helmholtz free energy, is given by

A(Q, T ) =Q2

2C+

Q

e(µs − µt) . (3.1)

Here C is the tip-sample capacitance. The first term is the energy stored in the

electric field generated between the tip and the substrate, and the second term is

the change in free energy associated with transferring electrons between materials

with different chemical potentials.

The voltage is conjugate to the charge, and is given by the derivative

V =

(

∂A

∂Q

)

T,z

=Q

C+

∆µ

e, (3.2)

where ∆µ = µs − µt. When the cantilever is set to vibrate, charge will attempt to

move between the plates to maintain constant voltage. This is possible if the time

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43

constant of the circuit is sufficiently small compared to the period of oscillation.

Assuming this to be the case, the force experienced by the cantilever is obtained

by differentiating the grand canonical free energy, which is obtained from A by a

Legendre transformation:

Ω(V, T ) = A − QV. (3.3)

The term −QV accounts for the energy required to move the charge through the

battery. In writing Ω, Q must be eliminated as a dependent variable. This is done

in the usual way, by using Eq. 3.2 to write Q as a function of V and using the

resulting expression to recast A in terms of V . The result is

Ω(V, T ) = −1

2C(V − ∆µ

e)2. (3.4)

If the cantilever vibrates slowly enough that the process of moving charge be-

tween the metal cantilever tip and the metal substrate may be considered isother-

mal, then the electrical force on the cantilever is given by the derivative of the

grand canonical free energy with respect to the vertical displacement z of the tip,

F = −(

∂Ω

∂z

)

T,V

=1

2

∂C

∂z(V − ∆µ

e)2. (3.5)

For small deflections, the cantilever may be modeled as a one dimensional harmonic

oscillator having a spring constant k0. Balancing the electrical force F with the

Hooke’s law restoring force k0z. The equilibrium deflection,

z =1

2k0

∂C

∂z(V − ∆µ

e)2, (3.6)

which is a quadratic function of voltage. In addition to displacing the cantilever,

the applied voltage will also change the cantilever’s spring constant and thus its res-

onance frequency. To see this, the capacitive derivatice, ∂C/∂z = C ′+C ′′z+O(z2),

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44

is expanded in a series about z = 0. To first order, the electric force is linear in

the cantilever displacement,

F ≃ 1

2C ′(V − ∆µ

e)2 +

1

2C ′′(V − ∆µ

e)2z. (3.7)

It follows that the net restoring force, F −k0z, is linear in z, and may be described

by an effective cantilever spring constant,

k = k0 −1

2C ′′(V − ∆µ

e)2. (3.8)

The mechanical resonance frequency f of the cantilever is determined from the

spring constant and the effective mass m of the cantilever using

f =1

k

m. (3.9)

In all experiments discussed here, the voltage-induced change in the cantilever

spring constant is small compared to k0. In this limit, the cantilever resonance

frequency is given by

f(V ) ≃ f0 −f0

4k0

C ′′(V − ∆µ

e)2. (3.10)

The cantilever resonance frequency decreases quadratically with voltage, having a

maximum at a voltage Vmax = ∆µ/e determined by the difference in the chemical

potentials between the sample and the tip. Since f0 and k0 are known, C ′′ can be

determined from the curvature of the frequency-voltage parabola.

3.2.2 Organic Device with Two Co-planar Electrodes

The two-terminal device shown in Fig. 3.1 (b) was used to study metal-to-

organic charge injection. Charge is injected from a grounded metal source elec-

trode, flows through an organic film, and is extracted at a metal drain electrode

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45

held at a voltage Vd. The process is designed to determine what the electric force

microscope measures when it is placed over the film.

Before considering this question, a few remarks on the distinction between the

electrostatic potential, chemical potential, and voltage are helpful. The electro-

chemical potential or voltage in the organic film is

Vs(x) = φ(x) − µ(x)

e, (3.11)

where φ is the electrostatic potential and µ is the local chemical potential, given

by

µ(x) = µ0 + kT ln γ(x)n(x)

n0

. (3.12)

Here n is the charge concentration, γ is the activity coefficient, and µ0 and n0

are the intrinsic chemical potential and concentration of free charges, respectively,

in the bulk material. For simplicity, only one type of charge carrier is considered.

Assuming a Maxwell-Boltzmann (infinite dilution) limit implies γ = 1. The current

density at any point in the film is proportional to the concentration of free charges

and the gradient in the electrochemical potential. In one dimension,

J =eD

kTn(x)

dVs

dx, (3.13)

where D is the diffusion constant. Substituting Eqs. 3.11 and 3.12 into Eq. 3.13

gives, after some simplification,

J = eµndφ

dx+ eD

dn

dx. (3.14)

The Einstein relation, µ = eD/kT , is used to relate the diffusion constant to the

mobility. The first term in Eq. 3.14 represents current due to drift of electrons in an

applied field E = −dφ/dx, and the second term is the current arising from diffusion

of electrons from high concentration to low concentration. The steps leading to

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46

Equation 3.14 make this clear, but both of these contributions to the current are

already captured in Eq. 3.13. The important point is that the current measured is

proportional to the gradient of the electrochemical potential (or voltage), not the

electrostatic potential.

The Helmholtz free energy associated with charges below the tip is given by

A =Q2

2C+

Q

e(µs(x) − µt) , (3.15)

where µs(x) is written to emphasize that the local chemical potential varies in the

film. The mechanical part of A has been left out for simplicity. With the sample

under bias, it can be asserted that

∂A

∂Q= V − Vs(x). (3.16)

The term V is the voltage drop though the external battery, and the term −Vs(x)

accounts for the IR drop between the source electrode and a point x in the film.

The inclusion of both voltages is required to correctly account for the total voltage

drop that the charge Q experiences in passing from the tip to a point below the tip

in the sample. With this in mind, we construct the grand canonical free energy,

Ω = A − Q(V − Vs(x)), (3.17)

and find, after some simplification,

Ω = −C

2(V +

µt

e− Vs(x) +

µs(x)

e)2. (3.18)

Considering Eq. 3.11, this may be written simply as

Ω = −C

2(V +

µt

e− φs(x))2, (3.19)

from which it follows that

f ≈ f0 −f0

4k0

C ′′(V +µt

e− φs(x))2. (3.20)

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Thus, the voltage at which the cantilever frequency is maximum is an indicator of

the value of the local electric potential φs(x). This is true in general, whether or

not the sample to be measured is under bias.

When the drift current is larger than the diffusion current, the local charge

density can be obtained directly from φs. Neglecting dn/dx in equation Eq. 3.14

gives

n(x) ≃ J

eβD

1

φ′s

. (3.21)

Regions where this approximation is obviously problematic are near materials in-

terfaces, where φ′

s can be very large due to the interface dipole, and, moreover, can

be either positive or negative. In such a case, the drift-diffusion equation, Eq. 3.14,

is reconsidered and rewritten as a first order differential equation for n(x)

dn

dx+ eβφ′

sn =J

eD. (3.22)

If both sides of Eq. 3.22 are multiplied by exp(qβφ) and integrate, we find the

solution,

n(x) = e−∆φ(x)e/kTn(0) +J

eD

∫ x

0

e∆φ(x′)e/kT dx′, (3.23)

in terms of the relative potential ∆φ(x) ≡ φ(x) − φ(0) . For an ideal current

flowing in one dimension with constant cross sectional area, the charge density

can be determined from the measured potential φs(x) and current density J using

Eq. 3.23.

3.2.3 Organic Field-Effect Transistor with Trapped Charge

The force which the cantilever experiences was calculated in the experiment

sketched in Fig. 3.2(a). A thin layer of pentacene sits on top of a dielectric layer

above a gate. An amount of charge QT is transferred to the pentacene, leaving a

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48

Q1

Q2

C2

C1 d1

d2

cantilever tipvacuum

gate

Q -Q -QT 1 2=

dielectrichi

dri

k

-Q

+Q charge qi

-qi

tip radius R

(a) (b)

Figure 3.2: Cantilever sample interaction with trapped charge. (a)

Parallel-plate model. Charge QT is trapped at the dielectric-vacuum

interface. (b) Point probe model. In this model, the cantilever interacts

with its image charge in the gate, a trapped charge qi, and the trapped

charge’s image charge −qi.

charge Q1 on the tip, and a charge Q2 on the gate, subject to the constraint of

charge conservation,

Q1 + Q2 + QT = 0. (3.24)

For a parallel-plate geometry, the Helmholtz free energy associated with a uniform

layer of trapped charge is

A =Q2

1

2C1

+Q2

2

2C2

− Q1

e∆µ1 −

Q2

e∆µ2 (3.25)

where

∆µ1 = µtip − µpentacene (3.26)

∆µ2 = µgate − µpentacene (3.27)

Here C1 is the capacitance between the tip and the pentacene, and C2 is the

capacitance of the dielectric between the pentacene and the gate. The thickness

of the pentacene has been neglected. Considering that the charges Q1 and Q2 are

not independent, determining the change of A with respect to the change of one

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49

or the other is of interest. The difference in charge,

q =Q1 − Q2

2, (3.28)

is also a convenient variable because it is directly related to the difference in voltage

between the tip and the gate,

Vtip − Vgate =∂A

∂Q1

− ∂A

∂Q2

=∂A

∂q= V, (3.29)

which is held constant. In terms of q, the Helmholtz free energy takes the form

A =q2

2C+ q

(

ΦΩ +∆µ

e

)

+Q2

T

8C+

QT

2e(∆µ1 + ∆µ2) (3.30)

where the quadratic term depends on the equivalent series capacitance,

C =C1C2

C1 + C2

, (3.31)

and the term linear in q depends on the difference in chemical potential between

the tip and the gate,

∆µ = µtip − µgate, (3.32)

and an additional potential due to the trapped charge,

ΦΩ =QT

2

(

1

C2

− 1

C1

)

. (3.33)

Differentiating Eq. 3.30 with respect to q gives the relation,

q = C

(

V − ΦΩ − ∆µ

e

)

. (3.34)

Subtracting qV from Eq. 3.30 gives the grand canonical free energy

Ω = −1

2C

(

V − ∆µ

e− ΦΩ

)2

+Q2

T

8C+

QT

2e(∆µ1 + ∆µ2) (3.35)

which has a maximum at the voltage

V maxΩ =

∆µ

e+ ΦΩ. (3.36)

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50

The force on the cantilever is given by the derivative of Ω with respect to z;

F = −∂Ω

∂z=

1

2C ′

(

V − ∆µ

e− ΦΩ

)2

− CΦ′

Ω

(

V − ΦΩ − ∆µ

e

)

− Q2T

8C2C ′

=1

2C ′

(

V − ΦF − ∆µ

e

)2

− 1

2

(CΦ′

Ω)2

C ′− Q2

T

8C2C ′. (3.37)

Completing the square in Eq. 3.37, it is observed that a minimum force occurs at

a voltage offset

V minF =

∆µ

e+ ΦF . (3.38)

It should be emphasized that the voltage offset for the force is not the same as ΦΩ,

but is related to ΦΩ through a derivative,

ΦF =1

C ′

d

dz(CΦΩ) , (3.39)

When V = V minF , there remains an additional force on the cantilever,

F (V minF ) = −1

2

(CΦ′

Ω)2

C ′− Q2

T

8C2C ′, (3.40)

which is given by the last two terms in Eq. 3.37. A nonvanishing F (V minF ) implies

a shift in the equilibrium position and effective spring constant of the cantilever

which depends on QT , but not on V . In what follows, F (V minF ) was ignored; the

focus was only on the voltage-dependent part of the effective cantilever spring

constant since it is this which determines the curvature and voltage offset of the

cantilever frequency-versus-voltage parabola.

The change in the spring constant is given by the derivative of (3.37),

∆k = k − k0 = − ∂

∂z

[

1

2C ′

(

V − ΦF − ∆µ

e

)2]

(3.41)

Carrying out the differentiation in Eq. 3.41, and completing the square, it is seen

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51

that the resulting expression for ∆k is isomorphic to Eq. 3.37,

∆k = −1

2C ′′

(

V − ΦF − ∆µ

e

)2

+ C ′Φ′

F

(

V − ΦF − ∆µ

e

)

= −1

2C ′′

(

V − Φk −∆µ

e

)2

+1

2

(C ′Φ′

F )2

C ′′. (3.42)

The maximum spring constant occurs at a voltage,

V (k)max =

∆µ

e+ Φk, (3.43)

however, such that the dependence on trapped charge is neither through ΦΩ, nor

ΦF , but through the offset

Φk =1

C ′′

d

dz(C ′ΦF ) =

1

C ′′

d2

dz2(CΦΩ) (3.44)

3.2.4 Nonuniform Distribution of Trapped Charge

In the preceding discussion it was assumed that the trapped charge is uniformly

distributed, so that the tip-gate could represented as a parallel plate capacitor. It

is instructive to examine the voltage offsets ΦΩ, ΦF , and Φk for this geometry in

more detail, by writing capacitances explicitly:

C1 =ǫ0α

d1 + z, (3.45)

C2 =ǫ0α

d2

, (3.46)

where α is the plate area, and d1+z and d2 are the gaps between tip and sample, and

sample and gate, respectively. The gap between the tip and the sample depends on

the vibrational amplitude z, whereas the gap d2 between the sample and the gate

remains constant. See Fig. 3.2(a), where d2 was scaled by the relative permittivity

of the substrate. Substituting Eqs. 3.45 and 3.46 in Eqs. 3.33, 3.39, and 3.44, the

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voltage offsets were found,

ΦΩ =QT

2ǫ0α(d2 − d1 − z) , (3.47)

Φk = ΦF = −QTd2

ǫ0α= −QT

C2

. (3.48)

Thus the minimum force and maximum spring constant occur at the same voltage,

and each is a measure of the total amount of trapped charge. It is useful to note

that the free energy is not unique. At constant voltage, the same force may be

obtained from the derivative of an alternate free energy Ω = Ω− λV, where λ is a

constant. Choosing λ = QT /2 leads directly to a z-independent voltage offset

ΦΩ = −QT

C2

, (3.49)

from which Eq. 3.48 follows immediately. Eq. ref23 and Eq. ref24 are used to

analyze charge trap experiments presented in later chapters.

When the distribution of trapped charge is non-uniform, an explicit expression

for the Helmholtz free energy can be determined using the method of images. If the

polarizability of the dielectric layer is neglected, the calculation is straightforward.

In such a case it can be shown that the grand canonical free energy has the same

form as Eq. 3.35, but in this case the offset voltage is given by

ΦΩ = − QT

2ǫ0αz + ΦΩ0

(3.50)

where the constant ΦΩ0is a weighted sum of the trapped charges qi over the

difference in their vertical separations d1ifrom the tip and d2i

from the gate;

ΦΩ0=∑

i

qi

2ǫ0α(d2i

− d1i) . (3.51)

Substituting Eq. 3.50 into Eqs. 3.39 and 3.44, the finding was that the voltage

offsets,

ΦF = Φk =∑

i

qi

2ǫ0α[(d2i

+ d2) + (d1 − d1i)] . (3.52)

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for the force and spring constant are the same. It can be shown that the equality

of ΦF and Φk follows from the fact that both 1/C and ΦΩ (Eq. 3.50) are linear in

z for the case of a parallel-plate geometry.

3.2.5 Deviations from the Parallel Plate Geometry

To understand how the voltage offsets ΦF and Φk change as a function of tip

location in an electric force microscope measurement, it is important to consider

a case in which the tip is much smaller than the feature size. The problem can

be solved exactly in the point-probe limit, in which the tip is taken to be a small

metal sphere of radius R which is suspended above the gate electrode at a height

d >> R. See Fig. 3.2(b). In this limit the grand canonical free energy takes the

form,

Ω = −1

2C

(

V − ∆µ

e− ΦΩ

)2

, (3.53)

where the capacitance is that of a conducting sphere above a conducting plane,

C ≃ 4πǫ0R

(

1 +R

2 (d + z)+ O

(

R

d + z

)2)

, (3.54)

and may be expanded as a power series to first order in R/d. The free energy

offset,

ΦΩ =∑

i

qi

4πǫ0

1√

(hi + d + z)2 + r2i

− 1√

(hi − d − z)2 + r2i

, (3.55)

is the Coulomb potential at the tip due to the trapped charges, located by their

cylindrical coordinates (ri, hi) with respect to an axis through the tip, and their

images at (ri,−hi) in the gate electrode below. The polarization of the dielectric

was again neglected. Substituting Eq. 3.54 into Eqs. 3.39 and 3.44, we find that

the force offset

ΦF = ΦΩ − dΦ′

Ω − 2d2

RΦ′

Ω (3.56)

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and the spring constant offset

Φk = ΦΩ − dΦ′

Ω + d2Φ′′

Ω +d3

RΦ′′

Ω (3.57)

are not necessarily the same. If the distribution of charge is uniform, then Φ′

Ω =

Φ′′

Ω = 0, and indeed, ΦF = Φk, as is the case for a parallel plate capacitor. When

the distribution is nonuniform, however, for small enough R, the derivative terms

Φ′

Ω and Φ′′

Ω in (3.56) and (3.57) will be enhanced by the factor d/R (≫ 1). In such

a case, the voltage offsets for the force and spring constant,

ΦF ≃ −2d2

RΦ′

Ω (3.58)

Φk ≃ d3

RΦ′′

Ω (3.59)

will be largely determined by Φ′

Ω and Φ′′

Ω, respectively.

3.3 Cantilever Response to Thermal Fluctuations

The noise in the electric force microscope is set by the response of the cantilever

to random thermal fluctuations. The response of the cantilever follows the equation

of motion for a damped driven harmonic oscillator. This section will outline the

response of the cantilever to both coherent and incoherent driving forces. Coherent

forces arise from external periodic driving such as a sinusoidal force from a piezo

element placed beneath the base of the cantilever. Incoherent forces arise from

sources such as room vibrations or thermal fluctuations.

The response of the cantilever is described by the equation of motion for a

damped driven harmonic oscillator,

x +ω0

Qx + ω2

0x =ω2

0F

k(3.60)

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where x is the position of the cantilever tip, ω0 is the natural resonance frequency,

Q is the quality factor, F is any applied force (coherent of incoherent), and k is the

spring constant. A natural question to ask is what is the frequency dependence

of the cantilever displacement for a given driving force. The two cases for the

functional form of the driving force mentioned previously, coherent and incoherent,

will be treated below.

Coherent Driving Force First, the case where the functional form of F (t) is

sinusoidal,

F (t) = F0 cos (2πft) . (3.61)

The steady state response must also be periodic and have the form

x(t) = xc cos (2πft) + xs sin (2πft) (3.62)

where xc is the in-phase response and xs is the out-of-phase response. The next

step is to plug in the appropriate derivatives of Eq. 3.62 and Eq. 3.61 into Eq. 3.60

to get an expression for xc and xs.

First, taking the time derivative of the cantilever response gives:

x(t) = −2πfxc sin (2πft) + 2πfxs cos (2πft) . (3.63)

The second derivative is:

x(t) = −4π2f 2xc cos (2πft) − 4π2f 2xs sin (2πft) . (3.64)

Note that,

x(t) = −4π2f 2x(t). (3.65)

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The equation of motion can then be written as,

[

xc

(

f 20 − f 2

)

+ff0xs

Q

]

cos (2πft) +

[

xs

(

f 20 − f 2

)

− ff0xc

Q

]

sin (2πft) = (3.66)

f 20 F0

kcos (2πft) . (3.67)

Matching the sine and cosine terms on both sides of the equation results in two

simultaneous equations for xc and xs,

xc

(

f 20 − f 2

)

+ff0xs

Q=

f 20 F0

k(3.68)

and

xs

(

f 20 − f 2

)

− ff0xc

Q= 0. (3.69)

Solving for xc and xs gives,

xs =F0

k· ff3

0 /Q

(f 20 − f 2)

2+ f 2

0 f 2/Q2(3.70)

and

xc =F0

k· f 2

0 (f 20 − f 2)

(f 20 − f 2)

2+ f 2

0 f 2/Q2. (3.71)

This is the cantilever response to a coherent sinusoidal driving force. There are

two interesting limits. The first is when the cantilever is driven with a DC force.

Then,

xc(0) =F0

k(3.72)

xs(0) = 0. (3.73)

This is Hooke’s law. When the cantilever is driven by an AC force at its natural

resonance frequency the drive is out-of-phase and Q times larger,

xc(f0) = 0 (3.74)

xs(f0) =QF0

k. (3.75)

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As a practical matter, if the response is measured with a lock-in amplifier, then

xc and xs are recorded in the x and y channels, respectively.

Incoherent Driving Force The problem of an incoherent driving force is exam-

ined. This is the case where the driving force is random in time and its functional

form is not known. This problem is presented to explain the response of the can-

tilever to the random thermal vibrations associated with being at a temperature T .

In order to proceed, we make only one assumption about the driving force, i.e. that

the driving force has a flat power spectral density up to some high frequency limit

and is 0 above that frequency, i.e. white noise. The response was calculated using

the Fourier transform instead of the time domain signal. The Fourier transform of

x(t) and F (t) are,

x(t) =

−∞

x(f)e−i2πftdf x(f) ∼ [m/Hz] (3.76)

F (t) =

−∞

F (f)e−i2πftdf F (f) ∼ [N/Hz]. (3.77)

These two equations can then be plugged into the equation of motion, Eq. 3.60.

−∞

(

−f 2 − ıff0

Q+ f 2

0

)

x(f)e−i2πftdf =

−∞

f 20

kF (f)e−i2πftdf. (3.78)

For this equality to be true, the following is necessary,

x(f) =F (f)

k· f 2

0

f 20 − f 2 − ıff0/Q

. (3.79)

It is very important to be careful regarding Eq. 3.79. The Fourier transforms, x(f)

and F (f) have units of [m/Hz] and [N/Hz], respectively. The physically relevant

quantity for incoherent signals is the power spectral density defined by,

Px(f) = limT→∞

1

2T(|x(f)|2 + |x(−f)|2) (3.80)

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and

PF (f) = limT→∞

1

2T(|F (f)|2 + |F (−f)|2). (3.81)

The resulting one-sided power spectral density is given by,

Px(f) =PF (f)

k2· f 4

0

(f 20 − f 2)

2+ f 2f 2

0 /Q2∼ [m2/Hz]. (3.82)

Eq. 3.82 is valid for any form of the noise spectral density, PF (f). But, in the

case of a cantilever driven thermally, PF (f) can be considered flat and simplified to

PF (0). This is true provided there are no mechanical vibrations near the cantilever

resonance frequency. The power spectrum is then,

Px(f) =PF (0)

k2· f 4

0

(f 20 − f 2)

2+ f 2f 2

0 /Q2∼ [m2/Hz] (3.83)

Also, using Parseval’s theorem, the one sided power spectrum can be used to

find the rms-squared displacement of the cantilever by calculating the area under

the power spectrum,

x2rms =

0

Px(f)df. (3.84)

Next, it is shown how the thermal response of the cantilever can be used as a

simple, non-destructive method of determining the spring constant.

Spring Constant Determination The equipartition theorem states that each

mode of the harmonic oscillator contains an average energy of kBT/2 when coupled

to a heat bath at temperature, T . Therefore,

1

2k〈x2〉 =

1

2kBT (3.85)

where kB is Boltzmann’s constant and 〈x2〉 is the mean-square displacement of the

cantilever. The spring constant is then

k =kBT

〈x2〉 . (3.86)

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By integrating the measured power spectrum according to Eq. 3.84, the mean-

squared displacement, 〈x2〉, can be determined, allowing for easy calculation of

the spring constant.

The spring constant can be related to the power spectral density of the force

by mathematically integrating Eq. 3.84,

〈x2〉 = Px(0)f 40

0

df

(f 2 − f 20 )2 + f 2f 2

0 /Q2(3.87)

2Px(0)Qf0. (3.88)

Minimum Detectable Force The minimum detectable force can be calculated

by integrating the power spectral density of the force around a small bandwidth

center about a frequency, f ,

F 2min =

∫ f+∆f/2

f−∆f/2

PF (f)df. (3.89)

Because it is assumed that the power spectral density of the force fluctuation is

flat, the integral simplifies to,

F 2min = PF (0) ∆f (3.90)

where ∆f is the detection bandwidth. Using Eq. 3.82 and Eq. 3.88, the minimum

detectable force is,

Fmin =

2k∆fkBT

πQf0

. (3.91)

3.4 The Electric Force Microscope – Components Overview

A block diagram of the major components of the electric force microscope is

shown in Fig. 3.3. The components are discussed in greater detail in the sections

that follow.

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Cantilever Control···

Positive FeedbackIntermittent Contact ModeContact Mode

· Fiber Optic Interferometer

Cantilever Detection

Scanning/Piezo Control···

X/Y controlCoarse ApproachPlane Correction Vibration Isolation

Vacuum Systems

Computer

··

Data AcquisitionControl Software

Probe

Figure 3.3: Block diagram for the electric including all the support

instrumentation.

3.5 EFM - Peripheral Components

3.5.1 Vibration Isolation

As with any scanned probe instrument, adequate isolation from unwanted vi-

brations is necessary. The design for the vibration isolation was a consequence of

many factors. First, the probe was to remain fixed in position and rigidly attached

to the vibration isolation to avoid any damage to the sample or cantilever. Second,

because the probe is a ∼ 5-foot long dip-stick design, the vibration isolation had to

be tall to accommodate a dewar beneath it. Third, the laboratory is on the second

floor and no pit for dewar could be made, reiterating the need for the vibration

isolation to be tall.

A picture of the vibration isolation can be seen in Fig. 3.4. The vibration

isolation consists of a Technical Manufacturing Corporation (TMC) built support

structure – four large black 6” x 6” posts with five 2” x 4” horizontal support

bars on three sides, one across the top of the front. The vibration isolation plat-

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Figure 3.4: Picture of the EFM including the probe, vibration isolation,

and vacuum pump.

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(a) (b)

Figure 3.5: (a) Top of the vibration isolation. (b) The large diameter

aluminum disks are the probe mounting plates on top of the vibration

isolation.

form is an alternating stainless steel and wood laminate which provides excellent

vibration isolation from both low and high frequencies. It is four inches thick and

weighs approximately 2000 pounds. The tall columns that support the platform

are roughly 8 feet tall and each leg has a footprint that is 12 inches square. Four

air legs float the platform using compressed air at 60 psi supplied by the building.

The compressed air is filtered and dried prior to entry into the air legs. Raising

and lowering the plate is achieved simply by adjusting a pressure regulator.

There is a large hole, 28 inches in diameter, in the center of the platform which

accommodates a separate mount for the probe and the dewar. Covering the large

hole in the vibration isolation is a 30 inch diameter and 1 inch thick aluminum

plate (see Fig. 3.5). The plate was made by Precision Cryogenics and includes

bolt patterns for bolting the dewar and the probe to the vibration isolation. An

intermediate aluminum plate, 12 inches in diameter, bridges the 30-inch plate to

the probe itself. This smaller plate contains pressure relief valves and transfer line

feedthroughs for the cryogen (see Fig. 3.5(b)). The probe is mounted directly to

the smaller 12 inch plate.

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2.0

1.5

1.0

0.5

0.0

Pow

er S

pect

rum

[nm

^2/H

z x1

0-3 ]

5040302010

Frequency (Hz)

Vibration Isolation On Vibration Isolation Off

Figure 3.6: Power spectrum as measured by the motion of a cantilever

touching a surface with and without the vibration isolation. Data is

taken in a 1kHz bandwidth, but most of the motion is below 10Hz. With

the vibration isolation on, the total motion is 0.06nm; with the vibration

isolation off the total motion is 0.27nm.

As a test of the vibration isolation system, a cantilever was crashed into the

sample surface and the vibration spectrum between the tip and the sample was

measured. Fig. 3.6 shows the power spectrum of the motion between the cantilever

and the sample out to 50Hz with the vibration isolation on and off. The test

demonstrated a clear advantage of employing vibration isolation, as the vibrational

noise with the air legs inflated was a factor of 5 times smaller than with the air

legs deflated.

3.5.2 Electrical Connections and Wiring

This section covers the electrical connections from the electronics rack to the

inside of the probe. It does not cover the connections to specific elements of the

microscope head, such as piezos.

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At the top of the probe head is a electrical connections block. This block uses

various socket connectors, purchased from Samtec, Incorporated. The wires travel

from this connection block to a heat sinking stage, where they are wrapped around

a copper block and held into place using GE varnish. The wires are a phosphor

bronze, 36 AWG cryogenic wire with a Formvar R©insulation available from Lake

Shore Cryogenics Incorporated (Model: Quad-Lead QL-36). It is a ribbon cable

which ensures the best thermal sinking when wrapped around the copper block.

The wires are changed to a “Quad-Twist” cryogenic wire immediately after the

heat sink and travel to the top of the probe. This wire, also from Lake Shore Cryo-

genics Incorporated (Model: Quad-Lead QT-36), consists of two sets of twisted

pair, 36 AWG wire also with a Formvar R©insulation. Both wires were chosen to

minimize the heat loss of the probe head.

The vacuum feedthroughs for the wires consist of a military style 19-pin con-

necter that has been soldered into a blank NW-40 vacuum flange. This type of

connector is capable of reaching a vacuum of 10−6 Torr. There are two of these

connectors mounted on the top of the probe to accommodate the 38 wires.

A cable consisting of ten individually shielded twisted pairs of wires carry the

signals from the probe to the electronics rack. The shields are all tied together

and grounded in only one location, on the rack side of the cable. The individual

twisted pairs are then wired to a break-out box where each pair is connected to

one floating BNC connector. The shields of the BNC connectors can be grounded

individually for noise considerations.

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3.5.3 Vacuum System

The system is placed under a vacuum of about 10−6 Torr using a Pfeiffer tur-

bomolecular pump. All vacuum connections are made using NW-40 flanges. A

1 m flexible vacuum line connects the pump to an inertial dampening stage to halt

vibrations from the pump from being coupled to the probe. This stage consists

of a rigid vacuum tube that is embedded into a small concrete block that is rest-

ing in sand (see the black box on the right of Fig. 3.4). From this box, another

flexible vacuum line goes to the heavy platform on the vibration isolation where

it is rigidly attached with clamps. A clamp can be seen in Fig. 3.5(a) – the dark

grey object on the far right, middle of the picture. From there, the vacuum line

is connected to the probe with a valve. The top of the probe is a six-way NW-40

vacuum connector. This setup effectively eliminates any vibration noise from the

vacuum pump from coupling to the probe. The whole system takes roughly one

half hour to pump down.

3.5.4 Cryogenic System

The electric force microscope was designed to operate at variable temperatures

from 4K to slightly above room temperature. Raising the temperature too high

can melt the optical fiber cladding (150Cis too high). The probe is cooled by

immersing the brass vacuum can directly into cryogen and cooling with an exchange

gas.

A custom designed helium dewar is hoisted up to the vibration isolation using

a Jeamar hand winch (background of Fig. 3.5(a)). The cabling and pulley system

can be seen in Fig. 3.5(b) and are actually sailboat products. The pulleys are made

by Schaefer Marine and have good smooth operation and strength.

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The liquid helium dewar, built by Precision Cryogenics, is superinsulated with

a 60 liter capacity and weighs about 150 lbs. The 60 liters of helium surprisingly

add only 17 lbs. to the weight.

3.5.5 Computer Systems, GPIB and Data Aquisition

The microscope is controlled using a Dell Pentium III based computer system

running Microsoft Windows XP Professional. The processor runs at 667 MHz and

there are 512 MB of system memory. This is a system that could use upgrading

to spare any agony that future students might endure with such a machine. Com-

munication with instruments is performed through a GPIB bus controlled with a

National Instruments PCI-GPIB board. The data acquisition is handled using a

National Instruments DAQ board, model NI PCI-6259. It has a maximum acquisi-

tion rate of 1 MSamples/s on 32 channels and 4 digital output channels with 16-bit

precision at the same rate. The input to the board is via a National Instruments

break-out box, model BNC-2090, which facilitates easy connection to BNC cables.

It runs in referenced single-ended mode, i.e. the center pin of each BNC cable is

reference to the shield which is held at ground potential.

All of the control software is written with National Instruments LabView 7.1.

A major benefit of LabView is that complicated software is relatively fast and easy

to write. Although the execution of the software is slow compared to c-code, the

speed is more than adequate for most of the necessary controls of a scanned probe

microscope.

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3.6 EFM - Core Components

3.6.1 Probe

The probe is housed in a ∼ 5 foot long, 1 3/4 inch diameter vacuum can that

can beseen in Fig. 3.7. Close-up pictures are also shown in Fig 3.7. The upper part

of the probe is made of stainless steel. A brass can at the bottom is removable via

a 1 vacuum seal. All of the electrical, optical and vacuum feedthroughs are at the

top of the vacuum can, which is located above the vibration isolation platform.

All vacuum connections are type NW-40.

Inside the vacuum can are located 3 rods that extend from the top of the

vacuum can to just above the 1 seal. At the bottom of these rods is installed a

six-inch long bellows above the 1 seal. The bellows has a relatively low resonant

frequency of a few hertz with a load of about 0.5 kg. The longitudinal spring

constant is roughly 100 N/m. The probe is attached to the bottom of the bellows

via a hollow rod that extend through the 1 seal. The bellows provide a last line

of defense against vibrations. The probe head can be seen in Fig. 3.8. The various

parts of the probe head are discussed individually elsewhere in this document.

3.6.2 Fiber Optic Interferometer

The cantilever motions are detected using a fiber-optic interferometer which is

compact and low noise. The electric force microscope uses a fiber-optic interferome-

ter [13–15] to detect the displacement of the cantilever. The wavelength of the laser

diode is λ = 1310nm, well below the bandgap of most organic semiconductors. The

fiber-optic interferometer is compatible with ultrahigh vacuum [16]. In contrast

to other detection schemes, such as beam deflection [17] or piezoresistance based

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(a)

(d)

(c)

(b)

Figure 3.7: Picture of the EFM vacuum can housing the probe. (b)

six-way NW flange with electrical and fiber feedthroughs, (c) close-up

of the electrical feedthrough showing the 19-pin military connector, and

(d) close-up of the fiber optic cable feedthrough.

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Heat Sink

ElectricalConnectors

CoarseApproach

OpticalFiber

Sample

Scanner

ElectricalConnectors

Cantilever

Figure 3.8: Picture of the probe head showing many of the integral

components of the microscope.

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detection [18, 19], the fiber-optic interferometer measures displacements quantita-

tively. The fiber-optic cable is coupled into the microscope using a variation of the

design used by Abraham et. al. [16, 20,21].

The fiber-optic interferometer underwent many incarnations within the lab orig-

inating with components that operated using 780 nm wavelengths. As the com-

munications industry moved towards longer wavelength, components for 780 nm

wavelength became impossible to find. The decision was made to upgrade the

interferometer to components using 1310 nm wavelengths, as parts were easier

to find and less expensive. Fortuitously, this upgrade also moved the energy of

the light well below the bandgap in these organic semiconductors, eliminating the

possibility of exciting extraneous charge carriers with the interferometer.

A description of the operation, design, and performance of the 1310 nm fiber-

optic interferometer follows. The fiber optic interferometer was first demonstrated

by measuring the motion of a cricket’s tympanic membrane [13]. The version

implemented for this experiment is most similar to the design by Rugar et.al.,

which is an all fiber-optic design [14,22].

The simplest way to understand the principle behind the fiber optic interfer-

ometer is just to follow the light that is emitted out the laser diode (see Fig. 3.9).

Monochromatic light produced by a commercial Fabry-Perot laser diode (Laser

Diode Incorporated, model # SCW 1301G-200FC with an angle polished connec-

tor) is sent down a single mode optical fiber (Corning 9/125 - the core is 9µm

in diameter and the cladding is 125µm in diameter). An optical coupler is used

which sends ten percent of the light down a fiber optic cable that is cleaved at

ninety degrees and mounted above the cantilever with a working distance of about

50 µm. A block diagram of the optics is shown in Fig. 3.9. At the cleaved inter-

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Laser Diode

10/90 Coupler

Photodiode x

Fiber

FC/APC

Figure 3.9: A block diagram of the fiber optic interferometer. Light

from the laser diode is coupled into a 10/90 optical coupler. This light

follows the fiber down to the cantilever and reflects back through the

coupler and into the photodiode.

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face, a portion of the light is reflected back through the fiber and some is partially

transmitted. The transmitted portion reflects off the cantilever surface and returns

through the fiber. The interference pattern from these two beams are monitored

with a photodiode.

Cantilever Signal Derivation This section will describe the derivation of the

basic functional form of the interference pattern from simple geometric and optical

considerations. The two interfering beams are the beam bouncing off the cleaved

end of the fiber and the beam bouncing off the cantilever and re-entering the fiber.

The “path difference” that is commonly associated with interference patterns is

generated by the distance between the cleaved end of the fiber and cantilever.

In order to determine the interference pattern, the first step must be to de-

termine the electric field of the light coupled into the fiber from the laser. It is

assumed that all beams are composed of plane waves. From introductory electro-

statics, the time-averaged power contained in the plane wave traveling down the

fiber is given by,

P0 =1

2cǫrǫ0E

20A (3.92)

where P0 is the power coupled into the fiber, c is the speed of light, ǫr is the

dielectric constant of the inner core of the optical fiber, ǫ0 is the dielectric of free

space, E0 is the electric field amplitude of the wave, and A is the total area of

the inner core of the optical fiber. A typical value for P0 is about 70 µW. The

dielectric constant is not given in the specification sheet for the Corning fiber that

is used (the approximation that ǫr =√

n is assumed where n(= 1.47) is the index

of refraction for the core of the fiber. This approximation is called the Maxwell

relation and holds true for materials that are not very magnetic. In this case

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ǫr = 1.2. The area, A, of the fiber core is easily calculated from its diameter;

A = π(4.5 × 10−6)2 = 6.7 × 10−11m2. Plugging these numbers into eq. 3.92 allows

E0 to be calculated:

E0 =

2P0

cǫrǫ0A(3.93)

=

2(70 × 10−6 W)

(3 × 108m/s)(1.2)(8.85 × 10−12C2/Nm2)(6.7 × 10−11m2)(3.94)

= 2.6 × 104V/m. (3.95)

This beam, with an electric field magnitude of 2.6 × 104V/m, will be incident

of the cleaved end of the fiber at which point it will be partially reflected and

partially transmitted. Again, introductory electrostatics can be used to calculate

the resulting reflected and transmitted electric fields.

ER =

n1 − n2

n1 + n2

E0 (3.96)

ET =

(

2n1

n1 + n2

)

E0 (3.97)

where ER is the amplitude of the reflected wave, ET is the amplitude of the trans-

mitted wave, n1 is the refractive index of the fiber core and n2 is the refractive

index of vacuum.

ER = 0.2E0 = 0.5 × 104V/m (3.98)

ET = 1.2E0 = 3.1 × 104V/m. (3.99)

The fact that the electric field of the transmitted wave increased in amplitude

should not be of concern, because the medium changed from glass to vacuum such

that the total energy stored in the two waves is conserved.

The focus now is on what happens to the wave that just left the fiber. It

is no longer confined to the fiber core and therefore leaves the fiber at an angle

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d

A1

A2

Reflect offsurfaceFiber

Figure 3.10: Representation of the light lost due to the escape angle out

of the optical fiber.

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(see Fig. 3.10). According to the specifications for the optical fiber, the numerical

aperture is 0.15 which gives a light cone of 8.6 degrees at the cleaved end of the

fiber(NA = sin θ, where θ is the maximum angle of the light cone). As the light

travels away from the fiber, it loses intensity. It is assumed that when the light

bounces off the cantilever, it reflects completely. Now the beam is traveling back

towards the fiber. When the beam reaches the fiber it will have traveled a total

distance of 2d and occupy an area given by:

A′ = π (2d tan(θ/2))2 . (3.100)

The fact that the distance, d, enters the equations is what gives the interferometer

the ability to measure the cantilever displacements. It can be determined how the

electric field falls off with the area by using eq. 3.93.

E1

E2

=

A2

A1

. (3.101)

The above equation is used for the purpose illustrate that the electric field, E1 and

E2, falls off inversely with the two areas, A1 and A2. Applying this to the beam

bouncing off the cantilever and traveling back towards the fiber, the electric field

amplitude can be calculated as,

E−

T =

A

A′ET =

A

π (2d tan(θ/2))2 ET (3.102)

where E−

T indicates the transmitted beam immediately before it re-enters the fiber.

When this beam re-enters the fiber the electric field will again lose some am-

plitude according to eq. 3.97 where now n1 is the refractive index of vacuum and

n2 is the refractive index of the optical fiber core. The electric field amplitude of

this beam, after it has bounced off the cantilever and re-entered the fiber, will be

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labeled EC . After being transmitted back into the fiber,

EC = 0.8

A

π (2d tan(θ/2))2 ET . (3.103)

The beam that has just re-entered the optical fiber will interfere with the beam

that bounced off the cleave. The interference pattern generated by these two waves

will depend on their relative phases which will be calculated next.

To calculate the phase difference between the two interfering beams, it will be

assumed that the electric fields are constant, i.e. the sine waves have constant

amplitude. The two waves are both sinusoidal but differ in phase,

ER(t) = ER sin 2πft (3.104)

EC(t) = EC sin(2πft + φ) (3.105)

where f is the laser frequency, t is time and φ is the phase difference. The value

of φ depends on the distance between the end of the fiber and the cantilever, d.

There is an additional phase shift of π for the beam that reflects off the cantilever.

The extra distance traveled by the wave bouncing off the cantilever is twice the

separation such that the path difference is 2d. The phase shift can be written as,

φ

2π=

2d

λ+

1

2(3.106)

or

φ =4πd

λ+ π. (3.107)

Determining the amplitude of the resulting electric field E0 is aided by the use of

a phasor diagram shown in Fig. 3.11. The law of cosines can be used to calculate

the resulting electric field amplitude, E ′, from the interference of the two waves

E ′2 = E2R + E2

C − 2EREC cos

(

−4πd

λ

)

. (3.108)

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d

E0

2pft

E10

E20

fp-f

f E =E (2 ft+ )2 20 sin p f

E =E (2 ft)1 10 sin p

Figure 3.11: Phasor diagram for the interference pattern from the fiber-

optic interferometer.

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Eq. 3.92 can be used to calculate the output power, P ′, (i.e. interference

pattern) of the interferometer,

P ′ =1

2cǫrǫ0E

′2A. (3.109)

Fig. 3.12 shows a plot of Eq. 3.109 in two different regimes: Fig. 3.12(a) shows the

power dependence on short separations and Fig. 3.12(b) shows the power depen-

dence for longer distances.

These two plots capture many of the experimentally observed characteristics

shown in Fig. 3.13 – the output power is within a factor of two of experimentally

observed values. There is a DC offset that increases with decreasing separations,

and there is a sharp decrease in the fringe visibility for small separations and

a slower decrease in the fringe visibility for larger distances. It is particularly

satisfying that the value of the output power is approximately correct.

The bumps in the decay seen in Fig. 3.13 are likely due to small angular motions

of the coarse approach as it moves. The coarse approach is detailed in Sec. 3.6.4.

There could also be regions of laser mode hopping, which is discussed below.

For cantilever motions, the interferometer must be “tuned” to the maximum

sensitivity. The maximum sensitivity for small displacements (∆d << λ/2) is

obtained by tuning the interferometer to the maximum slope of this intensity.

This can be achieved two different ways: First, the distance can be varied, and

second, the wavelength can be changed (e.g. by tuning the temperature of the laser

diode). When tuned to the center of a fringe, the interferometer responds linearly,

yielding a conversion factor between distance and intensity. The maximum slope

of this function is

2EREC4π

λ. (3.110)

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(a)

(b)

Positive Fringe Negative Fringe

Figure 3.12: (a) Plot of the interference pattern for displacement close

to the cleaved end of the fiber and (b) Plot of the interference pattern

for a large displacement from the cleaved end of the fiber.

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1.6

1.4

1.2

1.0

0.8P

ower

[µW

]100806040200

Distance [µm]

Figure 3.13: Plot of the interference generated by watching the coarse

approach move away from the fiber.

As a practical matter, the the conversion factor between distance and interferom-

eter voltage can be obtained by measuring this slope. Sweeping out at least one

full fringe and using the measured peak-to-peak voltage (Vpp) from the photodiode

output (Vpp ⇔ 4E10E20) yields the conversion factor,

2πVpp

λ. (3.111)

Varying the temperature of the laser diode is another way of tuning the in-

terferometer to the sensitive region of the interferometer fringe. This is easily

seen by considering the wavelength dependence of Eq. 3.108. The laser diode

wavelength changes with temperature according to its temperature coefficient,

∆λ/∆T = 0.67 nm/C. Obtaining a complete fringe with a typical temperature

sweep of the laser diode (50C) requires a separation of d = 50µm.

Mode Hopping The fiber-optic interferometer can observe motions as small as

10mA/√

Hz. Unfortunately, mode hopping in the laser diode creates unwanted

noise in the form of sudden shifts in the DC output of the photodiode. These DC

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Figure 3.14: The spectral density of the thermal motion of a

1N/mcantilever with and without the RF injection used in the inter-

ferometer circuit.

jumps have a broad power spectrum that greatly affects the minimum detectable

displacement, or noise floor, of the interferometer near the cantilever frequency. A

solution to this problem has been successfully implemented on the suggestion of

Dan Rugar, namely to inject a radio frequency (RF) modulation to the current

driving the laser diode [22–24].

The RF is generated using a Mini-Circuits POS-300 which outputs a sine wave

with typical values of 200 MHz at 10 dBm. This however is not a complete fix to

the problem as there are temperature ranges of the laser diode that still produce

a significant amount of noise. The noise always seems to be slightly less on a

positive slope of the interferometer fringe. The effect of the RF frequency and

power on the noise floor of the interferometer was characterized. The RF injection

simply removes the adverse effects of mode hopping. The cantilever was pointed

at a commercial Silicon Nitride cantilever with spring constant of 0.01 N/m with

a separation of approximated 50 µm. The noise floor was calculated as a function

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of RF power and RF frequency according to the procedure outlined at the end of

section 3.3. For these measurements, the RF was sourced from an HP function

generator (model HP8656B). The dramatic effect that the RF injection can have

on the noise floor can be seen visually in the power spectral densities plotted in

Fig. 3.14. Fig. 3.15(a) and Fig. 3.15(b) show plots of the interferometer noise floor

as a function of injected RF frequency and power, respectively. In Fig. 3.15(a), the

(+) sign indicated that the interferometer was tuned on the positive slope of the

interferometer fringe; conversely, the (-) indicated being tuned to negative fringe.

From the two plots it is clear that the best operating point is to have the RF

injection frequency at ∼ 200 MHz, the power at ∼ 10 dBm, and the interferometer

tuned to a positive fringe.

Figure 3.16(a) shows the interferometer output signal versus the temperature

of the laser diode. Maximum sensitivity is achieved by tuning the temperature

of the laser diode to the linear-response region of the curve [15]. By using RF

current injection to eliminate mode-hopping instabilities in the interferometer’s

diode laser, the interferometer’s noise floor (minimum detectable displacement)

can be as good as ∼ 10 mA/√

Hz at a typical fiber-separation of 50 − 100 µm.

Figure 3.16(b) shows the interferometer output signal as a function of time for a

cantilever whose peak-to-peak amplitude is larger than the linear-response of the

interferometer (160 nm gives a 10% error). In each case the peak-to-peak voltage,

Vpp, is the same and can be used to calibrate the cantilever displacement. In the

linear response regime, the sensitivity is given by, 2πVpp/λ, where λ is the laser

wavelength. The interferometer output for a cantilever undergoing only random

thermomechanical motion is shown versus time in Fig. 3.16(c). The corresponding

averaged power spectrum is shown in Fig. 3.16(d). The area under this power

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Figure 3.15: (a) The noise floor dependence on injected RF frequency

with the RF power held fixed at 10dBm and (b) The noise floor depen-

dence on injected RF power with the RF frequency held at 200MHz.

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(a) (b)

(c) (d)

Figure 3.16: (a) Interferometer output signal versus laser diode temper-

ature, (b) Interferometer output signal versus time for an over driven

cantilever, (c) Thermal motion of a 1N/m cantilever, and (d) Power

spectrum of the thermal motion of the cantilever.

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spectrum, equal to kBT/k, can be used to determine the cantilever spring constant

if the cantilever’s temperature is known [25].

Model Description Price

ILX Lightwave Ultra low-noise current source $3,000

ILX Lightwave Laser diode temperature controller $2,000

New Focus Photodiode $1,500

Laser Diode Fabry-Perot laser diode $2,000

Mini-Circuits Bias-T for RF injection $100

Metrotek 10/90 Optical coupler with FC/APC pigtails $2,000

Mini-Circuits

POS-300

RF source $80

ILX Lightwave Laser Diode mount $1,500

3.6.3 Frequency Shift Detection

The force gradient between the cantilever and the sample surface is detected

by measuring the resonance frequency [26] of the cantilever according to,

∆f

f0

= − 1

2k

∂F

∂z(3.112)

where ∆f is the frequency shift about the natural resonance frequency, f0, and

z is the tip surface separation. The cantilever is self-oscillated near its resonance

frequency with a positive feedback phased-locked loop (PLL). There have been two

versions of the circuitry used to drive the cantilever and demodulate the frequency.

The first is an implementation using an analog PLL that also demodulates the

frequency. The second circuit is very similar except that the PLL is replaced with

a comparator and the demodulation is done by a commercially available frequency

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Figure 3.17: Cantilever response to drive piezo amplitude. Notice the

non-linearity due to exceeding the linear range of the fiber optic inter-

ferometer.

counter. The cantilever is driven using a bender piezo that is mounted beneath the

cantilever base. There are two small sapphire plates that electrically isolate the

piezo from the coarse approach and the cantilever. The response of the cantilever

on resonance to the drive amplitude of the piezo is shown in Fig. 3.17

Analog Positive-Feedback Circuit. An analog positive feedback circuit was

first designed because the components are cheap and the possibility of modulating

the frequency shift would be feasible. The circuit is shown in Fig. 3.18.

The input interferometer signal is AC coupled, then bandpass filtered with a

simple LCR filter. The calculated transfer function of the LCR circuit is shown in

Fig. 3.19 and is centered on the cantilever’s resonance frequency. The filter has a

Q of about 40 (adding a resistor lowers the Q). The width of the filter’s resonance

is much smaller than the width of the cantilever resonance in vacuum, i.e. the

filter’s Q is much smaller than the cantilever Q. The signal is routed to an LM565

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Vin

C =2.2nF1

R =160k1 W C =0.67nF2

L =100mH1 -12 V

+12 V

+12 V

C =10nF3

PLLLM565

R ~10k1 WC =2.2nF4

AC couple input bandpass filter ~ 22kHz phase locked loop ~22kHz

+12 V

BufferOPA227

BufferOPA227

BufferOPA227

BufferOPA227

BufferOPA227

BufferOPA227

DC from DAC Piezo Drive

output null lowpass filter ~ 3Hz

V out

R3

R =600k4 W

C =0.1µF5

Sine Wave InputVpp=10V maxFrequency 20-25 kHz

piezo drive amplitude adjust

Op AmpAD620

MultAD734

~5Vat VCO frequency

TTL VCO output

DC Output1.2mV/Hz; typ

Figure 3.18: Analog frequency demodulation circuit.

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(a)

(b)

Figure 3.19: The gain (a) and the phase (b) of the bandpass filter used

in the positive feedback circuit.

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Figure 3.20: Sensitivity of analog frequency demodulation using a phase

locked loop.

PLL, which determines the cantilever frequency. The free running frequency of

the PLL is set near the cantilever frequency by R2 and C3. Once the PLL is

locked, the voltage on the voltage controlled oscillator (VCO) follows the cantilever

frequency. This voltage is a square wave at the cantilever frequency. A change

in the cantilever frequency will cause both a duty cycle change and a DC offset

in the square wave output. Low pass filtering the output and nulling provides a

DC voltage proportional to the cantilever frequency. The proportionality constant

has three regimes that can be seen in Fig. 3.20 and is also dependent on the free

running frequency of the VCO. The VCO output is used to drive the cantilever.

The VCO output is multiplied by a DC voltage, provided by the computer DAQ

card, to control the amplitude of the cantilever driving force. It is tricky to get the

PLL to lock onto the cantilever. The resistor, R2, must be adjusted by hand until

the cantilever is driven with maximum response. The drift of this demodulated

output over time is shown in Fig. 3.21. The drift of ∼ 4Hz peak-to-peak can

be explained by considering the temperature coefficient of the LM565 PLL clock

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90

-16

-15

-14

-13

-12

Drif

t (H

z)50403020100

Time (s)

Figure 3.21: The drift in the analog PLL demodulated output.

which is 100ppm/C. At a frequency of 21kHz the observed drift could be due to

a temperature change of only 2C. This performance is similar to that observed

by Durig et. al. with their analog PLL [27].

Positive feedback circuit using a frequency counter. The circuitry is es-

sentially identical to the analog frequency shift detection scheme. The PLL is

replaced with a digital comparator which creates a square wave at the cantilever

frequency. The square wave is altered in the same fashion as with the analog circuit

and sent to the cantilever drive piezo. The square wave is also sent to a Stanford

Research Systems SR620 frequency counter. There is also the addition of a RC

low pass filter placed on the input that serves to change the phase of the signal.

The phase is adjusted so that the positive feedback is at a maximum. This assures

that the drive is on resonance and that is 90 out of phase with the response.

The performance of this circuit is determined by measuring the jitter (standard

deviation of the frequency) of the cantilever frequency within a given bandwidth.

Fig. 3.22 shows the jitter versus gate time and bandwidth of the frequency counter.

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91

4

68

0.01

2

4

68

0.1

Jitte

r [H

z]

0.012 4 6 8

0.12 4 6 8

1

Gate Time [s]

75 nm 50 nm 25 nm

0.14

0.12

0.10

0.08

0.06

0.04

0.02

Jitte

r [H

z]

10080604020Bandwidth [Hz]

75 nm 50 nm 25 nm

4

68

0.01

2

4

68

0.1

Jitte

r [H

z]

12 4 6 8

102 4 6 8

100Bandwidth [Hz]

75 nm 50 nm 25 nm

0.14

0.12

0.10

0.08

0.06

0.04

0.02

Jitte

r [H

z]

1.00.80.60.40.2

Gate Time [s]

75 nm 50 nm 25 nm

(a)

(d)(b)

(c)

Figure 3.22: Plot of the frequency jitter versus gate time and bandwidth

The minimum detectable force gradient is given by [26],

δF ′

min =

2kkBT∆f

2πf0Q〈z2osc〉

(3.113)

where 〈z2osc〉 is the mean-square drive amplitude. The plots in Fig. 3.22 have

a 1/〈zosc〉 dependence suggesting that the positive feedback detection system is

thermally limited.

3.6.4 Coarse Approach

The coarse approach was developed in the Marohn Lab at Cornell University,

and the reader is directed to Silveira and Marohn for a more detailed description

[28]. The main advantages of this design are its simplicity, reliablility and there

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Center Plate Side View

Top View

v-grove

coil spring

opticalfiber

cantilever

piezostack

(a) (b)

Figure 3.23: (a) Schematic views of the coarse approach mechanism.

The upper left drawing shows only the center plate. The two other

view show the coarse approach fully assembled. (b) The average step

size versus the applied sawtooth voltage amplitude from both up and

down motion.

are no requirements for glue, which makes it well suited for variable-temperature

applications.

The coarse approach is diagramed in Fig. 3.23(a) and consists primarily of three

sandwiched brass plates. The center plate is rigidly held down by leaf springs which

allow small vertical movements by a small piezo (Fig. 3.23(a)). The outer two

plates are sandwiched around the center plate and held in place through tension

provided by a coil spring. The outer plates glide on small sapphire balls that

are embedded in the center plate. On the left-inner side of the outer plate, two

sapphire balls ride in a vertical v-groove which defines the glide direction. On

the right side of the outer plate, one sapphire ball rides on a flat surface which

defines the plane. A saw-tooth voltage is sent to piezo. The slow ramping portion

of the saw-tooth voltage slowly pushes the inner and outer plates forward. This

is the “stick” portion of the slip-stick motion. The sharp edge of the saw-tooth

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voltage will quickly jerk the center plate backwards, but the outer plates will not

follow. This is the “slip” portion of the slip-stick principle. Repeated application

of the saw tooth voltage will move the plates forward in steps ranging from 5nm

to > 100nm depending on the amplitude and frequency of the saw tooth voltage.

Movement in the opposite direction is achieved by simply reversing the saw tooth

waveform, such that it begins with sharp jump followed by a slow ramp. It should

also be noted that the coil spring is not compressed exactly the same each time

the coarse approach is reassembled resulting in slight variations to the step sizes.

The fine motion is also handled by the coarse approach mechanism. The outer

plates will track the movement of the center plate so long as it never breaks fric-

tion. This is normally true for motions at typical scanning speeds. To prevent

accidentally taking a coarse step during scanning, a 150Hz low pass filter is used.

The coarse approach moves vertically in both directions from 4K to 300K.

The performance at room temperature is shown in Fig. 3.23(b) and is mainly

characterized by the voltage amplitude of the sawtooth required to obtain a given

step size. Notice from the plot in Fig. 3.23(b) that downward steps require slightly

less voltage than upward steps. These voltages change slightly for each different

experiment because the tension in the fiber and other wires connected to the coarse

approach place a torque on the coarse approach plates that changes the friction.

Too much torque on the plates can cause the coarse approach to stop moving all

together. The optical fiber that monitors the cantilever motion is largely respon-

sible for this torque. The jacketing on the fiber is carefully stripped off, ensuring

that the polymer coating remains on and undamaged, for at least 10 cm above

the end of the fiber. The result is that the fiber has adequate flexibility while

maintaining it strength. Without the polymer coating the glass will become very

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brittle.

When properly assembled, with no unnecessary torque applied to the plates,

the coarse approach works very reliably. The fine approach also has sufficient scan

range to compensate for any tilt in the sample and is stable.

3.6.5 Scanning

The scanning is divided into two parts: lateral scanning and vertical scanning.

The sample is scanned in the x and y directions and the cantilever is scanned in

the z-direction. The z-motion is handled by the coarse approach mechanism just

described. The x and y motions are performed by a home built implementation of

a scanner design introduced by Siegel et al. [29]. The design enables a larger scan

range for a given length of the piezo than a traditional tube scanner.

To keep the whole microscope compact, a non-traditional scanner design was

used instead of the traditional tube scanners. Tube scanners require exceedingly

long tube piezo to achieve a scan range of 50 µm. The design introduced by Siegel

et. al. has the benefit of remaining compact while maintaining a large scan range.

Instead of tube piezo, the design uses 4 “s bender” piezos, aptly named because

they bend in a “s” shape. Two of the piezos move the scanner in the x direction

while the other two move it in the y direction.

Each of the piezos is held together by three small, fragile macor pieces. Macor

is chosen because it has a similar thermal expansion coefficient similar to piezo

ceramic material and it is electrically insulating. One end of each of the two x

piezos is glued to the top macor piece, which is rigidly attached to the microscope

frame. One end of the x piezos is glued to this piece. The other end of the x

piezos is glued to the second macor piece (as seen at the bottom of the scanner in

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1µm250nm

(a) (b)

Figure 3.24: (a)The tip of the cantilever prior to use and (b) the can-

tilever tip after use, including several crashes into the surface.

Fig. 3.8). The bottom end of the y piezos are also glued to this piece. The top of

the y piezos are glued to the third macor piece on which the sample is mounted

(can be seen at the top of the scanner in Fig. 3.8). The image of one glider chair

mounted inside another chair illustrates the concept.

3.6.6 Cantilever

The central component of the microscope is the cantilever, which sets the force

sensitivity as well as the spatial resolution. The force sensitivity is determined

by the cantilever response to thermal fluctuations as described in Sec. 3.3. The

cantilever used in the trap imaging experiments has a force constant of 1 N/m,

a resonance frequency of ∼ 24 kHz, a quality factor of Q ∼ 10, 000 in vacuum.

The cantilever is coated with a thin layer of platinum (with an iridium adhesion

layer) and has a tip radius of about 50 nm. Crashing the tip (vertical deflection of

about 100 nm) into the sample can have disastrous effects on the tip radius and the

resolution. This can be seen by comparing the two SEM pictures of a cantilever

before and after being used and crashed multiple times in Fig. 3.24. It is clear that

care must be taken in controlling the cantilever’s position in space, not allowing it

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to crash into the surface.

3.7 Measurement Techniques

The microscope employs a commercial metal coated cantilever, works with

the sample at room temperature and in the dark, and operates at high vacuum

(10−6 mbar) for highest sensitivity. Instead of measuring the cantilever amplitude,

whose response time can be deleteriously long (many seconds) in vacuum, we

follow instead the cantilever resonance frequency, which responds instantaneously

to changing electrostatic force gradients [26],

∆f = f − f0 ≈ − f0

4kC ′′ (Vtip − φ)2 (3.114)

Here f0 is the natural resonant frequency of the cantilever and k is cantilever spring

constant. The cantilever frequency depends on the voltage Vtip applied to the

cantilever, on φ, the contact potential difference between the tip and the sample,

and on C ′′ = ∂2C/∂z2, the second derivative of the tip-sample capacitance with

respect to z, the tip-sample separation. The approximation used to derive Eq. 3.114

holds when electrostatic force gradients are small compared to the mechanical

spring constant of the cantilever, which is the case here. Figure 3.25 shows a plot

of cantilever resonance frequency versus tip voltage acquired at a point over the

pentacene transistor gap with the source, drain, and gate grounded. The observed

parabola was fit to Eq. 3.114 to obtain C ′′ and φ at that point. This procedure

can in principle be repeated at each point to build up an image of C ′′ and φ. In

practice we find that ∆f is dominated by, depending on experimental conditions,

either the variation in C ′′ or φ alone. This simplifies data acquisition and analysis

considerably. For example, if C ′′ is constant, then we can infer the local contact

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(a)

(b)

Tip potentialfor imaging

Figure 3.25: (a) The cantilever resonance frequency versus the tip-

sample voltage. (b) The effect of a potential change on the sample.

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DC (B)

+12 V

-12 VDC (A)

+12 V

-12 V

Zout

MultAD734

MultAD734

Xin

Yin

C

Z =A·X + B·Y + Cout in in

BufferOPA227

BufferOPA227

BufferOPA227

Summing Input

Summing Input

Figure 3.26: The circuit used to scan the tip in plane above the sample

surface.

potential from an image of ∆f acquired at constant Vtip using

∆φ ≈ ∆f

f0

2k

C ′′ Vtip

. (3.115)

Imaging is done by fixing the tip voltage and recording the resonance frequency.

Because of the bandwidth limitation of the frequency counter, the scan rate cannot

be faster than 16Hz. Faster scanning is possible but then noise in the frequency

increases. All EFM images are done in non-contact mode where the tip is scanned

in a fixed plane above the surface. The plane is used to compensate for sample tilt

and is either implemented in software of hardware. The circuit for the hardware

implementation is shown in Fig. 3.26. This circuit simply determines a plane

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according to the equation,

Zout = A ·Xin + B ·Yin + C (3.116)

The coefficients, A and B, are DC voltages provided by the auxiliary outputs of

the lock-in amplifier. The height above the sample surface is set by C. The scan

coordinates, Xin and Yin, are supplied by the DAQ card. All inputs are prior to

any piezo amplifiers. The plane is determined by adjusting A and B until the scan

appears flat. This circuit is quite easy to use and very stable.

References

[1] G. Binnig, C. Quate, and C. Gerber, “Atomic force microscope,” Phys. Rev.

Lett., vol. 56, no. 9, pp. 930–933, 1986.

[2] L. Burgi, T. Richards, M. Chiesa, R. H. Friend, and H. Sirringhaus, “A micro-scopic view of charge transport in polymer transistors,” Synth. Met., vol. 146,no. 3, pp. 297–309, 2004.

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CHAPTER 4

CHARGE TRAP EXPERIMENTS

As discussed in Chapters 1, 2, charge trapping plays a central role in the per-

formance of pentacene thin film transistors. The spatial distribution of traps has

never been observed directly until this work. As mentioned previously there is cir-

cumstantial evidence that the traps are isolated at the grain boundaries. There are

theories that indicate a more homogeneous distribution of traps states. The energy

distribution, as studied by thermally stimulated current and deep-level transient

spectroscopy, is thought to consist of several isolated energies, each with a gaussian

distribution [1, 2]. These are both bulk techniques and cannot determine the spa-

tial locations corresponding to each of the trap energies. This chapter outlines

an electric force microscope experiment that helps answer some of the questions

regarding the spatial distribution of traps in a pentacene thin film transistor. This

work has been published in Advanced Materials [3].

4.1 Sample Description

Bottom-contact pentacene thin film transistors were fabricated with recessed

source and drain electrodes according to the procedures outlined in Chap. 2. The

substrate geometry is shown in Fig. 4.1(a). The recessed electrodes provided a flat

substrate and a constant height film that made electric force microscopy images

easier to obtain.

Device substrates were fabricated beginning with a heavily p-doped Si wafer

(0.001 − 0.003 Ωcm; 〈100〉 orientation). A 325 nm-thick thermal oxide was grown

as a gate dielectric. Source and drain electrodes were defined using optical pho-

tolithography. Prior to evaporating 5 nm of Cr and 70 nm of Au as the source and

102

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a)

b)

325 nmSiO2

n Si++

10 nm

VG

Vtip

Figure 4.1: Pentacene thin film transistor. a) Schematic of the device

substrate (L = 6.5 µm and W = 20.1 cm). The zoomed-in feature shows

the height difference between the gap and the recessed electrodes. Also

shown is a metal coated cantilever for atomic and electric force mi-

croscopy. (b) Current-voltage characteristics. Here VG ranges from 0 V

to −50 V in 5 V steps.

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drain electrodes, shallow trenches (60 nm) were etched in the SiO2 to recess the

electrodes. Immediately prior to the pentacene deposition, the device substrates

were cleaned with acetone and isopropanol. Pentacene from Aldrich was used with-

out further purification. A 50 nm layer of pentacene was thermally evaporated in

high vacuum at a rate of 0.1 A/s with the device substrate fixed at room temper-

ature. The source and drain electrodes were composed of 34 interdigitated fingers

with a gap length, L, of 6.5 µm. The resulting total width, W , of the transistor

was 20.1 cm.

The current-voltage characteristics are shown in Fig. 4.1(b). The device shows

typical transistor behavior with indications of poor contacts. The slow rise in

ISD with VSD is an indication of poor contacts. The remaining characteristics are

quite normal; the threshold voltage is VT ≈ −10V and a mobility, calculated in

the saturation regime, is µsat = 2 × 10−2 cm2/Vs. These values are typical of a

bottom contact device prepared by evaporative deposition onto an untreated SiO2

substrate [4].

Current voltage measurements were taken with Keithley source meters, model

numbers 2400 and 6430. The entire current-voltage data set was taken in approx-

imately 1 minute, with each ISD vs. VSD curve taking 5 − 15 s. Because good

saturation is observed in the current-voltage characteristics of Fig. 4.1(b) on the

timescale of 5 − 15 s, it can be concluded that the time required to occupy the

majority of traps is comparable to this time or shorter. A charging time of 30 s is

considered a sufficiently long trap-charging time in the EFM experiments.

A commercial cantilever (model number NSC21, MikroMasch) with a spring

constant of k = 1 N/m, resonant frequency of f0 = 24 kHz, and a quality factor of

Q = 104 was employed in the EFM experiments. The motion of the cantilever is

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detected using the fiber-optic interferometer described in Sec. 3.6.2. The interfer-

ometer operates at 1310 nm, a wavelength well below the bandgap of pentacene.

The cantilever is driven at its resonant frequency by using the phase locked loop

described in Sec. 3.6.3. The amplitude of the oscillating voltage sent to the piezo

is held fixed. This amplitude is adjusted until the cantilever response reaches

15nm− rms. The resonant frequency of the cantilever is measured with a Stanford

Research Systems SR620 frequency counter.

4.2 EFM - Trap Detection Protocol

As described in Sec. 3.2, the presence of charge traps in pentacene is detected

as a change in the contact potential. A simplified version is presented here for

clarity. The tip-sample interaction is modeled as a parallel plate capacitor of the

form metal1/dielectric/vacuum/metal2 (Fig. 4.2). Here “metal1” represents the

gate, “metal2” the tip, and “dielectric” the SiO2. For simplicity, the pentacene is

neglected because its thickness is much smaller than that of SiO2. Trapped charge

at the SiO2/pentacene interface will shift the apparent contact potential difference

between metal1 and metal2 by an amount

∆φtrap ≈ σ d

κǫ0

(4.1)

where σ is the planar charge trap density, d and κ are the thickness and dielectric

constant of the dielectric layer, respectively, and ǫ0 is the permittivity of free space.

For all of the charge trap imaging experiments, the source and drain electrode are

grounded. They act only as charge reservoirs for the trap states.

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Vtip

k

+

+

+

+

+

+

+

d

Figure 4.2: Simple model of the tip-sample interaction (see text for

explanation). The + represents trapped charge.

4.3 Trap Imaging I

The first experiment follows the procedure sketched in Fig. 4.3. Fig. 4.3 (a)

shows a band diagram of the gate electrode on the left and the pentacene thin

film on the right. Three trap states are shown with energies below the Fermi

level, ǫF , which have a narrow gaussian distribution. This diagram is purely a

conceptualization. Because each of these levels is below the Fermi level, they are

occupied by an electron and are neutral. As the gate voltage is decreased, the

states in the pentacene film will be dragged upward along with the gate voltage

(the convention used here is that a decrease in potential causes the bands to go

up). When one of the trap states crosses the Fermi level, the electron will fall

to the HOMO leaving the trap state occupied by a positively charged trap (see

Fig. 4.3 (b)). As the gate voltage is lowered further (see Fig. 4.3 (c)), more traps

states become occupied. Simultaneously, there is an accumulation of holes in the

HOMO at the pentacene/insulator interface.

The gate voltage is decreased in small increments and an EFM image is taken

at each gate voltage. When the trap states become occupied, the expectation

is that the image will be dimpled with patches of charge corresponding to the

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VG

HOMO

LUMO

eF

UnoccupiedTrap States

(a) (c)

OccupiedTrap States

(b)

AccumulatedHoles

Figure 4.3: (a) The energy level diagram of the gate, SiO2 and the

pentacene semiconductor showing three unoccupied trap states. (b) A

trap becoming occupied by decreasing the gate voltage. (c) Deeper trap

state becoming occupied with further increase of the gate voltage.

trap locations. This, however, was not observed. A series of EFM frequency

shift images, where the gate voltage is lowered in small increments, are shown in

Fig. 4.4. The contrast observed in these images is not due to potential but to

the topography of the pentacene thin film. There is no observable increase in the

charge density due to trapped charge.

The flaw with this method of observing the charge traps is that it ignores the

effect of the accumulation layer. The consequence of the accumulation layer is

illustrated in Fig. 4.5

With source and drain grounded, we measured φ as a function of VG (Fig. 4.5).

If the tip and gate are behaving as a parallel plate capacitor, then φ should track

VG with a slope of one. This is indeed true when VG > 0. When VG is negative

and below the threshold voltage (VT ≈ −8V), however, charge accumulates at the

pentacene/SiO2 interface and shields the tip from the gate, resulting in φ ≈ 0.

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Au

Au

Gap

Figure 4.4: EFM images of the transistor gap using imaging protocol I

with VG ranging from +2 V to −50 V . There is no apparent increase

in the charge density inside the device.

Figure 4.5: φ(x) versus VG. The inset shows the slope at positive gate

bias versus the tip position across the device gap.

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VG

HOMO

LUMO

eF

UnoccupiedTrap States

(a)

OccupiedTrap States

(b)

AccumulatedHoles

(c)

eF

Traps RemainOccupied

Increase V Image Repeatcharging ® ®

Vcharging

Figure 4.6: (a) Energy level diagram. (b) The traps are charged by

increasing the gate voltage. (c) Gate voltage is lowered back to zero

and the mobile, accumulated holes leave the device, but the trap charge

remains.

(This can alternatively be explained using a model similar to that of Fig. 4.2,

with “metal1” now representing the pentacene accumulation layer. Since the traps

reside in or near the accumulation layer, d ≈ 0, and we expect ∆φtrap ≈ 0.)

It is interesting to note that in Fig. 4.5, that the transistor threshold voltage is

measured locally.

4.4 Trap Imaging II

The shielding by the mobile, accumulated holes masks any effect on the elec-

trostatic potential or capacitance due to trapped holes and therefore an alternate

approach to image traps was devised. Fig. 4.6 details the slight variation to the

imagine protocol of Fig. 4.3. After setting gate voltage negative for 30 s to charge

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the traps, the gate voltage was returned to zero before imaging. The gate voltage

used to charge the traps is referred to as Vcharging. Returning the gate voltage to

zero has the affect of chasing out the mobile, accumulated holes, leaving only the

trapped charge. The trapped charges are out of equilibrium and remain in the

transistor channel for tens of minutes – enough time to collect an image. A series

of images is shown in Fig. 4.7 where Vcharging was decreased for each image. In

contrast with Fig. 4.4, these images show a dramatic evolution in the cantilever

frequency variation as Vcharging is increased.

The image contrast in Fig. 4.7 arises predominantly from variations in contact

potential. To determine this, a linescan (described in Sec. 3.7) is measured, finding

φ and C ′′ along a representative line in the transistor gap (Fig. 4.8(a-b)). The

location of this line is indicated in Fig. 4.7. Using Eq. 3.114 it is estimated that

85% of the variation in ∆f observed along the line is due to the variation in

contact potential. This can be seen qualitatively in Fig. 4.8(c) where ∆f has been

constructed from the measured φ(x) and C ′′(x); the observed frequency tracks φ

very closely. It is then justified to treat C ′′ as a constant and use Eq. 3.115 to

compute the local contact potential φ from the measured cantilever frequency. The

variation in φ is attributed to long-lived traps, since the observed variation in φ

across the transistor gap is 1) less than 50 mV before the gate voltage is increased

above the threshold voltage, 2) increases with Vcharging, and 3) disappears after

approximately 24 hours.

4.5 Trap Density

The trap density can be calculated quantitatively using Eqs. 3.114 - 4.1, the

known k, κ, d, and Vtip, and the measured ∆f , f0, and C ′′. Fig. 4.9(b) displays

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Figure 4.7: EFM images of charge trapping using imaging protocol II

with Vcharging ranging from +1 V to −40 V. The charge density increases

dramatically after the threshold voltage (VT ∼ −8 V)

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(a)

(c)

(b)

Figure 4.8: (a) The electrostatic potential, φ, and (b) the capacitance

derivative, C ′′ along the representative line in Fig. 4.7. (c) The frequency

shift calculated from φ and C ′′ using Eq. 3.114

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histograms of trap density at various charging voltages. This data is obtained

by selecting the points inside the transistor gap and making a histogram of the

charge trap density of those points. The sharp peak in the histograms is from

the metal electrode which is used to define the frequency-zero point for all the

images, which can vary from image-to-image because of drift in the tip-sample

separation. The distributions for the metal electrodes arises from capacitance

variation, not trap density variation. The mean trap density at Vcharging = −30V is

1.6×1011holes/cm2, or about one hole per 2.5×103 pentacene molecules (assuming

that the accumulation layer is one monolayer thick). Using an effective tip diameter

of approximately 300 nm (the apparent EFM imaging resolution as estimated by

the smallest feature seen in Figs. 4.7), the contact potential shift is calculated to

be due to as few as ∼ 3 trapped holes underneath the cantilever tip.

Interestingly, as the charging voltage increases, the trap distribution evolves

from a Gaussian shape to a highly asymmetric distribution with a long exponential-

like tail – a possible consequence of sites trapping charge at different rates. While a

Gaussian distribution can arise from statistical fluctuations in the filling of a single

well-defined trap energy level, an asymmetric distribution cannot. For a well-

defined trap energy level, increasing the charging voltage would only increase the

proportion of occupied trapped states. This would move the gaussian distribution

to the left, but would not change its shape. The asymmetric distribution observed

suggests an exponential density of trap energies, in qualitative agreement with

transport studies [5–7].

Figures 4.7 and 4.9 are the central result of this experiment. The long-lived

traps evident in Fig. 4.7 at higher charging voltages are clearly not homogeneously

distributed in space, and large variations in trap concentration are observed on

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(a) (b)

(c)

Figure 4.9: (a) Selected positions in the pentacene topography. (b) Trap

density versus charging voltage at various positions in the pentacene

device and (c) histograms of trap density at various charging voltages.

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PossibleChemical reactions which cause

structural changes to the

pentacene molecule are more

likely at grain boundaries.

UnlikelyReorganization Energy

PossiblePolarization energy is altered at

interfaces.

UnlikelyPolarization Energy

PossibleChemical reactions involving the

addition of H or O are more

likely at the grain boundaries.

PossibleImpurities present in the

pentacene prior to deposition

can introduce trapping sites.

Chemical Impurities

Grain Boundary Traps?Bulk Traps?

PossibleChemical reactions which cause

structural changes to the

pentacene molecule are more

likely at grain boundaries.

UnlikelyReorganization Energy

PossiblePolarization energy is altered at

interfaces.

UnlikelyPolarization Energy

PossibleChemical reactions involving the

addition of H or O are more

likely at the grain boundaries.

PossibleImpurities present in the

pentacene prior to deposition

can introduce trapping sites.

Chemical Impurities

Grain Boundary Traps?Bulk Traps?

Figure 4.10: Summary of possible trapping theories and their associa-

tion with either grain boundaries or bulk effects.

a ≥ 300 nm length scale. Fig. 4.9 (a) displays the trap density σ versus Vcharging

at selected points in the transistor gap. While trap density increases as a func-

tion of Vcharging at most locations in pentacene, the amount of increase is simply

not correlated with the apparent location of the grain boundaries, as generally

supposed [7–9].

The findings can be used to eliminate a number of proposed trap candidates

(summarized in Fig 4.10). Trapping at the grain boundaries near the buried

pentacene/SiO2 interface is not necessarily inconsistent with the data, since the

grain boundaries at the buried interface need not correspond to the grain bound-

aries identified by AFM topography [10]. Nevertheless, trapping at buried grain

boundaries is an extremely unlikely possibility since the observed charge traps

simply do not appear to follow the shape expected of grain boundaries. Further

electric force microscope studies with thinner pentacene samples will allow a direct

connection, if it exists, between grain boundaries and charge traps.

The long-lived traps observed here cannot be due to bulk trapping at ran-

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domly distributed chemical defects. Bulk traps should have well-defined energies,

inconsistent with the observed trap concentration statistics. Above a threshold,

trap concentration rises approximately linearly in voltage, consistent with a po-

laron (cation) trapping mechanism. Further studies will be needed to determine

if a bipolaron (dication) trapping mechanism is present in these devices, as has

been proposed by Northrup and Chabinyc for hydrogen and oxygen related de-

fects in pentacene [11, 12]. Varying the charging time might yield information

about whether the holes trap singly or in pairs. The effect of a bipolaron mecha-

nism can be observed through the rate of change of the source-drain current versus

time. For a bipolaron mechanism, the current decay depends on the number of mo-

bile holes squared, i.e. dNtrapped/dt ∝ N2h , where Ntrapped and Nh are the number

of trapped charges and the number of free holes, respectively.

Knipp et al. have found that trap depth is different for pentacene transistors

fabricated on a rough versus a smooth silicon nitride dielectric, suggesting that

traps are associated with perturbations in pentacene energetics arising from the

dielectric [6]. It is tempting to draw a similar conclusion from the data for the

pentacene/SiO2 interface, because the observations imply that there are sites in

polycrystalline pentacene near the SiO2 interface in addition to grain boundaries

that act as traps. Surprisingly, however, the ∼ 300 nm length scale associated

with charge trap domains in the images of Fig. 4.7 are much larger than the length

scales associated with either pentacene topography (Fig. 4.9(a)) or SiO2 topogra-

phy (data not shown). It is hard to understand why the observed trapping domains

are so large, if the dielectric/organic interface is determining the trap energies. Es-

tablishing a definitive connection between local chemical structure at the buried

pentacene/dielectric interface will be challenging, since essentially no analytical

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tools exist for determining local structure at a buried solid-solid interface. As a

next step, it will be interesting to image traps in pentacene deposited on various

dielectrics.

In conclusion, charge traps in polycrystalline pentacene are found to be distrib-

uted inhomogeneously but do not appear to be associated with grain boundaries.

Using frequency-shift electric force microscopy to image traps is quite general and

requires no assumptions about charge transport in either the bulk or at the con-

tacts. In this study, traps which fill quickly (< 30 s) and empty slowly (> 20 min)

are imaged. It is reasonable that 30 s is long enough to populate the majority of

trap sites, since the current-voltage characteristics taken on this timescale show

good saturation behavior, and the trap densities measured are comparable to what

has been estimated by others [6]. While the implementation described here is natu-

rally suited to imaging long-lived traps (≥ 20 min), studying shorter lifetime traps

(≤ 1 s) should be possible by following the cantilever frequency as a function of

time, point by point.

References

[1] T. Sakurai, “Thermally stimulated current in the absence of optical-excitationin the annealing of tetracene and pentacene films,” Phys. Rev. B, vol. 40,no. 17, pp. 11817–11821, 1989.

[2] Y. S. Yang, S. H. Kim, J. I. Lee, H. Y. Chu, L. M. Do, H. Lee, J. Oh, T. Zyung,M. K. Ryu, and M. S. Jang, “Deep-level defect characteristics in pentaceneorganic thin films,” Appl. Phys. Lett., vol. 80, no. 9, pp. 1595–1597, 2002.

[3] E. M. Muller and J. A. Marohn, “Microscopic evidence for spatially inhomo-geneous charge trapping in pentacene,” Adv. Mater., vol. 17, no. 11, pp. 1410–1414, 2005.

[4] Y. J. Zhang, J. R. Petta, S. Ambily, Y. L. Shen, D. C. Ralph, and G. G.Malliaras, “30 nm channel length pentacene transistors,” Adv. Mater., vol. 15,no. 19, pp. 1632–1635, 2003.

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[5] A. R. Volkel, R. A. Street, and D. Knipp, “Carrier transport and density ofstate distributions in pentacene transistors,” Phys. Rev. B, vol. 66, no. 19,pp. 347–355, 2002.

[6] D. Knipp, R. A. Street, A. Volkel, and J. Ho, “Pentacene thin film transis-tors on inorganic dielectrics: morphology, structural properties, and electronictransport,” J. Appl. Phys., vol. 93, no. 1, pp. 347–355, 2003.

[7] S. Verlaak, V. Arkhipov, and P. Heremans, “Modeling of transport in poly-crystalline organic semiconductor films,” Appl. Phys. Lett., vol. 82, no. 5,pp. 745–747, 2003.

[8] R. A. Street, D. Knipp, and A. R. Volkel, “Hole transport in polycrystallinepentacene transistors,” Appl. Phys. Lett., vol. 80, no. 9, pp. 1658–1660, 2002.

[9] D. Knipp, R. A. Street, and A. R. Volkel, “Morphology and electronic trans-port of polycrystalline pentacene thin-film transistors,” Appl. Phys. Lett.,vol. 82, no. 22, pp. 3907–3909, 2003.

[10] K. P. Puntambekar, P. V. Pesavento, and C. D. Frisbie, “Surface potentialprofiling and contact resistance measurements on operating pentacene thin-film transistors by kelvin probe force microscopy,” Appl. Phys. Lett., vol. 83,no. 26, pp. 5539–5541, 2003.

[11] J. E. Northrup and M. L. Chabinyc, “Gap states in organic semiconductors:hydrogen- and oxygen-induced states in pentacene,” Phys. Rev. B, vol. 68,no. 4, p. 041202, 2003.

[12] R. A. Street, A. Salleo, and M. L. Chabinyc, “Bipolaron mechanism for bias-stress effects in polymer transistors,” Phys. Rev. B, vol. 68, no. 8, p. 085316,2003.

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CHAPTER 5

ULTRATHIN PENTACENE TRANSISTORS AND FUTURE

DIRECTIONS

Simplifying the topography of the polycrystalline pentacene could aid in deter-

mining the role of the grain boundaries in trapping. Measuring the trap density at

a single isolated grain boundary would be ideal. Performing this type of measure-

ment using EFM has several requirements. First, the island size (i.e. the size of the

grains) must be much larger than the resolution of the electric force microscope.

This requires grains of at least 2− 5 µm in diameter, which is slightly higher than

was grown for the trap imaging experiment. Second, the pentacene film should

only consist of 1-2 monolayers. Transistors with ultrathin films of pentacene have

recently been fabricated [1–4]. Third, the transistor gap would have to be small

enough to image with the electric force microscope. This chapter outlines the steps

taken in attempt to meet these requirements.

The improvement of the grain sizes was achieved by decreasing the pentacene

deposition rate to 0.03−0.05 A/s and further cleaning the substrate surface. Prior

to pentacene deposition, the substrate is MOS cleaned at the Cornell Nanofabri-

cation Facility. Because metals are not compatible the the MOS clean chemicals,

the bottom contact geometry had to be abandoned. The procedure to make top

contacts is outlined later. Prior to the MOS clean, the substrate is cleaned with

isopropanol and acetone. At this point, water would bead up on the surface of the

substrate indicating a hydrophobic surface. After the MOS clean, water does not

bead up, suggesting a hydrophilic surface – a quick indication that the MOS clean

has been effective.

The cleaned substrates were taken immediately to the deposition chamber and

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pumped down to a vacuum of 10−6 Torr. The samples are mounted on a heater

stage. They are heated to 180C for one hour and allowed to cool to 60C. The

cooling takes about 6 hours because they are in vacuum. The heating of the sample

dries off the water and any organics that remain on the sample. The deposition

is performed, at a rate of 0.03 − 0.05A/s, with the sample temperature held fixed

at 60C. Depositing at an elevated temperature provides the pentacene molecules

with more kinetic energy allowing them to move around more on the surface before

sticking. An atomic force microscope image of representative samples are shown

in Fig. 5.1. Fig. 5.1(a) shows a film that has approximately 80% coverage with

island sizes around 2 µm. Fig. 5.1(b) shows a near-complete first monolayer of

pentacene with grain sizes of about 4 µm. The beginning of the second layer can

also be seen in Fig. 5.1(b). These films demonstrate that the grains can be made

large enough for easy measurement with the electric force microscope.

The next requirement for making a transistor with these thin films was the

largest challenge of this experiment. Because the cleaning process eliminated the

option of using the bottom contact configuration, shadow masks had to be de-

signed to define top contacts. The shadow mask had to produce contacts that are

separated by a distance that is within the scan range of the electric force micro-

scope (i.e. less than ∼ 30µm). They also had to produce contacts that are wide

enough that the sample could be aligned to the cantilever by hand looking through

a microscope. The luxury of the interdigitated contacts is not feasible in the top

contact configuration, so the sample must be aligned by hand. The contacts were

designed to produce lengths of 10 − 60µm with a width of 750µm.

The design was simply to etch two holes separated by a thin beam in a silicon

wafer (see Fig. 5.2). The beam has a width that is equal to the transistor gap

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(b)

(a)

Figure 5.1: (a) Pentacene islands with a coverage of 80% and (b) with

a near-complete monolayer.

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L

Shadow MaskTop View Shadow Mask

Sample

Gold Source

~19”

Figure 5.2: Schematic of the shadow mask design and the arrangement

in the thermal evaporator.

AuAu AuAu

(a) (b)

Figure 5.3: (a) The gold contacts produced from the shadow mask and

(b) gold contacts where there is an angular misalignment of the mask

and evaporation source

length. The wafer was clamped to the sample substrate containing the pentacene

film and gold was evaporated through the shadow mask. Fig 5.3(a) shows one edge

of the resulting contacts with a gap width of 20 µm.

It is important to align the shadow mask directly above the gold evaporation

source. A horizontal mismatch of just two inches from directly above the evapo-

ration source will produce the rounded-off corners seen in Fig 5.3(b).

Unfortunately, transistors made with the shadow mask on ultrathin films of

pentacene did not work. Transistors with films in the range of 25 nm thick (about

17 monolayer) were successfully fabricated. The current voltage characteristics are

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(a)

(b)

Figure 5.4: (a) Current-voltage characteristics for a pentacene(25nm

thick) thin-film transistor with W = 500µm, L = 30µm and an oxide

thickness of T = 340nm. The gate voltage is goes from +10 to −100V in

−5V steps. (b) The square root of the source-drain current at saturation

versus the gate voltage. The mobility and threshold voltage is calculated

from the saturation regime.

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shown in Fig. 5.4. Fig. 5.4(a) shows the current voltage characteristics of a 25nm

thick pentacene transistor. The mobility was calculated to be 0.02cm2/Vs in the

saturation regime, see Fig. 5.4(b). There are a couple of features that distinguish

the top contact device from the bottom contact device. First, there is the notable

difference in quality of the contacts based on the sharp initial rise of the source-

drain current. And, second, the device does not reach saturation at the high gate

voltages.

Transistors with gap lengths of 20 µm were fabricated and met the requirement

of being smaller than the scan range of the electric force microscope; however, the

yield was small (less than 50%). Transistors with a gap lengths of 10 µm were never

successfully fabricated. All devices with this length were electrically shorted.

The fabrication of transistors that incorporate both ultrathin pentacene films

and top contact transistors was elusive. Successful implementation and measure-

ment of this type of transistor has the potential to answer many of the outstanding

questions regarding the spatial characteristics of charge trapping in pentacene thin

films. The thicker pentacene thin films investigated in Chap. 4 contained layers of

pentacene that masked the grain boundaries of the first few layers. These ultra-

thin films would enable correlation between the spatial distribution of the charge

trapping with the grains directly participating in the trapping.

The electric force microscope has proven to be an effective tool for measuring

charge trapping in pentacene thin-film transistors. The spatial distribution of the

charge trapping in pentacene has been shown to be inhomogeneous and not asso-

ciated with the polycrystalline grain boundaries. Future EFM studies on ultrathin

films to probe not only the spatial distribution of trapping, but also the energetic

distribution could provide much details that could compliment the vast amount of

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information already known about pentacene thin film transistors.

References

[1] R. Ruiz, A. Papadimitratos, A. Mayer, and G. Malliaras, “Thickness depen-dence of mobility in pentacene transistors,” Adv. Mater., in press, 2005.

[2] S. Y. Jung and Z. Yao, “Organic field-effect transistors with single and doublepentacene layers,” Appl. Phys. Lett., vol. 86, no. 8, 2005.

[3] M. Daraktchiev, A. von Muhlenen, F. Nuesch, M. Schaer, M. Brinkmann, M. N.Bussac, and L. Zuppiroli, “Ultrathin organic transistors on oxide surfaces,” New

J. Phys., vol. 7, 2005.

[4] R. Ruiz, D. Choudhary, B. Nickel, T. Toccoli, K. C. Chang, A. C. Mayer,P. Clancy, J. M. Blakely, R. L. Headrick, S. Iannotta, and G. G. Malliaras,“Pentacene thin film growth,” Chem. Mater., vol. 16, no. 23, pp. 4497–4508,2004.

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APPENDIX A

BOTTOM CONTACT RECIPE

Bottom contact devices are made using the following recipe. The items in bold

are the actual procedures; they are followed by an short explanation or comment

on the procedure.

• Layer 1

1. Liquid prime with P-20 (20% HMDS) primer. Apply over

entire wafer, allow to remain 10 seconds, then spin dry at

4000 rpm for 30 seconds. The liquid primer prepares the surface for

better adhesion of the resist.

2. Spin S1813 resist at 4000 rpm for 30 seconds (gives about

1.6 µm thickness of resist. Two pipets of resist is poured in the center

of the wafer and spun as soon as possible. Not spinning the resist soon

enough can dissolve the primer (CNF staff recommendation). Bubbles

should be avoided.

3. Bake on hot plate at 115 Celsius for 90 seconds. This is typically

called a “soft bake” and is used to evaporate any remaining solvent in

the resist.

4. Expose for 6 seconds on the EV620 contact aligner using only

the mask defining the gate electrodes. Use the soft contact

recipe. The exposure time can vary depending on the current output

of the UV lamp in the EV620. If your features are not pushing the limit

of contact lithography (which is about 2 µm, then the exposure can be

slightly longer. 10s is not unusual).

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5. Develop in 300 MIF for 60 seconds. Rinse thoroughly in DI

water and dry with N2. CNF recently made available a tool that

can do automatic developing. Just choose the right recipe and it will

develop, rinse and dry. The resist will be washed away in any place

where it was exposed to UV light from the EV620.

6. (optional) Hard bake for 60 seconds at 115C, or 20-30 minutes

in oven. This step strengthens the resist and increases its selectivity

in the etch processes.

7. Etch oxide on Oxford 80 RIE using the CHF3/O2 recipe. This

recipe etches at roughly 25 nm/min and has a etch ratio of 2:1 with

resist.

8. Etch silicon on Oxford 80 RIE using the nitride CF4 recipe

This recipe etches roughly at 40 nm/min.

9. Strip resist with 1165 hot bath for 10 minutes, rinse thoroughly

in DI water and dry with N2.

• Layer 2

1. Liquid prime with P-20 (20% HMDS) primer. Apply over

entire wafer, allow to remain 10 seconds, then spin dry at

4000 rpm for 30 seconds.

2. Spin S1813 resist at 4000 rpm for 30 seconds (gives about 1.6µm

thickness of resist.)

3. Bake on hot plate at 115C for 90 seconds.

4. Expose for 6 seconds on the EV620 contact aligner using the

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mask defining the source drain and gate electrodes. Use the

soft contact recipe.

5. Bake in the YES oven using Ammonia (NH3). This is process 2

which takes about 90 minutes. This is part of the image reversal step.

6. Flood expose on the HTG contact aligner for 60 seconds (no

mask). This step completes the image reversal.

7. Develop in MF 321 for 60 seconds. Rinse thoroughly in DI

water and dry with N2.

8. Descum for 5 minutes in the Branson barrel etcher.

9. (optional - for recessed electrodes) Etch oxide in Oxford 80

RIE using the CHF3/O2 recipe to a depth equal to how thick

the metal electrodes will be. This recipe etches at roughly 25 nm/min

and has a etch ratio of 2:1 with resist.

10. Evaporate 5 nm of chrome as an adhesion layer and 50nm of

gold. This can be done with either e-beam or thermal evaporation and

a typical deposition rate is 1 A/s.

11. Strip resist in acetone for at least 4 hours. May require overnight

to remove all the gold. Rinse thoroughly in DI water and dry with N2.

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APPENDIX B

SHADOW MASK RECIPE

The shadow masks are fabricated using the following recipe.

1. Start with a wafer that has 1 µm of thermal oxide. The oxide on the

bottom of the wafer will act as an etch stop for the deep etching step. The

oxide on the top of the wafer is used for an etch mask.

2. Deposit about 1µm of PECVD oxide on the top of the wafer using

the GSI. This oxide also is part of the etch mask.

3. Liquid prime with P-20 (20% HMDS) primer. Apply over entire

wafer, allow to remain 10 seconds, then spin dry at 4000 rpm for

30 seconds. The liquid primer prepares the surface for better adhesion of

the resist.

4. Spin S1813 resist at 4000 rpm for 30 seconds. This results in about

1.6 µm thickness of resist.

5. Bake on hot plate at 115C for 90 seconds.This is typically called a

“soft bake” and is used to evaporate any remaining solvent in the resist.

6. Expose for 6 seconds on the EV620 contact aligner using the shadow-

mask mask. Use the soft contact recipe.

7. Develop in 300 MIF for 60 seconds. Rinse thoroughly in DI water

and dry with N2.

8. (optional) Hard bake for 60 seconds at 115C, or 20-30 minutes in

oven.

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9. Etch oxide on Oxford 80 RIE using the CHF3/O2 recipe. This recipe

etches at roughly 25 nm/min and has a etch ratio of 2:1 with resist. Leave

any remaining resist on the wafer.

10. Etch silicon in Uniaxis 770 using the “1thru” recipe. The 1thru

recipe etches Si at a rate of 2 µm/min. It etches: Resist at 35-40 nm/min,

thermal oxide at 6 nm/min, and PECVD oxide at 11−12 nm/min. This step

takes about 4 hours to complete. It is good to check the thickness near the

end of the process using the profilometer. The time could be shortened by

starting with a thinner wafer (∼ 300 µm thick instead of a standard 500 µm

thick wafer).