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ECE 3130 – Digital Electronics and Design

Lab 4VTC and Power Consumption

Fall 2012

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Today’s Lab

• Plot VTC for an inverter• Check if VTC is symmetric• If VTC is not symmetric we will find Wp/Wn

such that the VTC for an inverter is symmetric

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What is VTC?• Voltage Transfer Curve• Plots output voltage vs. input voltage• Symmetry – when a line plotted through the origin and Vdd/2 intersects the VTC

at Vdd/2

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Plotting the VTC• Open your inverter test bench from the 1st lab• Replace the pulse input with a DC source• Use the net label to label “in” and “out” of the inverter

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Simulation Settings• Select DC sweep analysis• Set the source name to the name of your inverter’s input source

(IMPORTANT: add a ‘v’ in front of the name!)• Click OK, do NOT simulate

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T-Spice• Click the “Open in T-Spice” button (T-icon to the right of the green play button)• Add the following lines of code• Hit the green play button

That vertical line is just the cursor, ignore that

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The VTC is not symmetric

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Obtaining a Symmetric VTC

• Keeping the length and width of the NMOS fixed we can vary the width of the PMOS to obtain a symmetric curve

• To do so, we will perform a DC sweep like before but with the addition of the parametric sweep

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Setting up the Parametric Sweep

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Defining the pMOS width as a parameter

• In the T-Spice code, write .param width=3u• In the pMOS properties, change W=3u to

W=‘width’• Now, the pMOS width is defined by parameter

‘width’

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Your T-Spice code should look like this

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Parametric Sweep Waveform

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Designing with Symmetric VTC

• Click the trace to determine the width required for the symmetric VTC

• Record the width of the pMOS corresponding to the symmetric operating point (you should get 3.2u)

• Replace the inverter input with the original Pulse source

• Go back to simulation settings and uncheck the DC and parameter sweep and select Transient Analysis

• Open up the T-Spice command window and substitute this width for the pMOS and simulate

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Rise/Fall Times @ Symmetric Operation

• In the W-Edit window, go to the waveform calculator

• Click “Measures…” and select “rise time”• Type in a trace name and press “Measure”• With the same trace, measure the “fall time”• Since we changed the pMOS width to obtain a

symmetric VTC, the rise and fall times should be the same

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Power Consumption

• Now, we will use Tanner Tools to estimate the power consumption of a design

• We will also identify the sources of that consumption

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Power Consumption

• Simulate the circuit over 2 periods with fine resolution (2ns)

• Show the waveforms for:– The input and output voltages– The power provided by the power supply– The currents drawn from the power supply and

the capacitor

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Plotting Power and Current from the Transient Analysis

Get this capacitor from the Devices library

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Power Consumption @10 pF load and 10ns rise time

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Power Consumption @1 pF load and 10ns rise time

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Power Consumption @1 pF load and 1ns rise time

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Analysis

• Report numerical values of your results in tabular form.

• Can we vary the width of NMOS instead of PMOS in order to obtain symmetric VTC? If yes, should we increase or decrease it’s value keeping PMOS width fixed?

• On the VTC of the inverter, show the triode, saturation, and cut-off region. Which region is used for digital design and which one is used for analog design?

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Analysis (Continued)

• Do you obtain different values of power consumed on varying the load and rise/fall time of the pulse? Compare and analyze your results.