ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken...

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ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6 th Edition, by Roth and Kinney, and were used with permission from Cengage Learning.

Transcript of ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken...

Page 1: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

ECE 301 – Digital Electronics

Karnaugh Maps

(Lecture #7)

The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6th Edition, by Roth and Kinney,

and were used with permission from Cengage Learning.

Page 2: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 2

Simplification of Logic Functions

Logic functions can generally be simplified using Boolean algebra.

However, two problems arise:– It is difficult to apply to Boolean algebra laws

and theorems in a systematic way.– It is difficult to determine when a minimum

solution has been achieved. Using a Karnaugh map is generally faster and

easier than using Boolean algebra.

Page 3: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 3

Simplification using Boolean Algebra

Given: F(A,B,C) = m(0, 1, 2, 5, 6, 7)Find: minimum SOP expression

Combining terms in one way:

Combining terms in a different way:

Page 4: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 4

Karnaugh Maps

Like a truth table, a Karnaugh map specifies the value of a function for all combinations of the

input variables.

Page 5: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 5

Two-variable K-map

0

1

0 1

m 0 m 2

m 3 m 1

B

Arow # A B minterm

0 0 0 m0

1 0 1 m1

2 1 0 m2

3 1 1 m3

Page 6: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 6

Two-variable K-map: Example

0 2

1 3

Minterm expansion: F(A,B) = m(0, 1) = A'B' + A'B

Maxterm expansion: F(A,B) = (2, 3) = (A'+B).(A'+B')

numeric algebraic

row # A B F

0 0 0 1

1 0 1 1

2 1 0 0

3 1 1 0

Page 7: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 7

Three-variable K-map

row # A B C minterm

0 0 0 0 m0

1 0 0 1 m1

2 0 1 0 m2

3 0 1 1 m3

4 1 0 0 m4

5 1 0 1 m5

6 1 1 0 m6

7 1 1 1 m7

m 0 m 4

m 5 m 1

BC

A

m 3 m 7

m 6 m 2

0 0

0 1

1 1

1 0

0 1

Gray Code

Page 8: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 8

Three-variable K-map: Example

3 7

2 6

0 4

1 5

Minterm expansion: F(A,B,C) = m(2, 3, 4, 6)

Maxterm expansion: F(A,B,C) = (0, 1, 5, 7)

row # A B C F

0 0 0 0 0

1 0 0 1 0

2 0 1 0 1

3 0 1 1 1

4 1 0 0 1

5 1 0 1 0

6 1 1 0 1

7 1 1 1 0

Page 9: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 9

Minimization using K-maps K-maps can be used to derive the

Minimum Sum of Products (SOP) expression Minimum Product of Sums (POS) expression

Procedure: Enter functional values in the K-map Identify adjacent cells with same logical value

Adjacent cells differ in only one bit Use adjacency to minimize logic function

Horizontal and Vertical adjacency K-map wraps from top to bottom and left to right

Page 10: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 10

Minimization using K-maps Logical Adjacency is used to

Reduce the number number of literals in a term Reduce the number of terms in a Boolean

expression.

The adjacent cells

Form a rectangle Must be a power of 2 (e.g. 1, 2, 4, 8, …)

The greater the number of adjacent cells that can be grouped together (i.e. the larger the rectangle), the more the function can be reduced.

Page 11: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 11

K-maps – Logical Adjacency

Gray code

Page 12: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 12

Minimization: Example #1

Minimize the following logic function using a Karnaugh map:

F(A,B,C) = m(2, 6, 7)

Specify the equivalent maxterm expansion.

Page 13: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 13

Minimization: Example #2

Minimize the following logic function using a Karnaugh map:

F(A,B,C) = M(1, 3, 5, 6, 7)

Specify the equivalent minterm expansion.

Page 14: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 14

Minimization: Example #3

Use a Karnaugh map to determine the

1. minimum SOP expression2. minimum POS expression

For the following logic function:

F(A,B,C) = m(0, 1, 5, 7)

Specify the equivalent maxterm expansion.

Page 15: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 15

Minimization: Example #4

Use a Karnaugh map to determine the

1. minimum SOP expression2. minimum POS expression

For the following logic function:

F(A,B,C) = M(0, 1, 5, 7)

Specify the equivalent minterm expansion.

Page 16: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 16

Minimization: Example #5

For the following truth table:

# A B C F

0 0 0 0 0

1 0 0 1 1

2 0 1 0 0

3 0 1 1 1

4 1 0 0 1

5 1 0 1 0

6 1 1 0 0

7 1 1 1 1

Page 17: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 17

Example #5

Specify the:

1. minterm expansion2. maxterm expansion

Use a K-map to determine the:

1. minimum SOP expression2. minimum POS expression

Page 18: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 18

Minimization: Example #6

For the following truth table:

# A B C F

0 0 0 0 0

1 0 0 1 1

2 0 1 0 1

3 0 1 1 1

4 1 0 0 0

5 1 0 1 1

6 1 1 0 0

7 1 1 1 0

Page 19: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 19

Example #6

Specify the:

1. minterm expansion2. maxterm expansion

Use a K-map to determine the:

1. minimum SOP expression2. minimum POS expression

Page 20: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 20

Minimal Forms

Can a logic function have more than one minimum SOP expression?

Can a logic function have more than one minimum POS expression?

Page 21: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

Spring 2011 ECE 301 - Digital Electronics 21

K-maps – Two minimal forms

F(A,B,C) = m(0,1,2,5,6,7) = M(3,4)

Page 22: ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

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Questions?