DIGITAL LOGIC DESIGN (2+1)

ENGR MUHAMMAD SHAKEEL AKRAMELECTRONICS ENGINEERING

FICT, BUITEMS.

GRADING POLICY

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Particulars GradingLAB

Lab Marks Evaluation Lab manual Term Project Viva Lab

Performance/Paper

15151010

Online Simulator link:https://academo.org/demos/logic-gate-simulator/

Course links:1. sites.google.com/site/lecturermsakramm2. https://www.facebook.com/

LECTURERMSAKRAM

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Lab Manual Format

Date of conduction__________________ Date of submission___________________

Experiment no & Title

Objective :

Tools : Components :

Theory :

Procedure :

Results : (in table format)

Precautions :

Conclusion:

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LAB 1

IDL-800 Digital Trainer

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LAB 1

1. To Study the operation of different parts of Logic Trainer (IDL-800)

OBJECTIVE

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LAB 1

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LAB 11. POWERS SWITCH WITH INDICATOR2. F.G. OUTPUT AMPLITUDE ADJUSTER3. F.G. OUTPUT FREQUENCY RANGE SELECTOR4. FINE TUNE OF F.G. OUTPUT FREQUENCY5. F.G. OUTPUT WAVE FORM SELECTOR6. BCD INPUT OF 7-SEGMENT DECODER7. DC 0 to + 15 ADJUSTER8. DC 0 to -15 ADJUSTER9. FIXED DC +5V10.FUNCTION SWITCHES, +5V/0/-5V11. PULSE SWITCHES.12.DATA SWITCHES13.BREADBOARD 14.POINT TIP/BANANA SOCKET/BNC SOCKET EXCHANGE

ADAPTERS15.BUFFERED SINGLE LAMP LED DISPLAYS16.OUTPUT OF 7 SEGMENT DECORDER17.RANGE SELECTOR OF DIGITAL VOLTMETER.18.INPUT OF DIGITAL VOLTMETER19.DISPLAY OF DIGITAL VOLTMETER

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LAB 1

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