Design flash adc 3bit (VHDL design)
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Transcript of Design flash adc 3bit (VHDL design)
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Design Flash ADC 3bit
Introduced by :
Eng.Rabab Hamed Muhammad Aly
Minia universityFaculty of Engineering Electrical Department (CSE)
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Why we used ADC?
What is the main types of ADC? Which design we will use ?
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Model 1 Digital(VHDL)
Model 2 with minimum power
Flash ADC
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Model1 Design Flash ADC
concept of Flash ADC:
The flash ADC is a fastest speed compared to other ADC architectures.
The flash ADC is also known as the parallel ADC because of its parallel architecture.
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• it is used for high-speed and very large bandwidth applications such as radar processing, digital oscilloscopes
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Flash ADC block diagram
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The Main component of flash ADC design:
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• these architecture needs 2n -1 comparators for a n-bit ADC; for example, a set of 7 comparators is used for 3-bit flash ADC. Each comparator has a reference voltage that is provided by an external reference source.
• For instance, a 6-bit flash ADC needs 63 comparators, but 1023 comparators are needed for a 10-bit flash ADC
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The design of comparator:
• Ai, Bi : Inputs to be compared• Ein = "1" : It indicates that A and B in previous
comparison are equal to each other• Gin = "1" : It indicates that A is greater than B in previous
comparison • Eout= "1" : It indicates that the inputs are equal to each
other• Gout= "1" : It indicates that A is greater than B
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• in the design the operation of comparator to be greater than values only then we will use the Gout equation only and will be
• Gout=Gin+AiBi′
Note that
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The design of Priority Encoder:
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VHDL Simulation
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VHDL Simulation
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That compare between normal design of flash and another analogue design to get lowest power consumption
Resolution and circuit complexity causing high power consumption are the major problems with Flash ADC, and these have limited its application despite its speed of conversion, which is the fastest among all types of Analog to Digital Converters”.
Model2 “Design Flash ADC with Low power ”
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Two comparators were successfully used instead of seven which resulted in 92% reduction in power consumption.
Old design New design2n-1 2n-3
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Reference
• [1] Design & Implementation of Low Power 3-bit Flash ADC in 0.18µm CMOS, Pradeep Kumar, Amit Kolhe, international Journal of Soft Computing and Engineering (IJSCE)ISSN: 2231-2307, Volume-1, Issue-5, November 2011.
• [2] https://en.wikipedia.org/wiki/Comparator• [3] http://www.electronics-tutorials.ws/combination/comb_4.html• [4] Design of a new 3-bit Flash Analog to Digital Converter
(ADC)E. O. Ogunti and F. J. OmotayoDepartment of Electrical/Electronic Engineering Federal University of Technology, Akure, Nigeria
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Thanks