Design · Design for Manufacturability •Architecture challenges •Logic and circuit challenges...
Transcript of Design · Design for Manufacturability •Architecture challenges •Logic and circuit challenges...
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ITRS
Design
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Design
• Design for manufacturability• Design verification
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Design for Manufacturability
• Architecture challenges• Logic and circuit challenges• Layout and physical design challenges• Yield prediction and optimization
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Variability Modeling and Roadmap –Need for Such a Roadmap
• Expected to be the source of multipleDFM challenges
• Invest in variability reduction or designproductivity improvements?
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Variability Modeling and Roadmap –Levels of Abstraction
• Circuit/Chip level• Device level• Physical level
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Design Verification
• Verification vs testing• Moore’s law• Historical emphasis in design improvement
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Design Verification – Challenges (>50nm)
• Capacity• Robustness• Verification metrics• Software• Reuse• Specialized verification methodology• Specialized design-for-verifiability• New kinds of concurrency
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Design Verification – Challenges (<50nm)
• Design for verifiability• Higher levels of abstraction• Specification for verifiability• Verification in presence of non-digital effects• Heterogeneous systems• Analog-Mixed signal• Soft failures• Verification for redundancy