Design and Construction of a PC-Based

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Design and Construction of a PC-basedPartial Discharge Analyzer using FPGARattapoom Vudhichamnong, Thanaporn Thongphuak, Warut Thaweesub,

Ekachai Tuntikanokporn, Narong Tongchim and Samruay SangkasaadCenter of Excellence in E lectrical Power Techn ologyChulalongkom U niversity, Bangkok, Thailande-mail :attauoom63,iowit.com

Abstract: This paper presents the implemen tationof the PC-based PD (Partial Discharge) analyzer. ThisPD an alyzer is capable of m easuring both PD level andIEC integrated quantities and analyzing PD data storedin a 3-dimensional distribution. FPGA (FieldProgrammable Gate Arrays) is the main IC in digitalpart for circuits implem entation to perform real-timedata processing, controlling and interfacing o PC. In theanalysis process, the H ($,q) distributio n is derivedfrom the recorded PD data stream. Fractal features arecalculated fi-om the surface of the distribution. Finally,automatic classification of defects will be performed.Real-time measurement and display on Windows98platform are achieved by using the VxD device driverand the visual-style software developed in C++language. The test result sh ows that the cha racteristic ofthe PD analyzer complies with IEC Publ. 60270.

lyzer is an indispensable tool for insulationthe lifetime and reliability of insulation has long beenrecognized. However, the use of diagnosis devicedepends on the ratio between benefit and cost.Therefore high performance of PD analyzer has to beachieved while affordable cost is still maintained.Recent technology in electronics and computerrealizes the implementation of high-performance yetlow-cost measuring instruments. The PD analyzer cannow ut i l i ze the combina t ion of FPG A ( F ie ldProgrammable Gate Arrays), PC and Windowsoperating system for implementing complicated digitalpart without comp romising ease of use. M oreover, usingFPGA means reduction of time-to-market period andusing both PC an d W indows means real-time displayingand complex analyzing can be performed.

conditionD 3 sessment due to the significance of PD ov er\

Keywords: PD Analyzer, Insulation diagnosis, FPGA, C-based instrument, Automatic classification, Fractal 2. BRIEF OVERVIEW OF FPGAfeatures, Centour score

1. INTRODUCTION1 the era of industry and te Fo lo g y, bulk powertransfer is necessary for increasing energydemand. Also with the electric power transmitted on anoverhead as line increases approximately with thesquare of the system operating voltage. While theprinciple of generating higher voltage is simple, that ofinsulation for higher voltage is not. Therefore most ofthe problems in high vo ltage techniques are concemedwith the insulation.With the higher operating voltage for high voltageequipment and with economics reasons, the increasingstress of the insulation is inevitable. Even for well-designed equipment, the presence of defects duringmanu facturing , transportation-or installation.@ases addsmore possib ility for local electric field to be highe r thanthe local dielectric strength. Whenever the condition ismet, PD (Partial Discharge) will occur. Although themagnitude of such discharges is usually small, theycause progressive deterioratio n and may lead to ultimatefailure. It is therefore essential to detect and evaluatetheir presenc e in a non-destructive quality control test.

FPGA devices feature a gate-array-like architecture,with a matrix of logic cells surrounded by a periphery ofI/O cells, as shown in Figure 1[1]. Segments of metalintercon nect can be linked in an arbitrary man ner byprogrammable switches to form the desired signal netsbetween the cells. FPGA combines an abundance oflogic gates, registers, and I/Os with fast system speed.FPGA can be programmed and verified quicklycompare to normal gate arrays. The offered advantagesalso include higher integration than existing standardsolutions and no non -recurring engineering charges orassociated risk possible for mask-programmed gatearrays. Moreover, the designed circuits can be upgradedafter production to add more functionality.

LOOlC BLOCKS

Figure 1. FPGA Architecture

VO BLOCKS

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3. DESIGN CONCEPT

Digital + DeviceC l K C U l t + Driver

1 & - I

4.1 ANALOG CIRCUIT

-+ Application+ Sof vare

The designed PD analyzer works in a real-time PC-based instrumentation trend. PC is used for dataprocessing, displaying, recording and analysing. Bothanalog and digi ta l c i rcui t s of MI (MeasuringInstrument) unit are populated in one PC expansioncard. The card was designed to communicate with PCthrough an ISA (Industrial Standard Architechture) busbecause the throughput of the bus is enough for the pre-processed PD data from FPGA and the implementationof interface circuit and device driver to handle ISA bussignals is not complicated. The characteristic of PDdetection part was aimed to comply with IEC Publ.60270.To diagnose the condition of insulation system inhigh voltage equipment, PD signal is measured andrecorded. H, (4, q) distribution matrix is then calculatedfrom the surface of the distribution using the box-counting method. Finally, automatic classification ofdefects using Centour score to determine the iso-probability lines from different defect groups isperformed.

4. SYSTEM INPLEMENTATIONThe task of designing and developing the PDanalyzer comprises 4 main parts shown in Figure 2. canbe described as follows:

Analog circuit is used for detecting and processingPD signal and test voltage signal that occur in PD testcircuit. The designed CD (Coupling Device) performstwo distinct functions. In high-frequency range, CD actsas a passive high-pass filter to separates PD signal fromtest voltage signal but it acts as the low-voltage arm ofthe voltage divider, formed by CD and a couplingcapacitor Ck, in low-freq uency range so that test voltagesignal is attenuated up to 92 dB. These two outputsignals from CD then pass to MI card by two RG-59/Ucables. When the filtered PD signal flows into MI, thelow-noise digital-controlled amplifier and the activeband-pass filter will further condition the signals. Forthe attenuated test voltage signal, only a general-purpose digital-controlled amplifier is used. Tw o 12-bitADCs (Analog to Digital Converters) are utilized toconvert PD and test voltage signals to 12-bit digitalformat with the sampling rate of 20 MHz and 50 kH zrespectively[2]. All the hardware part is diagrammed inFigure 3.

4.2 DIGITAL CIRCUITDigital circuit is developed to handle the data andthe functionality such as signal processing, systemcontrolling and bus interfacing for an MI. Digitalcircuits are designed by using VHDL (VHSICHardware Description Language) and implemented in asingle FPGA, a Xilinx XC4036XL. Digital sub-circuitsinclude a time-base generator, a PD peak detector, amemory unit readwrite controller and I/O transfercontroller as show n in Figure 4.PD detection circuit start from processing andrecording signals coming from ADC1 and ADC2.

Figure 3. Diagram of the designed PD analyzer

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The two memory units alternately store data withsynchronization signal from the zero-crossing of 50 Hzpower frequency signal. All digital circuits is alsoshown in Figure 5.

L n

Figure 4. Diagram of digital circuits implemented n FPGA( M l , M2 :Memory units) .-.fN .fN

T

a

Mc z

4

Figure 5.All digital circuits

4.3 DEVICE DRIVERDevice driver is a software that fbnctions as adevice controller of a hardware and has capability tointerface with an application. Win32 application inWindows98 normally uses device driver or ring0 DLLto communicate with hardware. VxD (Virtual Device

Driver) is a 32-bit device driver software that workswith VMM (Virtual Machine Manager) to managesystem resource so that all programs can share theresource efficiently[3]. VxD works in kernel mode ofoperating system and then has privilege over applicationsoftware such as using privileged instruction of C PU toaccess any part of the system. Since interrupt signal inthis PD analyzer can occur upto every 20 ms, V xD w asdeveloped to handle such a high repetition signal.The VxD driver used in this work performsinterrupt and 110 virtualization, memory buffermanagement and communication with applicationsoftware. The application program uses Device I10Control interface by calling the Win32 API namedDeviceIoControl directly to communicate with VxD . Incontrast, VxD uses Ring0 Event Handle received fromundocumented API named OpenVxDHandle to signalthe event to application program. The developed VxDmodel is shown in Figure 6.

Appl i ca t ion HacdvareUser

Op e r a t i n gSystem

Figure 6. The developed VxD model

4.4 APPLICATION SOFTWAREApplication software handles user interface, datavisualization and PD analysis routines. The softwarewas developed on Windows98 using Borland C++Builder compiler. The software consists of 3 parts thatcan be described as follows :1.) PD Detector p art displays the measured PDsignal. The display area composes of one main signaldisplay frame and two supplementary history frames.This part composes of 4 functions: Calibration, Lineartime base display, Elliptical time base display and qV-curve display. Time window and bipolar sensitivitythreshold can also be adjusted. This form controls alldetection fbnctions and all successive form calls.Example of Calibration display is shown in Figure 7.2.) Signal Cap tur e pa rt captures unprocessed PDwaveform to diagnose problems in analog part such ashigh level of interference, reflected pulses caused byimpedance mismatching, P-response etc. as shown inFigure 8.The signal can be zoomed in for more detail.

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Figure 7. Calibration display

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Figure 8 Signal Capture frame

3.) PD Analyzer part consists of 5 forms for PDsignal analysing. The form calling order is shown inFigure 9.- Parameter form is shown when pressing"Analyzer" button. All parameters for PD signalrecording, such as recording time and number ofrecord count, can be configured in this form.- Ellipse form displays the recorded signal on an

elliptical tim e base.- Distribution form shown in Figure 10visualizesPD data in 2 and 3 dimensional distributions.The distributions can be saved to a file or openedfrom previously stored files or from databases.- Fractal form calculates and displays fractalfeatures derived from the distribution file.- Decision form shown in Figure 11 features PDdatabase displaying in a tree structure, percentilecalculation and automatic recognition for PDdiagnostics of high-voltage equipment usingCentour score method.

Figure 9. Form calling order in the PD Analyzer part

Figure IO. Distribution form

Figure 1 1 . Decision form

5. TEST RESULTSThe test was exercised to en sure that characteristicof the PD detection part complies with IEC Publ. 60270[4] and the analysis algorithm is correct and reliable.The test result for the PD detection part is shownas follows:1 .) Frequency response is shown in Figure 12.The test system has f , and f2 equal to 44 kHz and427 kHz respectively.2.) Linearity is better than 0.5 percent.3. ) Pulse resolution time is better than 8.5 ps.4. ) Apparent charge readings reside in accept-able ranges of the standard.5. ) Sensitivity for test object having capacitanceof 0.1 nF to 100nF is shown in Figure 13. Sensitivity isbetter than 1 pC for C, (capacitance of test object) andCk capacitance o f coupling capacitor) equal to 1 nF.

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. I1 kHz 10 km 100 kHz 1 MH z Io MH2

Figure 12. Frequency response of the detection parts e n s i t i v i t y ( p C )

Figure 13. Sensitivity of the PD analyzer for Cr=1 nF

Field test for ensuring the validity of the analysisalgorithm was performed by simulating various defecttype. In the demonstration shown in Figure 14,coronadischarge was simulated on a high-voltage capacitor.After gradually raising the test voltage, PD was foundedto be about 60 pC at 10.5kV as shown in Figure 15.PDsignal was stored and the distribution was visualized inthe PD Analyzer mode as shown in Figure 16. Fractalfeatures was then extracted. Finally, automaticfingerprint recognition was performed. The probabilityof being Corona Discharge was above 70 percent whilethe probability for other defect groups was essentiallyzero.

Figure 15. Detected signal of Corona dischaEge

Figure 16. Distribution of Corona discharge pulses

6. CONCLUSIONThe PD analyzer proposed here is capable ofdetecting and analysing PD in high-voltage equipment.The characteristic of the detection part complies withIEC Publ. 60270. The analysis algorithm can classifythe defect effectively on the basis of the validity of thecollected database. PC-based instrumentation approachutilized here results in a high-performance yet low-costmeasuring system.Due to rapid developm ent in FF'GA techno logy,the high speed and complex digital circuits can bedesigned and implemented. It is expected that real-timenoise reduction in PD detection can also be achieved byusing FPGA.

Figure 14. Demonstrationof the PD analyzer

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ACKNOWLEDGEMENTThe authors would like to express their gratitude toThe Thailand Research Fund for providing the financialsupport of this research.

REFERENCES1. Xilinx Inc. The Programmable Logic Data Book.2. Analog Devices Inc. Short Form D esimers Gu ide.3. Oney, W. Programming the Microsoft WindowsDriver Model. Microsoft Press, 1999.p. 3.4. IEC 60270.Partial Disch arge Measurements.: 1998.

1998.p. 1-4.1999. pp . 94 - 18.

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Design and Construction of a PC-Based

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