CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

26
CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com

Transcript of CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

Page 1: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.1

©Paul R. Godin

Last Mod: Dec 2013

prgodin @ gmail.com

Page 2: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.2

CPLDs

Complex Programmable Logic Devices (CPLDs) are digital devices that can be programmed with digital logic functions.

The functions are designed using a software application and uploaded to the chip.

Page 3: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.3

CPLDs The programmed logic functions may be

relatively simple or complex.

Many aspects of the VHDL programming language resembles other programming languages.

The graphic editors resemble Electronics WorkBench / MultiSIM.

Page 4: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.4

Programmable Logic First introduced in the 70’s, programmable devices fall

into several families of devices: PLA (Programmable Logic Array) PAL (Programmable Array Logic) GAL (Generic Array Logic) SPLD (Simple Programmable Logic Device) CPLD (Complex Programmable Logic Device) popular FPGA (Field-Programmable Gate Arrays) very popular

Embedded systems are another group of programmable devices but include more complex elements such as a microprocessor. Examples include microcontrollers and complete systems such as portable telephones, music players, vehicle computers, etc. Semester 3 and 4 will address embedded systems.

Page 5: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.5

Terminology

Many earlier devices were OTP (One-Time Programmable). The PAL (Programmable Array Logic) is this type of device.

Today, most of the CPLDs (Complex Programmable Logic Devices) and FPGAs (Field-Programmable Gate Arrays) are re-programmable.

Page 6: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.6

Page 7: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.7

Reduced circuit board space utilization, and significant cost savings

A low-end 44-pin CPLD is equivalent to 600 gates

Some CPLDs have gate equivalents in the millions and over 324 pins

Advantage #1:

Page 8: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.8

Advantage #2:

Easiest to modify a circuit’s functionsModify the software to modify the hardware

Page 9: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.9

Advantage #3:

Direct entry of conceptual design into a functional circuit

Streamlined design to prototype process

Page 10: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.10

Advantage #4: Transportable design

As a designer you may easily exchange your designs and design modifications (email, CD, web site, etc…). People separated by distance may work together on the same design.

Page 11: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.11

Advantage #5 and #6:

Universal inventory, as one IC can be programmed for various applications

Easy to duplicate

Design

Page 12: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.12

Re-programmabilityCPLD can be reprogrammed hundreds of times.

Advantage #7:

Design 1

Design 2

Design 3

Page 13: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.13

Software and Language

Manufacturers of CPLDs supply design software (basic software is often offered as a free download for students)

VHDL is a standards-based language that most manufacturers conform to (although there are 2 standards).

Advantage #8:

Page 14: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.14

Advantage #9 and #10:

Simple InterfaceDevices can be interfaced directly to a computer

with a serial, parallel or USB connection.

In-circuit modificationsWith the proper interface connections, the CPLD

logic can be edited (reprogrammed) in-circuit.

Page 15: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.15

Advantage #11:

Package options Number of I/Os: CPLDs can have large amounts of

programmable input/output contacts. Capacity: CPLDs can be selected based on programming

capacity.

Page 16: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.16

Page 17: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.17

Basic Architecture

Y=ABC+ABC+ABC

•CPLDs are comprised of SPLDs.

•SPLDs are an SOP-style of programmable devices

•SOP (Sum Of Products) takes the form

Page 18: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.18

Basic Architecture

Programmable Sum-Of-ProductsHas basic make/break connection logic

Each intersect is either connected or disconnected to make up the SOP connections.

Page 19: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.19

Basic Architecture

Example of an SOP connection:

What is the Boolean Expression for this circuit? (go back 2 slides)

Page 20: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.20

Programmability

The devices vary by their complexity and their programmability/re-programmability.

The node connections are make internally during the programming process.

Basic Architecture

Page 21: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.21

Basic Architecture (SPLD)

In

In

In

In

AND Array OR Array

Out

Out

Out

Out

Depending on the device, the above blocks may be fixed, programmable or re-programmable.

Page 22: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.22

The CPLD The Complex Programmable Logic Device

(CPLD) consists of arrays of Simple Programmable Logic Devices.

These SPLD are interconnected with a Programmable Interface Array (PIA).

Additional elements in a CPLD include flip-flops and directional control.

Page 23: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.23

Basic Architecture (CPLD)

PIA

(Pro

gram

mab

le Interco

nn

ect Array)

LAB(Logic Array Block)

LAB(Logic Array Block)

LAB(Logic Array Block)

LAB(Logic Array Block)

I/O

I/O

I/O

I/O

Page 24: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.24

Manufacturers CPLDs are manufactured by several companies including:

Altera Atmel Cypress Texas Instruments Xilinx

All utilize similar internal configurations but require proprietary software to compile and update the devices.

Page 25: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.25

Altera

Altera (www.altera.com) is one of the leaders in the CPLD marketplace.

Altera offers a great range of CPLDs, FPGAs and other programmable devices.

Products range from the MAX series (basic CPLD) to newer products that contain embedded microprocessors.

Page 26: CPLD 1.1 ©Paul R. Godin Last Mod: Dec 2013 prgodin @ gmail.com.

CPLD 1.26

End of CPLD Intro

©Paul R. Godinprgodin @ gmail.com 7H