Course Dairy 4th sem€¦ · Microprocessor Architecture, Real Mode Memory Addressing. UNIT – 2 7...
Transcript of Course Dairy 4th sem€¦ · Microprocessor Architecture, Real Mode Memory Addressing. UNIT – 2 7...
COMPUTER SCIENCE AND ENGINEERING
COURSE DIARY (ACADEMIC YEAR 2011-12)
IV SEMESTER
Name : _____________________________________________
USN : _____________________________________________
Semester & Section : _____________________________________________
The Mission
“The mission of our institution is to provide
world class education in our chosen fields and
prepare people of character, caliber and vision to
build the future world.”
M.V.J. COLLEGE OF ENGINEERING
Department of Computer Science & Engineering
DESIGN AND ANALYSIS OF ALGORITHMS
SYLLABUS
(Common to CSE & ISE)
Sub. Code: 10CS43 IA Marks: 25
Hrs/Week: 04 Exam Hours: 03
Total Hours: 52 Exam Marks: 100
PART – A
UNIT – 1 7 Hours
INTRODUCTION: Notion of Algorithm, Review of Asymptotic Notations, Mathematical
Analysis of Non-Recursive and Recursive Algorithms, Brute Force Approaches: Introduction,
Selection Sort and Bubble Sort, Sequential Search and Brute Force String Matching.
UNIT - 2 6 Hours
DIVIDE AND CONQUER: Divide and Conquer: General Method, Defective Chess Board,
Binary Search, Merge Sort, Quick Sort and its performance.
UNIT - 3 7 Hours
THE GREEDY METHOD: The General Method, Knapsack Problem, Job Sequencing with
Deadlines, Minimum-Cost Spanning Trees: Prim’s Algorithm, Kruskal’s Algorithm; Single
Source Shortest Paths.
UNIT - 4 6 Hours
DYNAMIC PROGRAMMING: The General Method, Warshall’s Algorithm, Floyd’s
Algorithm for the All-Pairs Shortest Paths Problem, Single-Source Shortest Paths: General
Weights, 0/1 Knapsack, The Traveling Salesperson problem.
PART – B
UNIT - 5 7 Hours
DECREASE-AND-CONQUER APPROACHES, SPACE-TIME TRADEOFFS: Decrease-
and-Conquer Approaches: Introduction, Insertion Sort, Depth First Search and Breadth First
Search, Topological Sorting Space-Time Tradeoffs: Introduction, Sorting by Counting, Input
Enhancement in String Matching.
UNIT – 6 7 Hours
LIMITATIONS OF ALGORITHMIC POWER AND COPING WITH THEM: Lower-
Bound Arguments, Decision Trees, P, NP, and NP-Complete Problems, Challenges of
Numerical Algorithms.
UNIT - 7 6 Hours
COPING WITH LIMITATIONS OF ALGORITHMIC POWER: Backtracking: n – Queens
problem, Hamiltonian Circuit Problem, Subset Sum Problem. Branch-and-Bound: Assignment
Problem, Knapsack Problem, Traveling Salesperson Problem. Approximation Algorithms for
NP-Hard Problems – Traveling Salesperson Problem, Knapsack Problem.
UNIT – 8 6 Hours
PRAM ALGORITHMS: Introduction, Computational Model, Parallel Algorithms for Prefix
Computation, List Ranking, and Graph Problems.
Text Books:
1. Anany Levitin: Introduction to The Design & Analysis of Algorithms, 2nd Edition, Pearson
Education, 2007.
(Listed topics only from the Chapters 1, 2, 3, 5, 7, 8, 10, 11).
2. Ellis Horowitz, Sartaj Sahni, Sanguthevar Rajasekaran: Fundamentals of Computer
Algorithms, 2nd Edition, Universities Press, 2007.
(Listed topics only from the Chapters 3, 4, 5, 13)
Reference Books:
1. Thomas H. Cormen, Charles E. Leiserson, Ronal L. Rivest, Clifford Stein: Introduction to
Algorithms, 3rd Edition, PHI, 2010.
2. R.C.T. Lee, S.S. Tseng, R.C. Chang & Y.T.Tsai: Introduction to the Design and Analysis of
Algorithms A Strategic Approach, Tata McGraw Hill, 2005.
DESIGN AND ANALYSIS OF ALGORITHMS
LESSON PLAN
(Common to CSE & ISE)
Sub. Code: 10CS43 IA Marks: 25
Hrs/Week: 04 Exam Hours: 03
Total Hours: 52 Exam Marks: 100
Sl.No Unit Hr.
No TOPICS TO BE COVERED
1 INTRODUCTION
1 Notion of Algorithm
2 Review of Asymptotic Notations
3 Mathematical Analysis of Non-Recursive
4 Mathematical Analysis of Recursive
5 Brute Force Approaches: Introduction, Selection Sort
6 Bubble Sort, Sequential Search
7 Brute Force String Matching
2 DIVIDE AND
CONQUER
8 Divide and Conquer: General Method
9 Defective Chess Board
10 Defective Chess Board and its performance
11 Binary Search and its performance
12 Quick sort and its Performance
13 Merge Sort and its performance
3 THE GREEDY
METHOD
14 The General Method, Knapsack Problem
15 Knapsack Problem
16 Job Sequencing with Deadlines
17 Job Sequencing with Deadlines
18 Minimum-Cost Spanning Trees: Prim’s Algorithm
19 Kruskal’s Algorithm
20 Single Source Shortest Paths.
4
DYNAMIC
PROGRAMMING
21 The General Method, Warshall’s Algorithm
22 Problem on Warshall’s Algorithm
23 Floyd’s Algorithm for the All-Pairs Shortest Paths
Problem
24 Single-Source Shortest Paths: General Weights
25 0/1 Knapsack
26 The Traveling Salesperson problem
5
DECREASE-AND-
CONQUER
APPROACHES,
SPACE-TIME
TRADEOFFS
27 Decrease-and-Conquer Approaches: Introduction
28 Insertion Sort
29 Depth First Search
30 Breadth First Search
31 Topological Sorting
32 Space-Time Tradeoffs: Introduction, Sorting by
Counting
33 Input Enhancement in String Matching
6
LIMITATIONS OF
ALGORITHMIC
34 Lower-Bound Arguments
35 Decision Trees
POWER AND
COPING WITH
THEM
36 Decision Trees
37 P, NP, and NP-Complete Problems
38 P, NP, and NP-Complete Problems
39 Challenges of Numerical Algorithms
40 Challenges of Numerical Algorithms
7
COPING WITH
LIMITATIONS OF
ALGORITHMIC
POWER
41 Backtracking: n – Queens problem, Hamiltonian
Circuit Problem
42 Subset Sum Problem
43 Branch-and-Bound: Assignment Problem, Knapsack
Problem
44 Traveling Salesperson Problem
45 Approximation Algorithms for NP-Hard Problems –
Traveling Salesperson Problem
46 Knapsack Problem
8 PRAM
ALGORITHMS
47 Introduction
48 Computational Model
49 Parallel Algorithms for Prefix Computation
50 Parallel Algorithms for Prefix Computation
51 List Ranking
52 Graph Problems
DESIGN AND ANALYSIS OF ALGORITHMS
QUESTION BANK
UNIX AND SHELL PROGRAMMING
SYLLABUS
Subject Code: 10CS44 I.A. Marks : 25
Hours/Week : 04 Exam Hours: 03
Total Hours : 52 Exam Marks: 100
PART - A
UNIT 1: 6Hours
1. The Unix Operating System, The UNIX architecture and Command Usage, The File System
UNIT 2: 6 Hours
2. Basic File Attributes, The vi Editor
UNIT 3: 7 Hours
3. The Shell, The Process, Customizing the environment
UNIT 4: 7 Hours
4. More file attributes, Simple filters
PART – B
UNIT 5: 6 Hours
5. Filters using regular expressions
UNIT 6: 7 Hours
6. Essential Shell Programming
UNIT 7: 7 Hours
7. awk – An Advanced Filter
UNIT 8: 6 Hours
8. perl - The Master Manipulator
Text Book
1.“UNIX – Concepts and Applications”, Sumitabha Das, 4th Edition, Tata McGraw Hill,
2006. (Chapters 1.2, 2, 4, 6, 7, 8, 9, 10, 11, 12, 13, 14, 18, 19).
Reference Books
1.UNIX and Shell Programming, Behrouz A. Forouzan and Richard F. Gilberg, Thomson,
2005.
2. Unix& Shell Programming, M.G. Venkateshmurthy, Pearson Education, 2005.
M.V.J. COLLEGE OF ENGINEERING
Department of Computer Science & Engineering
LESSON PLAN
UNIX SHELL PROGRAMMING
Sub Code : 10CS44 IA Marks : 25
Hrs / Week : 04 Exam Hours : 03
Total Hrs : 52 Exam Marks : 100
S.No CHAPTER Hour
No
TOPICS TO BE COVERED
1 UNIT-1 1 The Unix Operating System
2 The Unix Operating System
3 The UNIX architecture and Command Usage
4 The UNIX architecture and Command Usage
5 The File System
6 The File System
2 UNIT-2 7 The File System
8 Basic File Attributes
9 Basic File Attributes
10 Basic File Attributes
11 The vi Editor
12 The vi Editor
13 The vi Editor
14 The Shell
3 UNIT-3 15 The Shell
16 The Process
17 The Process
18 The Process
19 Customizing the environment
20 Customizing the environment
4 UNIT-4 21 Customizing the environment
22 More file attributes
23 More file attributes
24 More file attributes
25 Simple filters
26 Simple filters
5 UNIT-5 27 Simple filters
28 Simple filters
29 Filters using regular expressions
30 Filters using regular expressions
31 Filters using regular expressions
32 Filters using regular expressions
6 UNIT-6 33 Filters using regular expressions
34 Essential Shell Programming
35 Essential Shell Programming
36 Essential Shell Programming
37 Essential Shell Programming
38 Essential Shell Programming
39 Essential Shell Programming
7 UNIT-7 40 awk – An Advanced Filter
41 awk – An Advanced Filter
42 awk – An Advanced Filter
43 awk – An Advanced Filter
44 awk – An Advanced Filter
45 awk – An Advanced Filter
8 UNIT-8 46 awk – An Advanced Filter
47 awk – An Advanced Filter
48 perl - The Master Manipulator
49 perl - The Master Manipulator
50 perl - The Master Manipulator
51 perl - The Master Manipulator
52 perl - The Master Manipulator
MVJ COLLEGE OF ENGINEERING
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING
UNIX AND SHELL PROGRAMMING [10CS44]
QUESTION BANK
UNIT-I TO VIII
1.What is operating system give any example ?
2.Why is unix more portable than other operating system?
3.Explain details about the unix architecture with neat block diagram ?
4.Explain differences between the DOS,WINDOWS and UNIX operating system.
5.What is the windowing system of UNIX known as ?
6.Explain details about the man command with examples.
7.What is command ? Explain Briefly with example.
8.Explain features of UNIX.
9. Explain Briefly the UNIX file system.
10.Which of these commands will work ? Explain with reasons :
(i) mkdir a/b/c
(ii) mkdir a a/b
(iii) rmdir a/b/c
(iv) rmdir a a/b
(v) mkdir /bin/foo 11. Explain absolute pathnames and relative pathname with example.
12.Explain briefly the ls commands with its all options and with example.
13.Explain the following commands:
1.pwd
2.cd
3.mkdir
4.rmdir
14.What is attributes?
15.Explain type of file attributes.
16.Explain briefly file permissions with proper example.
17.Explain briefly changing file ownership with suitable example.
18.Where are the UID and GID of a file stored ?
19. Explain briefly navigation in the vi editor with example.
20.What is vi editor ? Explain the three modes with suitable diagram.
21. Explain briefly text editing in the vi editor with suitable example.
22. Explain pattern searching and pattern substitution in the vi editor with suitable example.
23.Explain pattern matching with example.
24.Explain escaping and quoting with example .
25.Explain redirection with example.
26.Explain pipes with suitable example .
27.Explain shell variable with example
28.Explain tee and command substitution with suitable example.
29.What is process? Explain process basics.
30.Explain process status with example.
31.Explain mechanism of process creation.
32.Exlain miscellaneous features and initialization scripts.
33.What is environmental variable ? explain it.
34.Explain hard links with suitable example.
35.Explain link and ln with example.
36.Explain the directory and its permissions with example.
37.Explain paste and sort commands with suitable commands
38.Explain pr and head commands with suitable example.
39.Explain grep command and sed command with suitable example.
40.Explain read and exit command with suitable example.
41.Explain test and expr commands with suitable example.
42.Explain awk filtering with example.
43.Explain printf , variable and expression with example.
44.Explain comparison operator with suitable example.
45.Explain array with example.
46.Explain control flow for if,for and while statement with syntax.
47.What is perl ?explain chop function .
48.explain variable and operator in perl.
49.Explain string handling functions in perl .
50.Explain foreach , split and join commands in perl.
SYLLABUS
MICROPROCESSORS
(Common to CSE & ISE)
Sub. Code: 10CS45 IA Marks: 25
Hrs/Week: 04 Exam Hours: 03
Total Hours: 52 Exam Marks: 100
PART A
UNIT – I 7 Hours
Introduction, Microprocessor Architecture – 1: A Historical Background, the Microprocessor-
Based Personal Computer Systems. The Microprocessor and its Architecture: Internal
Microprocessor Architecture, Real Mode Memory Addressing.
UNIT – 2 7 Hours
Microprocessor Architecture – 2, Addressing Modes: Introduction to Protected Mode Memory
Addressing, Memory Paging, Flat Mode Memory Addressing Modes: Data Addressing Modes,
Program Memory Addressing Modes, Stack Memory Addressing Modes
UNIT – 3 6 Hours
Programming – 1: Data Movement Instructions: MOV Revisited, PUSH/POP, Load-Effective
Address, String Data Transfers, Miscellaneous Data Transfer Instructions, Segment Override
Prefix, Assembler Details. Arithmetic and Logic Instructions: Addition, Subtraction and
Comparison, Multiplication and Division.
UNIT - 4 6 Hours
Programming – 2: Arithmetic and Logic Instructions (continued): BCD and ASCII Arithmetic,
Basic Logic Instructions, Shift and Rotate, String Comparisons. Program Control Instructions:
The Jump Group, Controlling the Flow of the Program, Procedures, and Introduction to
Interrupts, Machine Control and Miscellaneous Instructions.
PART B
UNIT - 5 6 Hours
Programming – 3: Combining Assembly Language with C/C++: Using Assembly Language
with C/C++ for 16-Bit DOS Applications and 32-Bit Applications Modular Programming, Using
the Keyboard and Video Display, Data Conversions, Example Programs
UNIT - 6 7 Hours
Hardware Specifications, Memory Interface – 1: Pin-Outs and the Pin Functions, Clock
Generator, Bus Buffering and Latching, Bus Timings, Ready and Wait State, Minimum versus
Maximum Mode. Memory Interfacing: Memory Devices
UNIT – 7 6 Hours
Memory Interface – 2, I/O Interface – 1: Memory Interfacing (continued): Address Decoding,
8088 Memory Interface, and 8086 Memory Interface. Basic I/O Interface: Introduction to I/O
Interface, I/O Port Address Decoding.
UNIT 8 7 Hours
I/O Interface – 2, Interrupts, and DMA: I/O Interface (continued): The Programmable
Peripheral Interface 82C55, Programmable Interval Timer 8254. Interrupts: Basic Interrupt
Processing, Hardware Interrupts: INTR and INTA/; Direct Memory Access: Basic DMA
Operation and Definition.
Text Book:
1. Barry B Brey: The Intel Microprocessors, 8th Edition, Pearson Education, 2009.
(Listed topics only from the Chapters 1 to 13)
Reference Books:
1. Douglas V. Hall: Microprocessors and Interfacing, Revised 2ndEdition, TMH, 2006.
2. K. Udaya Kumar & B.S. Umashankar : Advanced Microprocessors & IBM-PC Assembly
Language Programming, TMH 2003.
3. James L. Antonakos: The Intel Microprocessor Family: Hardware and Software Principles
and Applications, Cengage Learning, 2007.
M.V.J. COLLEGE OF ENGINEERING
Department of Computer Science & Engineering
MICROPROCESSORS LESSON PLAN
Sub Code : 10CS45 IA Marks : 25
Hrs / Week : 04 Exam Hours : 03
Total Hrs : 62 Exam Marks : 100
S.No CHAPTER Hour
No
TOPICS TO BE COVERED
1 UNIT-1 1 Introduction, Microprocessor Architecture – 1:
2 A Historical Background,
3 The Microprocessor-Based Personal Computer Systems.
4 The Microprocessor and its Architecture:
5 Internal Microprocessor Architecture,
6 Real Mode Memory Addressing.
2 UNIT-2 7 Microprocessor Architecture – 2, Addressing Modes:
8 Introduction to Protected Mode Memory Addressing
9 Memory Paging, Flat Mode Memory
10 Addressing Modes:
11 Data Addressing Modes,
12 Program Memory Addressing modes
13 Stack Memory Addressing Modes
14 Data Addressing Modes
3 UNIT-3 15 Data Movement Instructions: MOV Revisited
16 PUSH/POP, Load-Effective Address
17 String Data Transfers, Miscellaneous Data Transfer Instructions
18 Segment Override Prefix, Assembler Details
19 Arithmetic and Logic Instructions: Addition, Subtraction and Comparison
20 Multiplication and Division
4 UNIT-4 21 Arithmetic and Logic Instructions (continued): BCD and ASCII Arithmetic,
22 Basic Logic Instructions, Shift and Rotate, String Comparisons.
23 Program Control Instructions: The Jump Group
24 Controlling the Flow of the Program, Procedures
25 Introduction to Interrupts
26 Machine Control and Miscellaneous Instructions
5 UNIT-5 27 Combining Assembly Language with C/C++: Using
Assembly Language with C/C++ for 16-Bit DOS
28 Applications and 32-Bit Applications
29 Modular Programming
30 Using the Keyboard and Video Display
31 Data Conversions
32 Example Programs
6 UNIT-6 33 Hardware Specifications, Memory Interface – 1: Pin-Outs and the Pin Functions
34 Clock Generator
35 Bus Buffering and Latching
36 Bus Timings
37 Ready and Wait State
38 Minimum versus Maximum Mode
39 Memory Interfacing: Memory Devices
7 UNIT-7 40 Memory Interface – 2, I/O Interface – 1: Memory Interfacing (continued)
41 Address Decoding
42 8088 Memory Interface
43 8086 Memory Interface.
44 Basic I/O Interface: Introduction to I/O Interface
45 I/O Port Address Decoding
8 UNIT-8 46 I/O Interface – 2, Interrupts, and DMA: I/O Interface (continued)
47 The Programmable Peripheral Interface 82C55
48 Programmable Interval Timer 8254.
49 Interrupts: Basic Interrupt Processing
50 Hardware Interrupts: INTR and INTA
51 Hardware Interrupts: INTR and INTA/
52 Direct Memory Access: Basic DMA Operation and Definition.
MICROPROCESORS
QUESTION BANK
1. Explain the internal architecture of 8086 microprocessor with a neat diagram.
2. Explain any five addressing modes with an example for each.
3. Explain the following:
i) segment and ends ii) EQU iii) ASSUME iv) ASCII codes
4. Explain briefly Assembler, Linker, Locator and debugger.
5. Write a program to find biggest of three numbers.
6. Write a program to add first 8 natural numbers
7. Explain all inter segment jumps along with their instruction formats.
8. Write a delay procedure for producing approximately 5 milliseconds for 8086
microprocessor working at 5Mhz
9. Write a program to demonstrate passing parameters to procedures using general
memory.
10. Compare macros and procedures.
11. Explain the sequence of events in the stack during a far call procedure and ret
12. Explain the following instructions with examples.
DAA AAM CMPSB SCASB IDIV
13. Explain the following directives with examples.
DQ EVEN PUBLIC ORG BYTE PTR
14. Interface 16k RAM and 32k ROM to 8086 microprocessor using memory chips of
size 4k RAM and 4k ROM. Assume suitable starting addresses for RAM and ROM.
Use decoders for interfacing.
15. Explain the difference between memory mapped I/O and directed mapped I/O
16. How 8088 microprocessor accesses memory and ports
17. Explain the action taken by 8086 when a interrupt occurs. Explain the interrupt vector
table.
18. Explain, with the internal block diagram, the 8259A along with all the ICWs and
OCWs.
19. Explain with the internal block diagram of 8255 the different operational modes and
the necessary control words.
20. Explain interfacing 8-digit seven segment display unit to 8086 through 8255 device
operating in mode 0
21. With a neat diagram explain the structure of a microcomputer.
22. Explain with an example, the sequence of operations performed when an instruction
is being executed by the microprocessor.
23. Briefly discuss the evolution of microprocessors.
24. Write and Explain the template for MOV instruction. Find the machine code for
the following instruction: MOV CS:[BX], AL 10
25. Find and explain the errors, if there are any, in the following instructions:
i) MOV BH, AX ii) IN AL, 280H iii) DIV AL, BL iv) PUSH CL
v) ROR AL, 4 10
26. How are the flags of 8086 categorized? Explain each of the flag bits.
27. Write code segments to do the Average of 4 bytes stored in an array
28. Write code segments to do the digit in the packed BCD.
29. What are the sequence of operations that take place when a procedure is called
and when the control is returned from the procedure back to calling program?
30. Write a procedure to check whether the password entered is correct or not.
(Assume a simple password of 6-10 characters length).
31. How do you take care of labels in a MACRO? Give an example. Write a macro to
Convert the given 2 digit BCD number to corresponding binary.
32. Write a delay loop to produce a delay of approximately 10 milliseconds in a
microprocessor working with 10 MHz frequency.
33. Explain the minimum mode configuration of 8086 with a neat diagram
34. Describe memory-mapped I/O and direct I/O. Give the main advantages
and disadvantages of each.
35. Briefly explain the structure of Interrupt Vector Table with a neat diagram.
36. Describe the sequence of actions that an 8259A and an 8086 will take when
8259A receives an interrupt signal on its IR2 input. Assume only IR2 is
unmasked in the 8259A and that 8086 INTR input has been enabled with a
STI instruction.
37. Explain the different methods of parallel data transfer.
38. Explain the control word register of 8255A in detail.
39. Compare strings and macros.
40. Give the differences between 86 and 88 microprocessors.
41. Explain 8086 read operation with timing diagram.
42. With an example explain any 4 addressing modes
43. Explain the block diagram of 8259A priority interrupt controller.
44. Explain the different operational modes and the necessary control words of 8255
microprocessor.
45. Explain the control flags and conditional flags of 8086. Also list the differences between
8086 flag register with 8085 flag register
46. Explain EVEN, PUBLIC and ORG with examples.
47. Give examples and also explain the CMPSB, SCASB and IDIV instructions
48. Write a program to read a 16-bit number and find the factorial using recursion
49. Describe the operation and what the steps that take place in 8086 microprocessor are when
an interrupt occurs.
50. Give the formats of initialization command words and write the code to send the
command words to 8086 microprocessor.
M.V.J COLLEGE OF ENGINEERING Department Of Computer Science & Engineering
LESSON PLAN— COMPUTER ORGANIZATION SUBJECT CODE: 10CS46 IA MARKS: 25
HOURS/WEEK: 4 EXAM HOURS: 3
TOTAL HOURS: 52 EXAM MARKS: 100
SL
NO
CHAPTER HOUR
NO
TOPICS TO BE COVERED
1
UNIT - 1
Basic Structure of
Computers
1 Computer Types, Functional Units,
2 Basic Operational Concepts,
3 Bus Structures, Performance – Processor Clock,
4 Basic Performance Equation, Clock Rate,
5 Performance Measurement, Historical
Perspective
6 Numbers, Arithmetic Operations and
Characters, Memory Location and Addresses,
7 Memory Operations,
Instructions and Instruction Sequencing,
2
UNIT - 2 : Machine
Instructions and Programs
contd.:
8 Addressing Modes,
9 Assembly Language,
10 Basic Input and Output Operations,
11 Stacks and Queues
12 Subroutines,
13 Additional Instructions
14 Encoding of Machine Instructions
3
UNIT - 3 :
Input/Output
Organization:
15 Accessing I/O Devices,
16 Interrupts – Interrupt
Hardware, Enabling and Disabling Interrupts,
17 Handling Multiple Devices,
18 Controlling Device Requests, Exceptions,
19 Direct Memory Access,
20 Buses
4
UNIT - 4 :
Input/Output
Organization contd.:
21 Interface Circuits,
22 Standard I/O
23 Interfaces – PCI Bus,
24 SCSI Bus,
25 USB
5
UNIT - 5 : Memory
System:
26 Basic Concepts
27 Semiconductor RAM Memories,
28 Read Only Memories, Speed, Size, and Cost,
Cache Memories
29 Mapping Functions,
30 Replacement Algorithms,
31 Performance Considerations,
32 Virtual Memories,
33 Secondary Storage
6 UNIT - 6 : Arithmetic:
34 Addition and Subtraction of Signed Numbers,
35 Design of Fast Adders,
36 Multiplication of Positive Numbers, Signed
Operand Multiplication,
37 Fast Multiplication,
38 Integer Division,
39 Floating-point Numbers and Operations
7 UNIT - 7 : Basic
Processing Unit:
40 Some Fundamental Concepts,
41 Execution of a Complete Instruction,
42 Multiple Bus Organization,
43 Hard-wired Control,
44 Microprogrammed Control
45 Microprogrammed Control
8
UNIT - 8 : Multicores,
Multiprocessors, and
Clusters:
46 Performance, The Power Wall,
47 The Switch from Uniprocessors to
Multiprocessors,
48 Amdahl’s Law
49 Shared Memory Multiprocessors,
50 Clusters and other Message
51 Passing Multiprocessors,
52 Hardware Multithreading, SISD, IMD, SIMD,
SPMD, and Vector.
QUESTION BANK – COMPUTER ORGANIZATION
1. What are the factors, which are used to judge the performance of a computer? Explain
any three of them.
2. Describe the basic functional units of a computer.
3. Explain the different addressing modes.
4. Explain the following with reference to 2’s complement arithmetic:
a) Sign Extension b) Arithmetic Overflow
5. Briefly explain the history of computer development from the First generation to Fourth
generation computers.
6. Explain stacks and queues.
7. Registers R1 and R2 of a computer contain the decimal values 1200 and 4600. What is
the effective address of the memory operand in each of the following instructions:
a) Load 20(R1),R5 b)Move #3000, R5 c)Store R5,30(R1,R2)
d)Add –(R2), R5 e)Subtract (R1)+, R5
8. Explain the concept of stacks frames when subroutines are nested.
9. Explain about Fast Adders
10. With illustrations, briefly describe the mapping functions used in cache
11. Explain how an address generated by the processor gets translated into a main memory
address.
12. Calculate the average access time experienced by a processor if cache hit rate is 0.88
miss penalty is 0.015 millisecond and cache access time is 10 microsecond.
13. What is secondary storage? Explain about magnetic hard disks.
14. A block set associative cache consists of a total of 64 blocks divided into 4 block sets.
The main memory contains 4096 blocks each consisting of 128 words.
a) How many bits are there in main memory address?
b) How many bits are there in each of the TAG, SET and WORD fields?
15. Multiply 10011 and 01001 using Booth’s algorithm
16. Explain bit pair recoding of multipliers using an example.
17. Explain the representation of Floating Point numbers using IEEE formats
18. Using a block diagram which shows the register configuration, perform sequential circuit
binary multiplication of Multiplicand=1010 and Multiplier=1101
19. Let multiplicand=110101 and multiplier=011011. Multiply the given signed 2’s
complement numbers using Booth’s algorithm. Verify the result using bit pairing of the
multiplier.
20. Perform non-restoring binary division of Dividend=1011, Divisor=0101
21. Explain the function of processor registers with a block diagram
22. Write the basic performance equation. Explain the role of each of the parameters in the
equation on the performance of the computer.
23. Show how the operation C=A + B can be implemented in a single accumulator computer
by a) Three address instruction b)Two address instruction c) One address instruction
24. What is an addressing mode? Explain register, indirect, index addressing modes with an
example for each.
25. What is subroutine linkage? Explain with an example, subroutine linkage using linkage
register.
26. Explain with a diagram, how interrupt request from several I/O devices can be
communicated to a processor through a single INTR line.
27. How can the processor obtain the starting address of different interrupt-service routines
using vectored interrupts?
28. Why is bus arbitration required? Explain with block diagram bus arbitration using Daisy
chain.
29. Explain with a block diagram a general 8-bit parallel interface.
30. With the help of data transfer signals explain how a real operation is performed using
PCI bus.
31. Explain briefly bus arbitration phase in SCSI bus.
32. Draw the organization of a 1K * 1 memory cell and explain its working.
33. Explain the working of a single-transistor dynamic memory cell.
34. Show the organization of virtual memory address translation in fixed-length pages and
explain its working.
35. How can performance and reliability be improved using RAID technology?
36. Explain the design of a 4-bit carry look- ahead adder.
37. Explain Booth’s algorithm. Multiply 01110 (+14) and 11011 (-5) using Booth’s
multiplication.
38. Write the algorithm for binary division using restoring division method.
39. List the rules for addition, subtraction, multiplication and division of floating point
numbers.
40. Write and explain the control sequences for execution of an unconditional branch
instruction.
41. Explain with block diagram the basic organization of a micro programmed control unit.
42. What are the modifications required in the basic organization of a microprogrammed
control unit to support conditional branching in the microprogram.
43. With a neat diagram explain different processor registers.
44. Explain the important technological features and devices that characterized each
generation of computers.
45. Discuss two ways in which byte addresses are assigned.
46. What is an addressing mode? Explain different generic addressing modes with an
example for each.
47. Explain shift and rotate operations with examples.
48. Explain interrupt concepts and interrupt hardware.
49. Define cycle stealing and burst mode.
50. Explain the important functions of input/ output interface.