Copyright © 2010 SpectraPlex – Presentation property of SpectraPlex, no reproduction without...

23
Copyright © 2010 SpectraPlex – Presentation property of SpectraPlex, no reproduction without permission SpectraPlex High Performance Communications Technologies SpectraPlex Flash Technology MANDAN

Transcript of Copyright © 2010 SpectraPlex – Presentation property of SpectraPlex, no reproduction without...

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SpectraPlex

High Performance Communications Technologies

SpectraPlex Flash Technology

MANDAN

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SpectraPlex Flash - Codename MANDAN

Applies multilevel flash technology to obtain error detection/correction

Simple encoding and decoding Less silicon overhead than conventional

ECC

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Benefits of the MANDAN Technology

An increase of 23% or more in gross return per wafer

Improved field reliability – better quality Simple implementation No additional silicon required

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Cost of Mandan benefits

Addition of ECC encode and decode circuitry – may only require small modifications if ECC is currently employed in chip designs

Small change in program and sense circuitry

New chip layout

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Block OverviewInput Data

Encode to multilevel form Store in

flash cells

Read multilevel data Decode from

multilevel form and apply error detection/correction Output

Data

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ESC Design Changes

Peripheral interface circuitry requires

limited modification

Memory array remains unchanged

or may be reduced in size

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Mandan Outline

Proprietary new technology

Implemented with current technologies

Cell arrays in current designs can often be used

without modification

Provides Error Correction Coding (ECC) uniquely

suited to flash memory systems

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Larger memories need lower error rates

Error Expectation vs Size

0.001

0.01

0.1

1

10

100

1000

10000

1.E+06 1.E+07 1.E+08 1.E+09 1.E+10

Size in bits

Err

ors

Exp

ecte

d

1e-6

1e-8

1e-10

1e-12

Error Rate

1 Mb memory 1 Gb memory

Constant number of errors per die

Error rate improvement required

An error rate of 1e-11 is needed with the larger chip to give the same total number of errors per die

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Implications

Error performance sufficient for today’s memories will be inadequate for tomorrow’s

Error mechanisms must be understood and treated

Error detection and correction is essential for next generation and beyond products

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Flash Error Mechanisms

Hard Failures– Stuck bit lines– Driver/sense amp failures– Other hard errors

Statistical errors Soft Failures

– Cosmic rays– Transients– Other soft failures

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Hard Failure Remedies

Add redundant rows and columns– Adds significant array area– Requires test and fix at production time

Add redundancy and ECC circuitry– Adds some to array area– Adds encode and decode complexity

Use SpectraPlex Mandan ECC– Adds encode and decode complexity– No additional array area needed

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Statistical Errors

Result from large distribution around programmed state value

Controlled by programming algorithm State width roughly inversely proportional

to number of states Trade off time and programming algorithm

complexity for state width and better error performance

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Soft Failures

Result from usually unpredictable events in normal operation– Cosmic rays and other radiations change cell state– Noise and transients interfere with storage and

readback processes Must be fixed by error correction methods

– Conventional ECC requires 8 – 20% more cells and circuit complexity

– SpectraPlex ESC only adds to circuit complexity

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Optimization

Memory must be optimized for type of errors expected

Hard and soft errors can be handled by similar mechanisms

Statistical errors generally best dealt with through optimization of programming process and ECC

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Definition of Terms

Min Threshold Voltage Level Max

Dis

trib

utio

n of

cel

ls a

roun

d no

min

al le

vel f

or th

e pa

rtic

ular

pr

ogra

mm

ed v

alue

2*Delta

Sigma

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Relationship between number of states and statistical error rate

Increased number of states reduces distance between states (delta)

Tighter programming required by increase in number of states also reduces width of distribution (sigma)

Result is that ratio of delta/sigma is nearly constant over wide range of number of states

Delta/sigma ratio is most important factor in statistical error rate basic statistical error rate will be roughly constant **IF** sigma can be reduced proportional to delta

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2 3 4 5 6 7 8 9 101 10

15

1 1014

1 1013

1 1012

1 1011

1 1010

1 109

1 108

1 107

1 106

1 105

1 104

1 103

0.01

0.1

11

1015

p0 i

ri

102 dsi

SpectraPlex MANDAN and Conventional Performance Compared

Conventional is two bits per cell without error correction

Mandan has better error rate at same delta/sigma ratio and bit density as practical conventional designs

Only one design example shown – actual performance depends on particular design requirements of a specific product

SpectraPlexMANDANperformance

Conventional 2 bit per cellperformance

Error Rate

delta / sigma ratioTypical range

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What do the curves mean?

For the same delta/sigma ratio, Mandan processing can add significant improvement in error rate

For the same error rate, Mandan can reduce requirements on delta/sigma ratio

Designers have more options available to achieve design objectives

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Mandan tradeoffs

Mandan can be used to improve basic statistical error rate

Mandan can be used to ease programming requirements = faster programming/write time

Mandan can be used to offset effects of other desirable objectives such as reduced voltage operation

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Potential costs of conventional ECC

Increase in number of cells to hold parity check bits– Typically in the range of 8-20% more cells– Depends on block size

Must add encode and decode circuitry– Encode has modest cost– Decode affects access time for reading

Significant intellectual property barriers

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Mandan Advantages

Does not require additional cells Provides error detection/correction Novel technology – patent pending Useful across a broad range of densities

and operating conditions Access overhead comparable to

conventional ECC

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Production Benefits Comparison

Example Comparison Conventional MANDAN

wafer size 300mm 300mm

technology 92nm 92nm

capacity 4Gb 4Gb

die fraction for error encode/decode 3% 3%

die fraction for parity check (ECC) 10% 0%

Total die fraction for ECC 13% 3%

Error rate 10^-10 < 10 ^ -20

good die per wafer 1719 1910

cost of processed wafer $800 $800

cost per die $0.465 $0.419

savings per die   $0.047

value of die at asp of $5.00 $8,594 $9,550

net per wafer $7,794 $8,750

net per 100K wafers $779,375,000 $875,000,000

Benefit from SpectraPlex MANDAN   $95,625,000

percent benefit   12.3%

cost of license (5% of asp)   $47,750,000

net benefit after license   $47,875,000

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For more informations e-mail [email protected]