Conversion

Discussion #25 – ADCECEN 301 1

ConversionMosiah 5:2 2 And they all cried with one voice, saying: Yea, we

believe all the words which though has spoken unto us; and also, we know of their surety and truth, because of the Spirit of the Lord Omnipotent, which as wrought a mighty change in us, or in our hearts, that we have more disposition to do evil, but to do good continually.


Lecture 25 –Analog to Digital Convertion (ADCs)


ADC/DAC• Sensors are generally analog, but most signal processing devices

(appliances, computers, etc.) are digital thus there must be a conversion• Analog to digital (ADC) – coming into a device• Digital to analog (DAC) – going out of a device

DeviceADC DAC

DigitalAnalog Analog

ActuatorSensor

Discussion #25 – ADCECEN 301 Discussion #24 – DAC 4

ADC/DAC

ADC DAC

DigitalAnalog Analog

001110011…2.23094… 2.23094…

• Sensors are generally analog, but most signal processing devices (appliances, computers, etc.) are digital thus there must be a conversion• Analog to digital (ADC) – coming into a device• Digital to analog (DAC) – going out of a device


Analog to Digital Converter (ADC)ADC: converts an analog voltage or current into

a binary word

Word length (n): the number of bits in the sequence of 1s and 0s representing an output

• EX: 0110 – 4-bit word length100101 – 6-bit word length

Binary word (B): a sequence of n 1s and 0s B = bn-1bn-2…b2b1b0

• EX: B = 10100101 (n = 8)

Note: many ADCs can only convert positive or negative values


Analog to Digital Converter (ADC)ADC: converts an analog voltage or current into

a binary word

Resolution δv: minimum step size by which the output voltage (or current) can increment

Input voltage va: the analog value represented by the binary word B

• EX: let n=4 (number of bits)va = (23·b3 + 22·b2 + 21·b1 + 20·b0)δv

Max input voltage vaMax: the maximum analog value

• EX: let n=4 (number of bits)vaMax = (23 + 22 + 21 + 20)δv

= (2n – 1) δv

Example: δv = 1V, B = 10110 (n = 5)Find vaMax and va

vaMax = (2n – 1) δv = (25 – 1) ∙ 1

= 31va = (24·b4 + 23·b3 + 22·b2 + 21·b1 + 20·b0)δv = (16·1 + 8·0 + 4·1 + 2·1 + 1·0) · 1 = (16 + 4 + 2) = 22

Discussion #25 – ADC

Op Amp Comparator• An op amp without feedback is a binary comparator

• Rail-to-rail output swing• Simple one-bit analog to digital converter

vvvv

vvAv OLo

55

)(

:Model Loop-Open From

–

+ vo

v+

v–

vref+–

vinput

Positive power supply (+5V)

Negative power supply (–5V)

VS+

VS–


Quantization• Analog representation by a binary value results in

quantization of the value

vd b3 b2

b1 b0

0 0 000

1 0 0 0 1

2 0 0 1 0

3 0 0 1 1

……

14 1 1 1 0

15 1 1 1 1

Binaryrepresentation

Quantized voltage

0 2 4 6 8 10 …0

2468

10

…

vin (volts)

v out (

volts

)

vvv in

out

Quantization error (vout-vin) always non-positive for this case

1v


Quantization (ADC/DAC)Quantization:

• The analog output (va) has a step-like appearance because of the discrete nature of a binary signal

• The resolution (coarseness of the “staircase”) can be adjusted by changing the word length (the number of bits)

Approximated using 2-bits

Approximated using 3-bits

δv

δv


Digital to Analog Converter (DAC)Comparison of an ADC and DAC

–

+ +va

–R1

Rn-2

Rn-1RF

R0

vin

bn-1

bn-2

b1

b0

DAC ADC

Digital output

–

+

vin

–

+

–

+

–

+

–

+

–

+

Dig

ital l

ogic

enc

oder

+V

R

R

R

R

R

R

R


Types of ADCs• Successive approximation

• Takes time, input must remain steady during conversion

–

+vin

vref DAC

Register & Control

Logic Clock

Digital valueoutput

Conversioncomplete

Startconversion

comparator


Types of ADCs• Tracking ADC

• Input must remain steady during conversion

• Quicker than successive approximation type

+

–vin

vref DAC

Clock

Digital valueoutput

Up-downcounter

up

down

comparator


Types of ADCs• Flash ADC

• Fast (no sample-and-hold required)

• Complex• 2N comparators required

• Number of bits limited

–

+

vin

–

+

–

+

–

+

–

+

–

+

Dig

ital l

ogic

enc

oder

+V

R

R

R

R

R

R

R


Sample-and-hold• ADC required constant input voltage during conversion. How

do we guarantee this?• Use sample-and-hold circuit• Basic idea: store voltage on a capacitor, then hold during conversion

• Design caution: capacitor voltage can “droop” during hold

–

+vin

–

+vout

Sample/hold

voltage follower(buffer)

voltage follower(buffer)

Storagecapacitor


Analog to Digital Converter (ADC)Example 1: vin = 4.1V, Vref=5 V, N=4 bitsFind Dout and the quantization error

V

Vv N

ref

333.0)12(

5)12(

4

110012

3.12333.0

1.4

vVinDout

V

vDoutVinQerr

1.012333.01.4


Multiplexing• Time share expensive ADC between channels

• ADC has to run at higher rate

Analogmultiplexer

Sampleandhold

Control logic

ADC

Clock

Digitalouttrigger

amplifier

Analogin


Time sampling• ADC samples input voltage (generally) at regular

intervals • Time and voltage quantization

vvv in

out

0 2 4 6 8 10 …0

2468

10

…

vin (volts)

v out (

volts

)

1v

0t

V(t)


ADC time sampling• Ideally, ADC should take signal samples at evenly

spaced intervals• Can then use discrete Fourier transform (DFT) analysis• Sample frequency = 1 / Sample interval

• Many inexpensive systems use variable spacing• This can cause artifacts in measured signals, resulting in

reduced accuracy• May be OK for signals that change slowly with respect to

the sample spacing


Nyquist sampling• When measuring a waveform that changes with

time, it must be sampled at twice the highest frequency present to avoid aliasing• ADC sampling interval = Ts

• ADC sampling frequency = fs = 1/Ts

• An analog low pass filter is generally included before the ADC to insure that no signal frequencies are higher than twice the sample rate

max

max

21

2

fT

ff

s

s

The Nyquist sampling requirement means that the highest frequency sine wave in the signal has at least two samples per cycle of the sine wave or undesireable aliasing will result.


Aliasing• Aliasing occurs when the waveform is undersampled (sampled

at too low a frequency). It makes a high frequency signal look like it is a low frequency waveform.• Aliasing should always be avoided.

The red waveform is undersampled at 1 Hz. The processor will think the samples (black dots) are from the blue waveform. The red signal is aliased into the blue signal.


Sample FrequencyExample 1: Ts = 0.001 sWhat is the highest frequency that can be sampled without

aliasing? What is the frequency of the low pass filter that should be included before the ADC?

Hz

Tf

s

ss

500001.02

121

max

max

21

2

fT

ff

s

s

The lowpass filter cutoff frequency should be less than 500 Hz (usually by at least 10%)


Schmitt Trigger• Schmitt trigger circuit uses hysteresis to

improve noise tolerance

Sout V

RRRv

RRRv

32

2

21

2

vvVvvV

vS

Suto

SV

RRRV

21

22

Sref V

RRRV

32

2

vout

R1

vin

R2

R3

v+

v– VS+

VS–

VS+

–

+

vout

vin

VS–

VS+

Vref

ΔV

0 t

vout

t

vout

t

vout

0

0

0

ΔVVref

Schmitt trigger

Conventional comparator

Noisy signal

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