Combinational Digital Design Laboratory Manual Experiment...
Transcript of Combinational Digital Design Laboratory Manual Experiment...
The Islamic University of Gaza
Engineering Faculty
Department of Computer Engineering
Fall 2017
ECOM 2013
Khaleel I. Shaheen
Combinational Digital Design
Laboratory Manual
Experiment #4
Binary Addition & Subtraction
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Objectives
• To study adder and subtractor circuits using logic gates.
• To construct and test various adders and subtractor circuits.
Theoretical Background
Adders
Digital computers perform a variety of information-processing tasks. Among the functions
encountered are the various arithmetic operations. The most basic arithmetic operation is the
addition of two binary digits. Adder circuit is a combinational digital circuit that is used for
adding two numbers. A typical adder circuit produces a sum bit (denoted by S) and a carry
bit (denoted by C) as the output. Typically, adders are realized for adding binary numbers but
they can be also realized for adding other formats like BCD (binary coded decimal), XS-3 etc.
Besides addition, adder circuits can be used for a lot of other applications in digital
electronics like address decoding, table index calculation etc. Adder circuits are of two types:
Half adder and Full adder.
Half Adder
Half adder is a combinational arithmetic circuit that adds two numbers and produces a sum
bit (S) and carry bit (C) as the output. If A and B are the input bits, then sum bit (S) is the
XOR of A and B and the carry bit (C) will be the AND of A and B.
From this it is clear that a half adder circuit can be easily constructed using one XOR gate and
one AND gate. Half adder is the simplest of all adder circuits, but it has a major disadvantage,
the half adder can add only two input bits (A and B) and has nothing to do with the carry if
there is any in the input, so if the input to a half adder have a carry, then it will be neglected
and adds only the A and B bits. That means the binary addition process is not complete and
that’s why it is called a half adder. The truth table, schematic representation and XOR//AND
realization of a half adder are shown in the figure below.
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Inputs Outputs
A B S C
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
The C output is 1 only when both inputs are 1. The S output represents the least significant bit
of the sum. The simplified Boolean functions for the two outputs can be obtained directly from
the truth table. The simplified sum-of-products expressions are
S = A ⊕ B
C = AB
Full Adder
Full adder is a logic circuit that adds two input operand bits plus a Carry in bit and outputs a
Carry out bit and a sum bit. The Sum out (Sout) of a full adder is the XOR of input operand bits
A, B and the Carry in (Cin) bit. Truth table and logic diagram of a 1-bit Full adder is shown below.
Inputs Outputs
A B Cin S Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
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S = A'B'Cin + A'BCin' + AB'Cin' + ABCin = A ⊕ B ⊕ Cin
Cout = ABCin' + AB'Cin+ A'BCin+ ABCin = (A ⊕ B)Cin + AB
A Full adder can be made by combining two half adder circuits together (a half adder is a
circuit that adds two input bits and outputs a sum bit and a carry bit).
Subtractors
The subtraction of two binary numbers may be accomplished by taking the complement of the
subtrahend and adding it to the minuend. By this method, the subtraction operation becomes
an addition operation requiring full adders for its machine implementation. It is possible to
implement subtraction with logic circuits in a direct manner. By this method, each subtrahend
bit of the number is subtracted from its corresponding significant minuend bit to form a
different bit. If the minuend bit is smaller than the subtrahend bit, a 1 is borrowed from the next
significant position. The fact that a 1 has been borrowed must be conveyed to the next higher
pair of bits by means of a binary signal coming out (output) of a given stage and going into
(input) the next higher stage.
Half Subtractor
The half-subtractor is a combinational circuit which is used to perform subtraction of two bits.
It has two inputs, X (minuend) and Y (subtrahend) and two outputs D (difference) and B
(borrow).
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Suppose the minuend bit is x and the subtrahend bit is y. If we want to perform x-y, we have
to check the relative magnitude between x and y. If x>=y, we have three possibilities: 0-0=0,
1-0=1 and 1-1=0. The result is known as difference bit. If x<y we have 0-1, and it's necessary to
borrow 1 from the next higher stage. The borrowed 1 adds 2 to the minuend bit. With the
minuend equal to 2, the difference becomes 2-1=1. The half-subtractor needs two outputs. One
is needed to generate the difference and is denoted by the symbol D and the other is needed
to show the borrowed bit and is denoted by the symbol B.
Inputs Outputs
A B D B
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
D = A'B + AB' = A ⊕ B
B = A'B
Full Subtractor
The full-subtractor is a combinational circuit which is used to perform subtraction of three
bits. It has three inputs, X (minuend) and Y (subtrahend) and Z (subtrahend) and two outputs
D (difference) and B (borrow).
Inputs utputs
A B C D B
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1
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D = A ⊕ B ⊕ C
B = (A ⊕ B)' C + A'B
Parallel Addition
Multiple full adder circuits can be cascaded in parallel to add an N-bit number. For an N- bit
parallel adder, there must be N numbers of full adder circuits. A ripple carry adder is a logic
circuit in which the carry-out of each full adder is the carry in of the succeeding next most
significant full adder. It is called a ripple carry adder because each carry bit gets rippled into
the next stage. In a ripple carry adder the sum and carry out bits of any half adder stage is
not valid until the carry in of that stage occurs.
Note that the first (and only the first) full adder may be replaced by a half adder.
Adder-Subtractor
In digital circuits, an adder–subtractor is a circuit that is capable of adding or subtracting
numbers (in particular, binary). Below is a circuit that does adding or subtracting depending on
a control signal. It is also possible to construct a circuit that performs both addition and
subtraction at the same time.
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M: controller, adding when M = 0 and Subtracting when M = 1. Adding: A+B. Sub: A-B.
V: overflow flag, denote that an overflow happened when V=1.
Lab Work
Equipment’s required:
• KL-31001 trainer kit.
• IC's 74LS04 (Hexa NOT), 74LS08 (Quad 2 input AND), 74LS32 (Quad 2 input OR),
74LS86 (Quad 2 input X-OR)
• Connecting wires and Breadboard.
• The Datasheets of the IC’s.
Implementation
Construct the circuit of HA, FA, HS, FS.
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Exercises
1. To Be Added Later
Good Luck
😊