Co question 2008

GANDHI INSTITUTE FOR EDUCATION & TECHNOLOGY FIFT SEMESTER EXAMINATION-2008

COMPUTER ARCHITECTURE & ORGANIZATION FULL MARK: 70 TIME: - 3HOURS

Prepared by Asst.Prof S.K.Rath (CSE DEPARTMENT)

Answer Question No.1 which is compulsory and any five from the rest.

The figure in the right hand margin indicates marks.

1. Answer the following question: 2*10=20

(a) Write basic difference between computer architecture and computer organization.

Ans: Computer architecture means behavior and structure of system while "computer

organization" deals with how the various hardware components interact with each

other to perform various functionalities (micro instructions) and are usually

transparent to the user.

Architecture is like a blue print, it will have all the components mentioned and also

how they are connected, whereas organization is an implementation of that blue print,

each vendor will have their own version of the organization, their own way of

implementing the blue print.

Computer organization is how operational attributes are linked together and

contribute to realize the architectural specifications. Computer architecture is the

architectural attributes like physical address memory, CPU and how they should be

made and made to coordinate with each other keeping the future demands and goals

in mind. Computer architecture comes before computer organization .It’s like building

the design and architecture of house takes maximum time and then organization is

building house by bricks or by latest technology keeping the basic layout and

architecture of house in mind.

(b) What do you mean by instruction format?

Ans: an instruction format provides four information to the CPU.

1) Operation to be performed by CPU.

2) Operand on which operation has to be performed.

3) Address of the operand.

4) Address of next instruction fetched.

(c) Define Bus? Explain I/O bus of computer?

Ans: Bus is a transmission medium which is used to transfer the data or information from one device to other device. There are three types of bus. There are three types of bus: i) Address Bus ii) Data Bus iii) Control Bus. I/O bus is used to transmit data between the peripheral device and I/O controller.

Each line of a bus can transmit one bit of data.




(d) Increasing the number of addressing mode improve the flexibility in writing

assembly language program, but reduce the performance?

Ans:

- it reduce the instruction length by having short field address.

- It provides powerful aid to the programmer for complex data handling.

- But it reduces the performance since to fetch an operand from memory may

require more than one memory cycle.

(e) What program features justify the use of cache memory in a hierarchical memory

system?

Ans: the program property locality of reference justifies the use of cache memory in a hierarchical memory system. (f) What are the advantage and disadvantage of of using micro program and hardwired control unit? Ans: A hardwired control unit has a processor that generates signals or instructions to

be implemented in correct sequence. This was the older method of control that works

through the use of distinct components, drums, a sequential circuit design, or flip

chips. It is implemented using logic gates & flip flops. It is faster, less flexible & limited

incomplexity

A micro programmed control unit on the other hand makes use of a micro sequencer

from which instruction bits are decoded to be implemented. It acts as the device

supervisor that controls the rest of the subsystems including arithmetic and logic

units, registers, instruction registers, off-chip input/output, and buses.

It is slower, more flexible & greater complexity

(g) Which register CPU is responsible for sequencing the control of execution? Write

its role when a branch instruction is encounter during the execution.

Ans: The program counter (PC) is responsible for sequencing the control of execution. When a branch instruction is encounter the content of PC is loaded into the processor stack and PC is loaded with the branch target. (h)Write the step to retrieve the word from a memory location by CPU.

Ans: Step1: The address of word are loaded into the memory address register (MAR).

Step2: The processor sends a read control signal to the memory.




Step 3: on receivable of read signal , the memory searches the address word and load

the content of the word onto the memory data register.(MDR) .

(i) Difference between page fault and cache miss.

Ans: page fault is said to occur if the page requested by the processor is not in the

main memory. The requested page must bought from the disk into the main memory

before the access can proceed.

Cache miss is said to be occurred if the block requested by the processor is not in the

cache memory.

(j) How ISR different from subroutine.

Ans: Subroutine is a portion of code within a larger program, which performs a

specific task and is relatively independent of the remaining code.

Interrupt Service Routines (ISRs) are to handle hardware interrupts. These routines

are not independent threads, but more like signals. ISR is called if any thread is

suspended by an interrupt

2) A) what do you mean by Von Neumann Architecture?

Ans: According to Von Neumann architecture it is based on stored program concept.

In which all the instruction and data are stored in memory.

The architecture mainly consists of basic function al unit.

1) Input unit

2) CPU

3) Memory unit

4) Output unit




The Von Neumann architecture is a design model for a stored-program digital computer. Its main characteristic is a single separate storage structure (the memory) that holds both program and data. Some important features of the Von Neumann architecture are:

both instructions (code) and data (variables and input/output) are stored in memory;

memory is an collection of binary digits (bits) that have been organized into bytes, words, and regions with addresses;

the code instructions and all data have memory addresses;

to execute each instruction, it has to be moved to registers;

only the registers have the “smarts” to do anything with the instructions; memory locations have no “smarts”;

to save a result computed in the registers, it has to be moved back to memory;

the granularity of instructions at the machine or assembler level is much smaller than the granularity at the MATLAB programming language level; that is, each MATLAB instruction corresponds to many machine instructions;

operating systems and compilers keep the instructions and data in memory organized so it doesn't get mixed up together;

if a program execution goes past its legal last instruction (for example) it can overwrite other instructions/data in memory and cause strange things to happen;

one of the advantages of modern operating systems and compilers is the concept of relocatable code — that is, code that can be loaded and run from any location in memory.

B) Give the advantages and disadvantages of single-bus and multi-bus.

Ans: in single bus organization, the entire functional units are connected to the single

bus structure. The ALU and all the register are interconnected via a single common

bus. The resulting control sequence is very long because only one data item can be

transfer over the bus in clock cycle.

- In a multi bus, the ALU and all the register are interconnected through multiple

path.. It reduce the number of steps to perform an operation , some buses are used to

transfer the source operand to the i/p of the ALU, and the result is transferred to the

destination over another bus.




3) A) Explain the different memory device characteristics?

Ans: Memory Device Characteristics

There are various type of memory systems which are used for storing data in computer

All these devices have advantages and some disadvantages over the other. In selecting

any type of memory it is necessary to consider the following characteristics.

1. Access Time.2. Access Rate. 3. Access Mode. 4. Alter ability.5. Permanence of

Storage.6. Cycle Time.

1. Access Time:

The duration of time between the initiation of a read instruction signal and the

availability of the required word in the memory buffer register is called access time of

the memory. Similarly the duration between the write signal and storing of the

information or word in the specified location is called write time. The access time and

write time depends on the physical characteristics of the storage medium and the type

of access mechanism. A basic measure of the operating speed of memory is its access

time. It is measured from the application of a new address to the memories address

terminal to the appearance of all bits of the addressed word on the output terminals of

the memory.

2. Access Rate:

The number of characters or words that can be accessed with in specified time interval

is known as access rate. It is reciprocal of the access time. It is measured in

words/sec. Low cost and high access rates are desirable memory characteristics.

3. Access Mode:

It is defined as the order or sequence in which information can be accessed. Memories

depending upon their accessing modes are classified into two (i) Sequential access

memories (ii) Random access memories. Sequential access memories are those where

memory locations can be accessed only in certain predetermined sequence. This

memory is also known as serial access memory. In Random access memories the

memory locations may be accessed in any order and access time is independent of the

location being accessed. Examples for random access memories are semiconductor

memories, where as serial access memories are magnetic-tape, optical memories.

http://www.adiwebs.com/memory-device-characteristics/








4. Alterability:

The method used to write information into a memory may be irreversible. Once

information has been written it cannot be altered while the memory is in use. This is

known as on line. These memories are known as read only memories. ROMs whose

contents can be changed are called programmable read only memories (PROM).

Memories in which reading or writing can be done are called as read write

5. Permanence of Storage:

In some type of memories the stored information may be lost over a period of time

unless appropriate action is taken. There are three memory characteristics that can

destroy information.

6. Cycle Time: In DRO and dynamic memories memory access process cannot be continued one after the other unless the restore or refresh operation has been carried out i.e., the minimum time that must elapse between the two different accesses by the memory can be greater than access time. This time is called the cycle time of the memory.

B) Explain the following term:

i) Locality of reference

ii) Thrashing

iii) Address mapping.

Ans: Locality of reference: Locality of reference is when specific locations of storage

are accessed on a regular basis. There are a number of different forms of locality of

reference including:

1. Temporal locality: Temporal locality is when the cache memory is referenced

once, and then again shortly afterwards. The data accessed is stored in

memory, and when it is accessed again it can be done so much quicker, as a

reference point is created.

2. Spatial Locality: Spatial locality is when a specific location of memory is

accessed. The knock-on effect of this is that nearby points of memory will most

likely be accessed in the near future and the size of the memory needed is

predicted and this allows for faster access, in the short term, and over a longer

period of time.




Thrashing: Thrashing is computer activity that makes little or no progress, usually

because memory or other resources have become exhausted or too limited to perform

needed operations. When this happens, a pattern typically develops in which a request

is made of the operating system by a process or program, the operating system tries to

find resources by taking them from some other process, which in turn makes new

requests that can't be satisfied. In a virtual storage system (an operating system that

manages its logical storage or memory in units called pages), thrashing is a condition

in which excessive paging operations are taking place.

Address Mapping: address mapping use of one of the addressing schemes to convert

an address that is specified in an instruction into an absolute address. Virtual

memory and cache memory use forms of address mapping for additional memory-

management functions.

4) A) What do you mean by a cache hit, cache hit time and cache miss time? List and

briefly explain the techniques used to improve each of this.

Ans: when CPU access a word from main memory the check controller cache the cache

memory to see whether the requested word is mapped on to the check. If the word is

available in cache memory this situation is called cache hit.

If the requested word is available in cache memory then the word is read from the

cache memory, the time required to access a word from cache memory is called cache

hit time.

The time required to fetch a required word from the main memory and make it

available to the processor in cache a cache miss occurs, is called miss penalty. The

cache hit rate can be improved through: Split Cache and Memory Interleaving.

http://www.encyclopedia.com/doc/1O11-addressingschemes.html

http://www.encyclopedia.com/doc/1O11-absoluteaddress.html

http://www.encyclopedia.com/doc/1O11-virtualmemory.html

http://www.encyclopedia.com/doc/1O11-virtualmemory.html

http://www.encyclopedia.com/doc/1O11-cache.html




5) A) Justify the use of a hierarchical memory system?

Ans:

In a computer memory is used for storing programs and data that are required to perform a

specific task. For CPU to operate at its maximum speed, it required an uninterrupted and high

speed access to these memories that contain programs and data. Some of the criteria need to be

taken into consideration while deciding which memory is to be used: i) Cost ii) Speed

iii) Memory access time iv) Data transfer rate v) Reliability vi) Memory cycle time

A computer system contains various types of memory like auxiliary memory, cache memory,

and main memory. All this different types of memories can be visualized in a hierarchy system.

The following figure depicts the hierarchy system of these memories in three levels.

Auxiliary Memory: The auxiliary memory is at the bottom and is not connected with the CPU

directly. However, being slow, it is present in large volume in the system due to its low pricing.

This memory is basically used for storing the programs that are not needed in the main memory.

This helps in freeing the main memory which can be utilized by other programs that needs main

memory. The main function of this memory is to provide parallel searching that can be used for

performing a search on an entire word.

Main Memory: The main memory is at the second level of the hierarchy. Due to its direct

connection with the CPU, it is also known as central memory. The main memory holds the data

and the programs that are needed by the CPU. The main memory mainly consists of RAM,

which is available in static and dynamic mode.




Cache Memory: Cache memory is at the top level of the memory hierarchy. This is a high

speed memory that provides speed comparable to the speed of the CPU. Cache memory is

usually placed between the CPU and the main memory. Due to its high speed of providing the

data and program to the CPU, it increases the entire speed of processing.

B) What do you mean by virtual memory? Distinguished between paging and

segmentation?

Virtual Memory: The memory management scheme is necessary because of one basic

requirement i.e the instruction being executed by the processor must be in physical

memory of the machine.

Virtual memory techniques which give an application program the impression that it

has contagious working memory while in fact it may be physically fragmented and

may even overflow on to disk storage.

Advantages: a) Programmer could write program for a very large virtual address.

b) The degree of multiprogramming can increase since each user program could take

less physical memory.

c) Less I/O is required to load or swap each user program into memory so program will

execute faster.

Paging – Computer memory is divided into small partitions that are all the same size

and referred to as, page frames. Then when a process is loaded it gets divided into

pages which are the same size as those previous frames. The process pages are then

loaded into frames.

Segmentation – Computer memory is allocated in various sizes (segments) depending

on the need for address space by the process. These segments may be individually

protected or shared between processes. Commonly you will see what are called

“Segmentation Faults” in programs, this is because the data that’s is about to be read

or written is outside the permitted address space of that process.




7) Write down the Booth’s algorithm for multiplying two binary numbers in signed 2-s

complement representation. Give flow chart scheme.

Ans:

Register used in Booths algorithm: A->Accumulator (initially Zero)

M-> Multiplicand

Q-> Multiplier

SC -> Sequential Counter (No’s of bits present in Q Register)

This process is continuing till the sequential counter becomes Zero. The result is

stored in Register A and Q.




Example:

B) Describe the addition and subtraction process of two decimal numbers in signed –

magnitude representation .Suggest a scheme for hardware implementation.

M( mode control)

O/P Input carry

S

Load Sum

Two number X and Y are stored in register X and Y.

- Xs and Ys are two flip flop that holds the sign of X and Y.

- The Result of the operation is stored into X and Xs, thus x and Xs together form

the accumulator.

8) Write short note on any two.

A) 8-bit Microprocessor: The numbers of bits that can be processed by microprocessor or at a time constitute its word length of 8-bit. - Its instruction has the capability of processing 8-bit data. - 8085 processor is 8-bit microprocessor - The 8 data lines enable the microprocessor to manipulate 8-bit data ranging DD to FF (28 numbers) - The largest number that can be appeared on the data bus is 11111111(255) b) Types of instruction: Depending on the number of operands specified in an instruction, it can be following types.

E

Register Y

Complement or

Parallel Adder

Register X

YS

XS




a) Three address instruction: This instruction contains the memory address of 3 operand. OPCODE A, B, C Where A, B -> source operand C-> Destination operand. b) Two address Instruction: it contains memory address of 2 operand. OPCODE A, B The result is stored in the source operand, by replacing its original content. c) One address Instruction: it specifies the address of only one operand. The second

operand is implicitly an accumulator. The result is stored in the accumulator. OPCODE A Add A. d) Zero address instruction: it does not explicitly specify the address of any operand. All the source operand and destination operand defined implicitly. ADD it adds the two content of the stack and store the result all the top. c) IEEE 754’s: it is the standard format for representing floating point number in 32

bit.

It composes of 1 bit for sign of the number 8 bit for exponent of the number 23 bit for mantissa part. Since normalization is used, the most significant bit of the mantissa is always equal to 1. This bit explicitly represented.

S E M

SIGN BITS 8 –bit signed 23-bit mantissa

Co question 2008

Engineering

Transcript of Co question 2008