Cmp

Apr 7, 2023 1

CMPARCHITECTURE

CMP ARCHITECTURE K.INIYA CSE DEPT

Apr 7, 2023 CMP ARCHITECTURE K.INIYA CSE DEPT 2

DEFINITION

CPM Stands for Chip MultiProcessing.CPM or Multicore: Integrates two or more independent cores (normally a CPU) into a single package.Every functional unit of a processor is duplicated.


FUNCTION

It composed of a single integrated circuit(IC), called a Die.More dies packaged together, each executing threads independently.CPM instantiates multiple Processor “cores” on a single die.A Dual-Core Processor contains two cores and a Quad-Core Processor contains four cores.


QUAD-CORE PROCESSOR

Core 0 Core 1 Core 2 Core 3Local

MemoryLocal

MemoryLocal

MemoryLocal

Memory

Shared Memory

DiskMain

Memory


SINGLE-CORE COMPUTERS

ALU

Bus interfaceI/O

bridgeMain

Memory

Register file

USB controller

Graphics adapter

Disk Controller

Disk

System bus Memory bus

CPU chip

Expansion slots for other devices such as network adapters

Mouse Keyboard Monitor

I/O Bus


SINGLE-CORE CPU CHIP

ALU

Bus interface

Register file

System bus

CPU chipThe Single Core


MULTI-CORE CPU CHIP

Bus interface

ALU

Register file

ALU

Register file

ALU

Register file

ALU

Register file

Core 1 Core 2 Core 3 Core 4


Two general types of Multi-core (CMP) Architectures

HOMOGENEOUS CMPs - All processing elements are the same.HETEROGENEOUS CMPs – Comprised of different processing elements.

TYPES


CONTD.,

Homogenous dual-core processors for PCs are now available from all major manufactures.

Heterogeneous CMPs are available in the form of multiprocessor systems-on-chips.


CMP ADVANTAGES

CMPs have several advantages over single processor solutions

(i) Energy and silicon area efficiency. (a) By Incorporating smaller less complex

cores onto a single chip. (b) Dynamically switching between cores and

powering down unused cores.


CONTD.,

(ii) Increased throughput performance by exploiting parallelism.

(a) Multiple computing resources can take better advantage of instruction, thread, and process level parallelism.


CHIP MULTITHREADING

Chip Multiprocessing Chip Multithreading = + Hardware Multithreading

Chip Multithreading is the capability of a processor to process multiple software threads and supports simultaneous Hardware threads of execution.


CONTD.,

CMT is achieved by having multiple cores on a single chip (to share chip resources such as the memory controller and the 1.2 cache) or multiple threads on a single core.CMT Processors are especially suited to server workloads, which generally have high levels of Thread-Level Parallelism(TLP).


HIGH-PERFORMANCE

CMPs are now the only way to build High-Performance microprocessors, for a variety of reasons:

(i) Large uniprocessors are no longer scaling in performance, because it is only possible to extract a limited amount of parallelism from a typical instruction stream using conventional superscalar instruction issue techniques.


CONTD.,(ii) Cannot simply ratchet up the clock speed on

today’s processors, or the power dissipation will become prohibitive.

(iii) CMT processors support many hardware stands through efficient sharing of on-chip resources such as pipelines, caches and predictors.

(iv) CMT Processors are a good match for server workloads, which have high levels of TLP and relatively low levels of ILP.


SMT vs CMP

CMP is easier to implement, but only SMT has the ability to hide latencies.The Performance race between SMT and CMP is not yet decided.A Functional Partitioning is not easily reached within a SMT processor due to the centralized instruction issue.


SMT vs CMP

A Functional Partitioning is not easily reached within a SMT processor due to the centralized instruction issue.

(i) A separation of the thread queues is a possible solution, although it does not remove the central instruction issue.

(ii)A Combination of simultaneous multithreading with the CMP may be superior.


SMT vs CMP

Both are the traditional model of running SPEC benchmarks.Research: combine SMT or CMP organization with the ability to create threads with compiler support or fully dynamically out of a single thread.

(i) thread-level speculation. (ii) close to multiscalar.


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Cmp

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