Chapter 2 Basic MOS Device Physics · Topics 1. Study with the structure of MOS transistors 2....
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Chapter 2 Basic MOS Device Physics ]tx ]ÉÉÇ ^|Å
Transcript of Chapter 2 Basic MOS Device Physics · Topics 1. Study with the structure of MOS transistors 2....
Chapter 2
Basic MOS Device Physics
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Topics
1. Study with the structure of MOS transistors
2. Derive their I/V characteristics
3. Describe second-order effects
- body effect, channel-length modulation, sub-threshold
4. Identify the parasitic capacitances of MOSFETs
and then derive a small-signal model
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MOS(n-type) Device Structure
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W
“side diffusion”
Q) Substrate & Nwell are
usually connected to ?
1. the most positive voltage
2. the most negative voltage
Q) Why?
MOS I/V Characteristic
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Cap. Operation � “depletion”(minus ions)
Q) If VG < 0?
� plus ions, accumulation mode
Two capacitors in seriesIf VG > VTH, electrons are attracted.
Inversion layer = channel is formulated.
I/V Characteristics
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I = Qd⋅v[c/m][m/s]=[c/s]=[A]
I/V Characteristics
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[ ][ ]
( )
[ ]
[ ]
( )
( ) n)(Saturatio 2
1
(Triode) 2
1
)(
/
2
max,
2
0 0
THGSoxnD
DSDSTHGSoxnD
L V
VTHGSoxnDD
THGSoxnD
nn
THGSoxD
THGSoxd
VVL
WCI
VVVVL
WCI
dVVV(x)VWCLIdxI
dx
dVVV(x)VWCI
dxdVEv
vVV(x)VWCI
VV(x)VWC(x)Q
DS
−=
−−=
−−==
−−=
−==
−−−=−−=
∫ ∫ =
µ
µ
µ
µ
µµ
Operation in Triode Region
ID = µnCoxW
L[(VGS − VTH)VDS −
1
2VDS
2]
ID = µnCoxW
L(VGS − VTH)VDS, VDS << 2(VGS − VTH)
RON =1
µnCoxW
L(VGS − VTH)
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Transconductance (gm)
SaturationGS
Dm
V
Ig
∂
∂= = µnCox
W
L(VGS − VTH) D
L
Woxn ICµ2= =
2ID
VGS − VTH
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(in triode region)
If MOS enters the triode region, gm drops. For amplification, keep the saturation region.
Body Effect
VTH = VTH0 +γ 2ΦF + VSB − 2ΦF( ) , γ =2qεsiNsub
Cox
No Body Effect With Body Effect
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Channel Length Modulation
( ))/1(
1
/1
1 '/1 LL
LLLLL ∆+≈
∆−=
1/ L' =1
L(1 + λVDS), λVDS = ∆L / L
ID =µnCox
2
W
L(VGS − VTH)
2(1 + λVDS)
L L’
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ID = µnCoxW
L[(VGS −VTH)VDS −
1
2VDS
2]
2)(2
THGSoxn
D VVL'
WCI −=
µ
∆L-LL' : =−⇒−> off"Pinch"VVV THGSDS
MOS Capacitance
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[Cutoff]
CGS=CGD=Wcov
CGB=C1|| C2
[Saturation] D : pinch-off(not much of channel near Drain)
CGS=WLCox*2/3+WCov, CGD=WCov
CGB : negligible (S-D current path � shield)
[Triode] C1 is divided equally
CGS= CGD=WLCox/2+WCov
CGB : negligible
MOS Capacitance
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[Accumulation mode]
CGS ~ WLCox = C1
[Weak Inversion]
CGB ~ C1|| C2
Q) What is the accumulation-mode varactor?
MOS Layout
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Layout for Low Capacitance
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Reduction of gate resistance by folding
Reduction of drain junction cap. by folding
MOS Small Signal Models
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or==∂
∂
α
1
I
V
DS
DS
Channel-length
modulation
DTHGS
oxnDSDD
DSo
IVV
L
WCVII
Vr
λλµ∂∂∂
∂ 1
)(2
1
/
1
2
≈
−
=== gmb = gm
γ
2 2ΦF +VSB
= ηgm
Bulk transconductance
MOS Small Signal Model with Capacitance
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MOS SPICE Models
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20
20ox
SiOfor 97.3 [F/µF/µ 18854.8
]m[F/ 15-3.906eµm 39
97.318854.8C
=−=
=−
×−==
r
ox
r
e
e
e
t
εε
µεε
( ) ( )DSTHGSox VVVL
WC λµ +−= 1
2
1I
2
D
