Ca3079

13
3 ® CA3059, CA3079 Zero-Voltage Switches for 50Hz-60Hz and 400Hz Thyristor Control Applications Description The CA3059 and CA3079 zero-voltage switches are mono- lithic silicon integrated circuits designed to control a thyristor in a variety of AC power switching applications for AC input voltages of 24V, 120V, 208/230V, and 277V at 50Hz-60Hz and 400Hz. Each of the zero-voltage switches incorporates 4 functional blocks (see the Functional Block Diagram) as follows: 1. Limiter-Power Supply - Permits operation directly from an AC line. 2. Differential On/Off Sensing Amplifier - Tests the condition of external sensors or command signals. Hysteresis or proportional-control capability may easily be implement- ed in this section. 3. Zero-Crossing Detector - Synchronizes the output pulses of the circuit at the time when the AC cycle is at zero volt- age point; thereby eliminating radio-frequency interfer- ence (RFI) when used with resistive loads. 4. Triac Gating Circuit - Provides high-current pulses to the gate of the power controlling thyristor. In addition, the CA3059 provides the following important auxiliary functions (see the Functional Block Diagram). 1. A built-in protection circuit that may be actuated to remove drive from the triac if the sensor opens or shorts. 2. Thyristor firing may be inhibited through the action of an internal diode gate connected to Terminal 1. 3. High-power dc comparator operation is provided by over- riding the action of the zero-crossing detector. This is ac- complished by connecting Terminal 12 to Terminal 7. Gate current to the thyristor is continuous when Terminal 13 is positive with respect to Terminal 9. The CA3059 and CA3079 are supplied in 14 lead dual-in- line plastic packages. Features Relay Control Valve Control Synchronous Switching of Flashing Lights On-Off Motor Switching • Differential Comparator with Self-Contained Power Supply for Industrial Applications Photosensitive Control Power One-Shot Control Heater Control Lamp Control Type Features CA3059 CA3079 24V, 120V, 208/230V, 277V at 50/60 . . . or 400Hz Operation X X Differential Input . . . . . . . . . . . . . . . . . . X X Low Balance Input Current (Max) - µA. . . 1 2 Built-In Protection Circuit for . . . . . . . . Opened or Shorted Sensor (Term 14) X X Sensor Range (Rx) - k. . . . . . . . . . . . . 2 - 100 2 - 50 DC Mode (Term 12) . . . . . . . . . . . . . . . . X External Trigger (Term 6) . . . . . . . . . . . X External Inhibit (Term 1) . . . . . . . . . . . . X DC Supply Volts (Max) . . . . . . . . . . . . . 14 10 Operating Temperature Range ( o C) . . . -55 to +125 Ordering Information PART NUMBER TEMPERATURE PACKAGE CA3059 -55 o C to +125 o C 14 Lead Plastic DIP CA3079 -55 o C to +125 o C 14 Lead Plastic DIP FN490.5 Oct 1999 Pinouts CA3059 (PDIP) TOP VIEW CA3079 (PDIP) TOP VIEW 1 2 3 4 5 6 7 14 13 12 11 10 9 8 FAIL-SAFE SENSE AMP IN ZCD OVERRIDE R DRIVER (COM) SENSE AMP REF COMMON R DRIVER V + INHIBIT DC SUPPLY TRIGGER OUT AC IN TRIGGER IN COMMON HIGH CURRENT NEG. TRIGGER 1 2 3 4 5 6 7 14 13 12 11 10 9 8 SENSE AMP IN R DRIVER (COM) SENSE AMP REF COMMON DO NOT USE DO NOT USE R DRIVER V + DC SUPPLY TRIGGER OUT AC IN COMMON HIGH CURRENT NEG. TRIGGER DO NOT USE DO NOT USE O B S OLET E PRODU CT NO RECO MMENDED REPLAC EME N T ou r Tech n ical Sup po rt Cen t er at 1- 888-INT ERSIL o r w ww .in tersil.com/tsc CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved

Transcript of Ca3079

Page 1: Ca3079

3

® CA3059, CA3079Zero-Voltage Switches for 50Hz-60Hz and

400Hz Thyristor Control Applications

Description

The CA3059 and CA3079 zero-voltage switches are mono-lithic silicon integrated circuits designed to control a thyristorin a variety of AC power switching applications for AC inputvoltages of 24V, 120V, 208/230V, and 277V at 50Hz-60Hzand 400Hz. Each of the zero-voltage switches incorporates4 functional blocks (see the Functional Block Diagram) asfollows:

1. Limiter-Power Supply - Permits operation directly from an AC line.

2. Differential On/Off Sensing Amplifier - Tests the condition of external sensors or command signals. Hysteresis orproportional-control capability may easily be implement-ed in this section.

3. Zero-Crossing Detector - Synchronizes the output pulses of the circuit at the time when the AC cycle is at zero volt-age point; thereby eliminating radio-frequency interfer-ence (RFI) when used with resistive loads.

4. Triac Gating Circuit - Provides high-current pulses to the gate of the power controlling thyristor.

In addition, the CA3059 provides the following importantauxiliary functions (see the Functional Block Diagram).

1. A built-in protection circuit that may be actuated to remove drive from the triac if the sensor opens or shorts.

2. Thyristor firing may be inhibited through the action of an internal diode gate connected to Terminal 1.

3. High-power dc comparator operation is provided by over-riding the action of the zero-crossing detector. This is ac-complished by connecting Terminal 12 to Terminal 7.Gate current to the thyristor is continuous when Terminal13 is positive with respect to Terminal 9.

The CA3059 and CA3079 are supplied in 14 lead dual-in-line plastic packages.

Features

• Relay Control

• Valve Control

• Synchronous Switching of Flashing Lights

• On-Off Motor Switching

• Differential Comparator with Self-Contained PowerSupply for Industrial Applications

• Photosensitive Control

• Power One-Shot Control

• Heater Control

• Lamp Control

Type Features CA3059 CA3079

• 24V, 120V, 208/230V, 277V at 50/60 . . .or 400Hz Operation

X X

• Differential Input . . . . . . . . . . . . . . . . . . X X

• Low Balance Input Current (Max) - µA. . . 1 2

• Built-In Protection Circuit for . . . . . . . .Opened or Shorted Sensor (Term 14)

X X

• Sensor Range (Rx) - kΩ. . . . . . . . . . . . . 2 - 100 2 - 50

• DC Mode (Term 12) . . . . . . . . . . . . . . . . X

• External Trigger (Term 6) . . . . . . . . . . . X

• External Inhibit (Term 1) . . . . . . . . . . . . X

• DC Supply Volts (Max) . . . . . . . . . . . . . 14 10

• Operating Temperature Range (oC) . . . -55 to +125

Ordering InformationPART NUMBER TEMPERATURE PACKAGE

CA3059 -55oC to +125oC 14 Lead Plastic DIP

CA3079 -55oC to +125oC 14 Lead Plastic DIP

FN490.5

Oct 1999

PinoutsCA3059 (PDIP)

TOP VIEWCA3079 (PDIP)

TOP VIEW

1

2

3

4

5

6

7

14

13

12

11

10

9

8

FAIL-SAFE

SENSE AMP IN

ZCD OVERRIDE

R DRIVER (COM)

SENSE AMP REF

COMMON

R DRIVER V+

INHIBIT

DC SUPPLY

TRIGGER OUT

AC IN

TRIGGER IN

COMMON

HIGH CURRENTNEG. TRIGGER

1

2

3

4

5

6

7

14

13

12

11

10

9

8

SENSE AMP IN

R DRIVER (COM)

SENSE AMP REF

COMMON

DO NOT USE

DO NOT USE

R DRIVER V+

DC SUPPLY

TRIGGER OUT

AC IN

COMMON

HIGH CURRENTNEG. TRIGGER

DO NOT USE

DO NOT USE

OBSOLETE PRODUCT

NO RECOMMENDED REPLACEMENT

our Technical Support Center at

1-888-INTERSIL or www.intersil.com/tsc

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.Copyright © Intersil Americas Inc. 2002. All Rights Reserved

Page 2: Ca3079

4

CA3059, CA3079

Functional Block Diagram

FIGURE 1. SCHEMATIC DIAGRAM OF CA3059 AND CA3079

AC INPUT VOLTAGE (50/60 OR 400Hz)V AC

INPUT SERIES RESISTOR (RS)kΩ

DISSIPATION RATING FOR RSW

24 2 0.5

120 10 2

208/230 20 4

277 25 5

NOTE: Circuitry within shaded areas, not included in CA3079

See chartIC = Internal connection - DO NOT USE (Terminal restriction applies only to CA3079)

EXTERNALINHIBIT

* NTC SENSOR

IC

RP

RX

RS

100µF15V

+-

9 10 11 6

RL

CURRENTBOOST

MT2

MT1

IC

IC

INHIBIT

G

* NEGATIVE TEMPERATURE COEFFICIENT

“0”CROSSINGDET.

TRIACGATINGCIRCUIT

4

3

ON/OFFSENSINGAMPL.

7

8

13

14 PROTECTIONCIRCUIT

1

2

12

LIMITER5

AC INPUTVOLTAGE

POWERSUPPLY

All resistance values are in ΩNOTE: Circuitry within shaded areas

not included in CA3079

IC = Internal connection - DO NOT USE (Terminal restriction applies only to

FAIL-SAFE INPUT

TOCOMMON

INHIBITINPUT

FOREXTERNALTRIGGER

COMMON

RSENSORRP

R410K

R312K

R710K

R227K

13

CF100µF

15VCOMMON 2

12

1714

10

9

11

8

R59.6K

Q3Q2

Q4 Q5

TOCOMMON

R615K

R925

R815

3

4

Q8

Q9

Q7

Q6

Q10

D9D8

D12

D15

D10

D11

R1040K

D7 D13

D2

D1

R15K

5RS

ACLINEINPUT

6

TOTHYRISTORGATE

FORINCREASEDGATE DRIVE

IC ICIC

IC

Q1

D3 D6

D5D4

FOR DC MODEOR 400HzOPERATION

Page 3: Ca3079

Specifications CA3059, CA3079

Absolute Maximum Ratings TA = +25oC Thermal Information

DC Supply Voltage (Between Terminals 2 & 7)CA3059. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14VCA3079. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V

DC Supply Voltage (Between Terminals 2 & 8)CA3059. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14VCA3079. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V

Peak Supply Current (Terminals 5 & 7) . . . . . . . . . . . . . . . . . . .±50mAOutput Pulse Current (Terminal 4) . . . . . . . . . . . . . . . . . . . . . 150mA

Thermal Resistance θJAPDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100oC/W

Power DissipationUp to TA = +55oC CA3059, CA3079 . . . . . . . . . . . . . . . . . 950mWAbove TA = +55oC CA3059, CA3079 . .Derate Linearly 10mW/oC

Ambient TemperatureOperating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oCStorage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65oC to +150oC

Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oCAt distance 1/16” ± 1/32” (1.59 ± 0.79) from casefor 10 seconds max

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationof the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Electrical Specifications TA = +25oC, For all Types, Unless Otherwise Specified. All voltages are measured with respect toTerminal 7. For Operating at 120VRMS, 50-60Hz (AC Line Voltage) (Note 1)

PARAMETERS SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

DC SUPPLY VOLTAGE (Figure 2A, 2B, 2C)

Inhibit Mode At 50/60Hz VS RS = 8kΩ, IL = 0 6.1 6.5 7 V

At 400Hz RS = 10kΩ, IL = 0 - 6.8 - V

At 50/60Hz RS = 5kΩ, IL = 0 - 6.4 - V

Pulse Mode At 50/60Hz VS RS = 8kΩ, IL = 0 6 6.4 7 V

At 400Hz RS = 10kΩ, IL = 0 - 6.7 - V

At 50/60Hz RS = 5kΩ, IL = 0 - 6.3 - V

Gate Trigger Current (Figures 3, 4A) IGTTerminal 4

Terminals 3 and 2 Connected,VGT = 1V

- 105 - mA

PEAK OUTPUT CURRENT (PULSED) (Figures 4, 5)

With Internal Power SupplyFigure 4a, 4b

IOMTerminal 4

Terminal 3 open, Gate TriggerVoltage (VGT) = 0

50 84 - mA

Terminals 3 and 2 Connected, Gate Trigger Voltage (VGT) = 0

90 124 - mA

With External Power SupplyFigure 5a, 5b, 5c

IOMTerminal 4

Terminal 3 open, V+ = 12V, VGT = 0 - 170 - mA

Terminals 3 and 2 Connected,V+ = 12V, VGT = 0

240 - mA

Inhibit Input Ratio (Figure 6) V9/V2 Voltage Ratio of Terminals 9 to 2 0.465 0.485 0.520 -

TOTAL GATE PULSE DURATION (Note 2) (Figure 7A, 7B, 7C, 7D)

For Positive dv/dt 50-60Hz tP CEXT = 0 70 100 140 µs

400Hz CEXT = 0, REXT = ∞ - 12 - µs

For Negative dv/dt 50-60Hz tN CEXT = 0 70 100 140 µs

400Hz CEXT = 0, REXT = ∞ - 10 - µs

PULSE DURATION AFTER ZERO CROSSING (50-60Hz) (Figure 7A)

For Positive dv/dt tP1 CEXT = 0, REXT = ∞ - 50 - µs

For Negative dv/dt tN1 - 60 - µs

OUTPUT LEAKAGE CURRENT (Figure 8)

Inhibit Mode I4 - 0.001 10 µA

INPUT BIAS CURRENT (Figure 9)

CA3059 II - 220 1000 nA

CA3079 - 220 2000 nA

Common-mode Input Voltage Range VCMR Terminals 9 and 13 Connected - 1.5 to 5

- V

5

Page 4: Ca3079

Specifications CA3059, CA3079

SENSITIVITY (Note 3) (Figures 4(a), 11)

Pulse Mode ∆V13 Terminal 12 open - 6 - mV

NOTES:

1. The values given in the Electrical Characteristics Chart at 120V also apply for operation at input voltages of 208/230V, and 277V, except for Pulse Duration. However, the series resistor (RS) must have the indicated value, shown in the chart in the Functional Block Diagram,for the specified input voltage.

2. Pulse Duration in 50Hz applications is approximately 15% longer than shown in Figure 7(b).

3. Required voltage change at Terminal 13 to either turn OFF the triac when ON or turn ON the triac when OFF.

Maximum Voltage Ratings TA = +25oC

MAXIMUM VOLTAGE RATINGS TA = +25oC

MAXIMUMCURRENTRATINGS

TERM. NO.

NOTE 31 2 3 4

NOTE 15

NOTE 36 7 8 9 10 11

NOTE 312 13

NOTES 2, 314

IINmA

IOUTmA

1Note 3

Note 4 Note 4 Note 4 Note 4 150

10-2

Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 10 0.1

2 0-15

0-15

2-14

0-14

0Note 5

-14

0Note 5

-14

0-14

0-14

0-14

Note 4 0-14

0-14

150 10

3 0-15

Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4

4 Note 4 2-10

Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 0.1 150

5Note 1

Note 4 7-7

Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 50 10

6Note 3

140

Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4

7 Note 4 140

Note 4 200

2.5-2.5

140

6-6

Note 4 Note 4

8 100

Note 4 Note 4 Note 4 Note 4 Note 4 0.1 2

9 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4 Note 4

10 Note 4 Note 4 Note 4 Note 4 Note 4 Note4

11 Note 4 Note 4 Note 4 Note 4 Note4

12Note 3

Note 4 Note 4 50 50

13 Note 4 Note 4 Note4

14Note 3

2 2

This chart gives the range of voltages which can be applied to the terminals listed horizontally with respect to the terminals listed vertically.For example, the voltage range of horizontal Terminal 6 to vertical Terminal 4 is 2V to -10V.NOTES:

1. Resistance should be inserted between Terminal 5 and external supply or line voltage for limiting current into Terminal 5 to less than 50mA.

2. Resistance should be inserted between Terminal 14 and external supply for limiting current into Terminal 14 to less than 2mA.3. For the CA3079 indicated terminal is internally connected and, therefore, should not be used.4. Voltages are not normally applied between these terminals; however, voltages appearing between these terminals are safe, if the spec-

ified voltage limits between all other terminals are not exceeded.5. For CA3079 (0V to -10V).

Electrical Specifications TA = +25oC, For all Types, Unless Otherwise Specified. All voltages are measured with respect toTerminal 7. For Operating at 120VRMS, 50-60Hz (AC Line Voltage) (Note 1) (Continued)

PARAMETERS SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

6

Page 5: Ca3079

7

CA3059, CA3079

FIGURE 2A. DC SUPPLY VOLTAGE TEST CIRCUIT FOR CA3059 AND CA3079

FIGURE 2B. DC SUPPLY VOLTAGE vs AMBIENT TEMPERA-TURE FOR CA3059 AND CA3079

FIGURE 2C. DC SUPPLY VOLTAGE vs EXTERNAL LOAD CURRENT FOR CA3059 AND CA3079

FIGURE 3. GATE TRIGGER CURRENT vs GATE TRIGGER VOLTAGE FOR CA3059 AND CA3079

FIGURE 4A. PEAK OUTPUT (PULSED) AND GATE TRIGGER CURRENT WITH INTERNAL POWER SUPPLYTEST CIRCUIT FOR CA3059 AND CA3079

FIGURE 4B. PEAK OUTPUT CURRENT (PULSED) vs AMBIENT TEMPERATURE FOR CA3059 AND CA3079

213

5

7

PULSE 4.6K

CA3059CA3079AC LINE

RS

8 4 9 10

11

INHIBIT

0.3K

4.6K

IL

VS

RL

100µF

EXTERNALLOADCURRENTALL RESISTANCE

VALUES ARE IN Ω

7.00

6.75

6.50

6.25

6.00

5.75

INT

ER

NA

L D

C S

UP

PL

Y (

V)

-75 -50 -25 0 25 50 75 100 125

AMBIENT TEMPERATURE (oC)

120VRMS, 50/60Hz OPERATIONINPUT RESISTANCE (RS) = 10kΩNO EXTERNAL LOAD

INHIBIT MODE

PULSE MODE

INT

ER

NA

L D

C S

UP

PLY

(V

)

6.5

6.0

5.5

5.0

4.5

4.0

3.50 1 2 3 4 5 6 7 8

EXTERNAL LOAD CURRENT (mA)

120VRMS, 50/60Hz OPERATIONTA = +25oC

RS = 5kΩ(INHIBITMODE)

RS = 5kΩ(PULSEMODE)

RS = 10kΩ(INHIBITMODE)

RS = 10kΩ(PULSEMODE)

GA

TE

TR

IGG

ER

CU

RR

EN

T (

mA

)

0 1 2 3

130

120

110

100

90

80

70

60

50

40

GATE TRIGGER (V)

TERMINAL 3 OPEN

TERMINALS 2 AND 3CONNECTED

120VRMS, 50/60Hz OPERATIONTA = +25oC

CA3059CA3079

9 10 11

5

7

4

2 3138

RS10K

AC LINEOSCILLOSCOPE

WITHHIGH GAIN

INPUT

VGT

100µF6K 5K

1Ω±1%

IOM (4)OR

IGT(4)

AMBIENT TEMPERATURE (oC)

-75 -50 -25 0 25 50 75 100 125

150

125

100

75

50PE

AK

OU

TP

UT

CU

RR

EN

T, P

UL

SE

D (

mA

)

120VRMS, 50/60Hz OPERATIONGATE TRIGGER, VGT = 0 (V)

TERMINALS 2 AND 3CONNECTED

TERMINAL 3 OPEN

175

Page 6: Ca3079

8

CA3059, CA3079

FIGURE 5A. PEAK OUTPUT CURRENT (PULSED) WITH EXTER-NAL POWER SUPPLY TEST CIRCUIT FOR CA3059

FIGURE 5B. PEAK OUTPUT CURRENT (PULSED) vs EXTER-NAL POWER SUPPLY VOLTAGE FOR CA3059

FIGURE 5C. PEAK OUTPUT CURRENT (PULSED) vs AMBIENT TEMPERATURE FOR CA3059

FIGURE 6(A). INPUT INHIBIT VOLTAGE RATIO TEST CIRCUIT FOR CA3059 AND CA3079

FIGURE 6B. INPUT INHIBIT VOLTAGE RATIO vs AMBIENT TEM-PERATURE FOR CA3059 AND CA3079

5

7

CA3059120VRMS

10K

5

ALL RESISTANCE VALUES ARE IN Ω

3 2

V+

OSCILLOSCOPEWITH

HIGH GAININPUT

13

4

100µF

VGT

1Ω±1%

8

910

11IOM(4)

5K 6K

RS

60Hz

0 5 10 15 20

300

250

200

150

100

50

0

EXTERNAL POWER SUPPLY, V+ (V)

PE

AK

OU

TPU

T, P

UL

SE

D (

mA

)

TERMINALS 2 AND 3CONNECTED

TERMINAL 3 OPEN

120VRMS, 50/60Hz OPERATIONGATE TRIGGER, VGT = 0 (V)

EXTERNAL

V+ = 13VSUPPLY

3V

3V

5V

5V

8V

10V

8V12V13V

10V

12V

120VRMS, 50/60Hz OPERATIONGATE TRIGGER VOLTS (VGT) = 0

TERMINALS 2 AND 3 CONNECTEDTERMINAL 3 OPEN

250

200

150

100

50

0

PE

AK

OU

TPU

T, P

UL

SE

D (

mA

)

AMBIENT TEMPERATURE (oC)

-50 -20 10 40 70 100 130

6

8 14

CA3059CA3079

5

7

11109

4

13 2

R1 R2

100µF

120VRMS60Hz

RS10K

ALL RESISTANCEVALUES IN Ω

0.60

0.55

0.50

0.45

0.40

0.35

0.30-50 -25 0 25 50 75 100 125

AMBIENT TEMPERATURE (oC)

INP

UT

INH

IBIT

VO

LT

AG

E R

AT

IO, V

9/V

2

120VRMS, 50/60Hz OPERATION

Page 7: Ca3079

9

CA3059, CA3079

FIGURE 7A. GATE PULSE DURATION TEST CIRCUIT WITH ASSOCIATED WAVEFORM FOR CA3059 ANDCA3079

FIGURE 7B. TOTAL GATE PULSE DURATION vs EXTERNAL CAPACITANCE FOR CA3059 AND CA3079

FIGURE 7C. PULSE DURATION AFTER ZERO CROSSING vs EXTERNAL CAPACITANCE FOR CA3059 & CA3079

FIGURE 7D. TOTAL GATE PULSE DURATION vs EXTERNAL RESISTANCE FOR CA3059

FIGURE 8. OUTPUT LEAKAGE CURRENT (INHIBIT MODE) vs AMBIENT TEMPERATURE FOR CA3059 AND CA3079

FIGURE 9. INPUT BIAS CURRENT TEST CIRCUIT FOR CA3059 AND CA3079

1312 8 26K 5K

100µF

4 OSC.WITHHIGHGAININPUT

CA3059CA3079

5

7

910

11

C(EXT)

RS10K

120VRMS60Hz

REXT

- dv/dtAC LINE

+ dv/dt

GATEPULSE

0V

tP

tP1 tN1

tN

NOTE: Circuitry within shaded area not included in CA3079.All resistance values are in Ω

1M

TO

TAL

GA

TE

PU

LSE

DU

RA

TIO

N (

µs)

300

200

100

00 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09

EXTERNAL CAPACITANCE (µF)

tP (POSITIVE dv/dt)

tN (NEGATIVE dv/dt)

120VRMS, 50/60Hz OPERATIONTA = +25oC

PU

LS

E D

UR

AT

ION

AF

TER

ZE

RO

CR

OS

SIN

G (

µs)

700

600

500

400

300

200

100

00 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1

EXTERNAL CAPACITANCE (µF)

tN1 (NEGATIVE dv/dt)

tP1 (POSITIVE dv/dt)

120VRMS, 50/60Hz OPERATIONTA = +25oC

EXTERNAL RESISTANCE (kΩ)

TO

TA

L G

AT

E P

UL

SE

DU

RA

TIO

N (

µs)

40

30

20

10

010 100

tP (POSITIVE dv/dt)

tN (NEGATIVE dv/dt)

120VRMS, 50/60Hz OPERATIONTA = +25oC

OU

TP

UT

LE

AK

AG

E (n

A)

100

10

1

0.1-80 -60 -40 -20 0 20 40 60 80 100 120 140

AMBIENT TEMPERATURE (oC)

120VRMS, 50/60Hz OPERATIONINPUT RESISTANCE (RS = 100kΩNO EXTERNAL LOAD

CA3059CA3079

2

7

9+3V

13

8

II

V+ = 6V

Page 8: Ca3079

10

CA3059, CA3079

FIGURE 10A. FIGURE 10B.

FIGURE 10C. FIGURE 10D.

FIGURE 10. RELATIVE PULSE WIDTH AND LOCATION OF ZERO CROSSING FOR 220V OPERATION FOR CA3059 AND CA3079

FIGURE 11. SENSITIVITY vs AMBIENT TEMPERATURE FOR CA3059 AND CA3079

FIGURE 12. OPERATING REGIONS FOR BUILT-IN PROTEC-TION CIRCUIT FOR CA3059

300

200

100

00 0.02 0.04 0.06 0.08 0.1

EXTERNAL CAPACITANCE (µF)

220VRMS, 50/60Hz OPERATIONINPUT RESISTANCE (RS) = 10kΩ

50Hz, tP(+ dv/dt)

60Hz, tP(+ dv/dt)

50Hz, tN(- dv/dt)

60Hz, tN(- dv/dt)

TO

TAL

GA

TE

PU

LSE

DU

RA

TIO

N (

µs)

TO

TA

L G

AT

E P

UL

SE

DU

RA

TIO

N (

µs) 600

400

200

00 0.02 0.04 0.06 0.08 0.1

EXTERNAL CAPACITANCE (µF)

60Hz, tN(- dv/dt)50Hz, tN

(- dv/dt)

60Hz, tP(+ dv/dt)

50Hz, tP(+ dv/dt)

220VRMS, 50/60Hz OPERATIONINPUT RESISTANCE (RS) = 20kΩ

TIM

E F

RO

M Z

ER

O C

RO

SS

ING

TO

EN

D O

F P

ULS

E (

µs)

0 0.02 0.04 0.06 0.08 0.1

600

400

200

0

220VRMS, 50/60Hz OPERATIONINPUT RESISTANCE (RS) = 10kΩ

60Hz, tN1(- dv/dt)

50Hz, tN1(- dv/dt)

60Hz, tP1(+ dv/dt)50Hz, tP1

(+ dv/dt)

EXTERNAL CAPACITANCE (µF)

TIM

E F

RO

M Z

ER

O C

RO

SS

ING

TO

EN

D O

F P

ULS

E (

µs)

600

400

200

00 0.02 0.04 0.06 0.08 0.1

EXTERNAL CAPACITANCE (µF)

220VRMS, 50/60Hz OPERATIONINPUT RESISTANCE (RS) = 20kΩ

50Hz, tN1(- dv/dt)

60Hz, tN1(- dv/dt)

50Hz, tP1(+ dv/dt)

60Hz, tP1(+ dv/dt)

SE

NS

ITIV

ITY

, ∆V

13 (

mV

)

∆SE

NS

OR

RE

SIS

TA

NC

E, ∆

RO

N -

RO

FF (

Ω)

30

20

10

0-75 -50 -25 0 25 50 75 100 125

AMBIENT TEMPERATURE (oC)

18

12

6

0

SENSOR RESISTANCE = 5kΩ

TERMINALS 7 AND 12 CONNECTEDDC GATE CURRENT MODE(CA3058 & CA3059)

TERMINAL 12 OPENPULSED GATE CURRENT MODE(ALL TYPES)

7

6

5

4

3

2

1

0

TE

RM

INA

L 1

4 (V

)

-50 -25 0 25 50 75

AMBIENT TEMPERATURE (oC)

THYRISTOR TURN-OFF

AREA OF NORMALOPERATION

AREA OF UNCERTAINOPERATION

AREA OF UNCERTAINOPERATION

THYRISTOR TURN-OFF

Page 9: Ca3079

11

CA3059, CA3079

FIGURE 13. LINE-OPERATED ONE-SHOT TIMER FIGURE 14. LINE-OPERATED THYRISTOR CONTROL TIME DELAY TURN-ON CIRCUIT

FIGURE 15. ON/OFF TEMPERATURE CONTROL CIRCUIT WITH DELAYED TURN-ON

FIGURE 16A. LINE-OPERATED IC TIMER FOR LONG TIME PERIODS

11

5

10

12

6 1

2

6

7

13

9

3

14+

-100µF

15VDC

OFFON

C1

R1

4

GMT1

MT2

RL

120VAC60Hz

CA3059

tON = 0.67 R1C1

R1(max. value allowable) = 1mΩ

10KΩ2W

11

5

10 12

6 1

2

8

7

14+

-100µF

15VDC

C1

R1

4

GMT1

MT2

RL

120VAC60Hz

CA3059

td = 0.67 R1C1

OFF

ON

9

13

3

10KΩ2W

CA3079

11

5

10

12

6 1

2

6

7

13

9

3

14+

-100µF

15VDC

C1

RP

4

GMT1

MT2

RL

120VAC60Hz

CA3059

10KΩ2WOFF

ON

R1

R2

NTCSENSOR

td = RTC1

RT =R1R2

R1 + R2

10

11

1

2

96

11

11

10 16

1 5

2

4

837

8

1

9

610

12

13

8

16

12

14

15

CA3059RECTIFIERAND TRIACCONTROL

5

4

SWITCHEDLOAD

MT2

MT1

T2300BMAX LOAD = 2.5A

G

1KΩ

7

COS/MOS CD4040A12-STAGE COUNTER

PULSE GENERATORCA3097E THYRISTOR/TRANSISTOR ARRAY

R410KΩ

R51KΩ

13SENSOR

100µF

- +

C1

R268KΩ

R1R3100KΩ

R62MΩ

R75KΩ

IN

VDD+

10KΩ

OUTPUT

RESET

10KΩ

120VAC 5KΩ2W

Terminal 1 goes “High”(Logic “1”) after 2048pulses are applied toTerminal 10.

NOTE:

For 8 hour delay:R1 = 12MΩC1 = 2µF

Page 10: Ca3079

12

CA3059, CA3079

FIGURE 16B. TIMING DIAGRAM FOR FIGURE 16A

FIGURE 17A. PROGRAMMABLE ULTRA-ACCURATE LINE-OPERATED TIMER.

e.g., 8 HRS1 PULSE/SEC

“NIGHT”“DAY”

SENSOR ILLUMINATION

COUNTER RESET(TERMINAL 11 OF CD4040)

“CLOCK” PULSES(TERMINAL 9 OF CA3097E)

COUNTER OUTPUT(TERMINAL 1 OF CD4040)

TERMINAL 6 OF CA3059 ANDTERMINAL 5 OF CA3097E

TERMINAL 4 OF CA3059AND POWER IN LOAD

102

1113

145

9

47

81

6

4

16 2 10

78 9

15

CA3059

RECTIFIERPULSEGENERATOR

TRIACCONTROL

11 16

10

8

TRIACG

200Ω

C1

100µF

10K

1KASTABLESW2

MONOSTABLE

RL

10K2W

1K

COS/MOS CD4020A14-STAGE BINARY

COUNTER

120VAC60Hz

RESETSW1RUN

C20.001

120pps

27H

G

F

E

D

C

B

A

1

+VDD (≅ +6.5V)

VDD Kd Ka28 29 210 211 212 213 214

a b c d e f g h

VSS Kb Kc

OUTPUT

CD4048AEXPANDABLE8 INPUT GATE

EXP

PROGRAMMINGINTERCONNECTIONS

T2302BMAX LOAD = 2.5A

120pps

+VDD (≅ +6.5V)RESET

Page 11: Ca3079

13

CA3059, CA3079

FIGURE 17B. “PROGRAMMING” TABLE FOR FIGURE 17(A).

TIME PERIODS (t = 0.5333 s)

1t 2t 4t 8t 16t 32t 64t 128t tOCD4020A TERMINALS

a b c d e f g h

CD4048A TERMINALS

A B C D E F G H

C NC NC NC NC NC NC NC 1t

NC C NC NC NC NC NC NC 2t

C C NC NC NC NC NC NC 3t

NC NC C NC NC NC NC NC 4t

C NC C NC NC NC NC NC 5t

NC C C NC NC NC NC NC 6t

C C C NC NC NC NC NC 7t

NC NC NC C NC NC NC NC 8t

C NC NC C NC NC NC NC 9t

NC C NC C NC NC NC NC 10t

C C NC C NC NC NC NC 11t

NC NC C C NC NC NC NC 12t

C NC C C NC NC NC NC 13t

NC C C C NC NC NC NC 14t

C C C C NC NC NC NC 15t

C C C C NC C C NC 111t

NC NC NC NC C C C NC 112t

C NC NC NC C C C NC 113t

C C C C C C C C 255t

NOTES:

1. tO = Total time delay = n1 t + n2 t + . . . nnt.

2. C = Connect. For example, interconnect terminal a of the CD4020A and terminal A of the CD4048A.

3. NC = No Connection. For example, terminal b of the CD4020A open and terminal B of the CD4048A connected to +VDD bus.

AC

CA3059

AC IN LOAD (R L)

CD4048A

SUPPLY VOLTAGE

OUTPUT(PIN 4 AND PIN 6)

OUTPUT

Page 12: Ca3079

14

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time withoutnotice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate andreliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may resultfrom its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

CA3059, CA3079

Power Supply Considerations for CA3059 and CA3079

The CA3059 and CA3079 are intended for operation as self-powered circuits with the power supplied from and AC linethrough a dropping resistor. The internal supply is designedto allow for some current to be drawn by the auxiliary powercircuits. Typical power supply characteristics are given inFigures 2(b) and 2(c).

Power Supply Considerations for CA3059

The output current available from the internal supply may notbe adequate for higher power applications. In such applica-tions an external power supply with a higher voltage shouldbe used with a resulting increase in the output level. (SeeFigure 4 for the peak output current characteristics.) Whenan external power supply is used, Terminal 5 should be con-nected to Terminal 7 and the synchronizing voltage appliedto Terminal 12 as illustrated in Figure 5(a).

Operation of Built-In Protection for the CA3059

A special feature of the CA3059 is the inclusion of a protec-tion circuit which, when connected, removes power from theload if the sensor either shorts or opens. The protection cir-cuit is activated by connecting Terminal 14 to Terminal 13 asshown in the Functional Block Diagram. To assure properoperation of the protection circuit the following conditionsshould be observed:

1. Use the internal supply and limit the external load current to 2mA with a 5kΩ dropping resistor.

2. Set the value of RP and sensor resistance (RX) between 2kΩ and 100kΩ.

3. The ratio of RX to RP, typically, should be greater than 0.33 and less than 3. If either of these ratios is not metwith an unmodified sensor over the entire anticipatedtemperature range, then either a series or shunt resistormust be added to avoid undesired activation of the circuit.

If operation of the protection circuit is desired under condi-tions other than those specified above, then apply the datagiven in Figure 12.

External Inhibit Function for the CA3059

A priority inhibit command may be applied to Terminal 1. Thepresence of at least +1.2V at 10µA will remove drive fromthe thyristor. This required level is compatible with DTL orT2L logic. A logical 1 activates the inhibit function.

DC Gate Current Mode for the CA3059

Connecting Terminals 7 and 12 disables the zero-crossingdetector and permits the flow of gate current on demandfrom the differential sensing amplifier. This mode of opera-tion is useful when comparator operation is desired or wheninductive loads are switched. Care must be exercised toavoid overloading the internal power supply when operatingin this mode. A sensitive gate thyristor should be used with aresistor placed between Terminal 4 and the gate in order tolimit the gate current.

Dimensions in parentheses are in millimeters and are derived fromthe basic inch dimensions as indicated. Grid gradations are in mils(10-3 inch).

The photographs and dimensions represent a chip when it is par ofthe wafer. When the wafer is cut into chips, the cleavage angles are57o instead of 90o with respect to the face of the chip. Therefore, theisolated chip is actually 7 mils (0.17mm) larger in both dimensions.

Operating Considerations

Page 13: Ca3079

This datasheet has been downloaded from:

www.DatasheetCatalog.com

Datasheets for electronic components.