Busbar Protection by GE
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8/17/2019 Busbar Protection by GE
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Fundamentals of Fundamentals of
Bus BarBus BarProtectionProtection
GE Multilin
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GE Consumer & IndustrialMultilin
May 3, 2016
Outline
• Bus arrangements• Bus components• Bus protection techniques• CT Saturation• Application Considerations: igh impedance !us di"erentialrela#ing $o% impedance !us di"erential
rela#ing Special topics
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GE Consumer & IndustrialMultilin
May 3, 2016
1 2 3 n-1 n
ZONE 1
- - - -
• &istri!ution and lo%er transmission
'oltage le'els• (o operating )e*i!ilit#
• Fault on the !us trips all circuit !rea+ers
Single !us , single !rea+er
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GE Consumer & IndustrialMultilin
May 3, 2016
ZONE 1ZONE 2
•&istri!ution and lo%er transmission
'oltage le'els
•$imited operating )e*i!ilit#
Multiple !us sections , single!rea+er %ith !us tie
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GE Consumer & IndustrialMultilin
May 3, 2016
ZONE 1
ZONE 2
•Transmission and distri!ution 'oltage le'els•Brea+er maintenance %ithout circuit remo'al
•Fault on a !us disconnects onl# the circuits
!eing connected to that !us
&ou!le !us , single !rea+er %ith!us tie
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GE Consumer & IndustrialMultilin
May 3, 2016
ZONE 1
MAIN BUS
TRANFER BUS
• -ncreased operating )e*i!ilit#•A !us fault requires tripping all
!rea+ers
•Transfer !us for !rea+er maintenance
Main and transfer !uses
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GE Consumer & IndustrialMultilin
May 3, 2016
ZONE 1
ZONE 2
•.er# high operating )e*i!ilit#•Transfer !us for !rea+er
maintenance
&ou!le !us / single !rea+er %0 tra
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May 3, 2016
ZONE 1
ZONE 2
•igh operating )e*i!ilit#•$ine protection co'ers !us section !et%een
t%o CTs
•Fault on a !us does not distur! the po%er to
circuits
&ou!le !us , dou!le !rea+er
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GE Consumer & IndustrialMultilin
May 3, 2016
ZONE 1
ZONE 2
•1sed on higher 'oltage le'els
•More operating )e*i!ilit#
•2equires more !rea+ers
•Middle !us sections co'ered !# line or
other equipment protection
Brea+er,and,a,half !us
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•igher 'oltage le'els•igh operating )e*i!ilit# %ith minimum
!rea+ers
•Separate !us protection not required at
B1 B2
TB1
L1 L2
L3 L4
TB1
2ing !us
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GE Consumer & IndustrialMultilin
May 3, 2016
Bus components !rea+ers
SF34 E. 5 . ,S nchro u"
$o% .oltage circuit!rea+ers
BUS 2
CB 1
BUS 1
ISO 1 ISO 2
ISO 3
BYPASS
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GE Consumer & IndustrialMultilin
May 3, 2016
-
+
F1aF1c
Contact Input F1a OnContact Input F1c On
F1b
I S O L A T O R 1
ISOLATOR 1 OPEN
7B 7A
BUS 1
-
+
F1aF1c
Contact Input F1a OnContact Input F1c On
F1b
I S O L A T
O R 1
ISOLATOR 1 CLOSED
7B 7A
BUS 1
&isconnect s%itches 5 au*iliar#contacts
BUS 2
CB 1
BUS 1
ISO 1 ISO 2
ISO 3
BYPASS
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GE Consumer & IndustrialMultilin
May 3, 2016
BUS 2
CB 1
BUS 1
ISO 1 ISO 2
ISO 3
BYPASS
Current Transformers
Oil insulated currenttransformer 678+. up to
9+.;
Gas 6SF3; insulatedcurrent transformer
Bushing t#pe
6medium 'oltages%itchgear;
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May 3, 2016
Protection 2equirements
igh !us fault currents due to large num!er ofcircuits connected:• CT saturation often !ecomes a pro!lem as CTs ma# not !e
su
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GE Consumer & IndustrialMultilin
May 3, 2016
Bus Protection Techniques
• -nterloc+ing schemes• O'ercurrent 6>unrestrained? or
>un!iased?; di"erential
• O'ercurrent percent 6>restrained? or>!iased?; di"erential
• $inear couplers
• igh,impedance !us di"erential schemes
• $o%,impedance !us di"erential schemes
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Multilin
May 3, 2016
O'ercurrent 6unrestrained;&i"erential
• &i"erential signal formed!# summation of allcurrents feeding the !us
• CT ratio matching ma# !erequired
• On e*ternal faults4saturated CTs #ieldspurious di"erentialcurrent
• Time dela# used to cope%ith CT saturation
• -nstantaneous di"erentialOC function useful onintegrated microprocessor,!ased rela#s
51
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Multilin
May 3, 2016
59
$inear Couplers
ZC = 2 – 20 - typi!" #i" i$p%&!'%
()* p%+ 1000A$p, = 0.00) / 0
-f @9 A
0 ! 10 ! 10 ! 0 ! 20 !
2000 A
0 !
E*ternalFault
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Multilin
May 3, 2016
59
$inearCouplersEsec@ -primDm , secondar# 'oltage on rela# terminals-2@ -primDm 062 C; / minimum operating current
%here4-prim / primar# current in each circuit
Dm / liner coupler mutual reactance 68. per Amps @H I8 J
3K ;2 / rela# tap impedance
C / sum of all linear coupler self impedances-f @9 A
0 ! 10 ! 10 ! 0 ! 20 !
0 !
-nternal BusFault
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• Fast4 secure and pro'en
• 2equire dedicated air gap CTs4 %hich ma# not!e used for an# other protection
• Cannot !e easil# applied to reconLgura!le!uses
• The scheme uses a simple 'oltage detector /it does not pro'ide !eneLts of amicroprocessor,!ased rela# 6eIgIoscillograph#4 !rea+er failure protection4other functions;
$inearCouplers
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Multilin
May 3, 2016
igh -mpedance &i"erential• Operating signal created !#
connecting all CT secondaries in
parallelo CTs must all ha'e the same ratio
o Must ha'e dedicated CTs
• O'er'oltage element operateson 'oltage de'eloped acrossresistor connected in secondar#
circuito 2equires 'aristors or AC
shorting rela#s to limit energ#during faults
• Accurac# dependent onsecondar# circuit resistance
o 1suall# requires larger CTca!les to reduce errors ⇒ highercost
Cannot easily be alied to re!on"#urablebuses and o$ers no ad%an!ed un!tionality
)4
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Multilin
May 3, 2016
Percent &i"erential
• Percent characteristicused to cope %ith CTsaturation and othererrors
• 2estraining signal can
!e formed in a num!erof %a#s
• (o dedicated CTsneeded
• 1sed for protection ofre,conLgura!le !usespossi!le
51"7
n DIF I I I I +++= ...21
n RES I I I I +++= ...21 ( )n RES I I I I ...,,,max 21=
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Multilin
May 3, 2016
$o% -mpedance Percent&i"erential• -ndi'idual currents sampled !# protection and summateddigitall#
o CT ratio matching done internall# 6no au*iliar# CTs;
o &edicated CTs not necessar#
• Additional algorithms impro'e securit# of percent di"erentialcharacteristic during CT saturation
• namic !us replica allo%s application to reconLgura!le !useso &one digitall# %ith logic to add0remo'e current inputs from
di"erential computation
o S%itching of CT secondar# circuits not required
• $o% secondar# !urdens
• Additional functionalit# a'aila!le
o &igital oscillograph# and monitoring of each circuit connected to!us Kone
o Time,stamped e'ent recording
o Brea+er failure protection
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Multilin
May 3, 2016
&igital &i"erential AlgorithmGoals• -mpro'e the main di"erential algorithm operationo Better Lltering
o Faster response
o Better restraint techniques
o S%itching transient !loc+ing
• Pro'ide d#namic !us replica for reconLgura!le !us !ars• &ependa!l# detect CT saturation in a fast and relia!le
manner4 especiall# for e*ternal faults
• -mplement additional securit# to the main di"erentialalgorithm to pre'ent incorrect operation
oE*ternal faults %ith CT saturationo CT secondar# circuit trou!le 6eIgI short circuits;
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Multilin
May 3, 2016
$o% -mpedance &i"erential6&istri!uted;
• &ata Acquisition 1nits
6&A1s; installed in !a#s• Central Processing 1nit
6CP1; processes all datafrom &A1s
• Communications !et%een
&A1s and CP1 o'er L!erusing proprietar# protocol
• Sampling s#nchronisation!et%een &A1s is required
• Percei'ed less relia!le
6more hard%are needed;• &i
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Multilin
May 3, 2016
$o% -mpedance &i"erential6CentraliKed;
• All currents applied to asingle central processor
• (o communications4e*ternal samplings#nchronisation necessar#
• Percei'ed more relia!le6less hard%are needed;
• =ell suited to !oth ne%and retroLt applicationsI
52 52 52
CU
copp$%
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Multilin
May 3, 2016
CT Saturation
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Multilin
May 3, 2016
CT Saturation Concepts
• CT saturation depends on a num!er of factorso Ph#sical CT characteristics 6siKe4 rating4 %inding
resistance4 saturation 'oltage;
o Connected CT secondar# !urden 6%ires rela#s;
o Primar# current magnitude4 &C o"set 6s#stem D02;
o 2esidual )u* in CT core• Actual CT secondar# currents ma# not !eha'e in the same
manner as the ratio 6scaled primar#; current during faults
• End result is spurious di"erential current appearing in thesummation of the secondar# currents %hich ma# cause
di"erential elements to operate if additional securit# isnot applied
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Multilin
May 3, 2016
CT Saturation
(at'o Cu%%$nt C) Cu%%$nt
(at'o Cu% %$nt C) Cu% %$nt
(o &C O"set
• =a'eform remainsfairl# s#mmetrical
=ith &C O"set
• =a'eform starts o"!eing as#mmetrical4then s#mmetrical instead# state
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Multilin
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E*ternal Fault 5 -deal CTs
• Fault starts at t
• Stead#,state fault conditions occur at t
t0
t1
-deal CTs ha'e no saturation or mismatcherrors thus produce no di"erential current
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Multilin
May 3, 2016
E*ternal Fault 5 Actual CTs
• Fault starts at t
• Stead#,state fault conditions occur at t
t0
t1
Actual CTs do introduce errors4 producing somedi"erential current 6%ithout CT saturation;
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MultilinMay 3, 2016
E*ternal Fault %ith CTSaturation
• Fault starts at t4 CT !egins to saturate at t
• CT full# saturated at t
t0
t1
t2
CT saturation causes increasing di"erentialcurrent that ma# enter the di"erential
element operate regionI
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Some Methods of Securing Bus&i"erential• Bloc+ the !us di"erential for a period of time 6intentional dela#;
o -ncreases securit# as !us Kone %ill not trip %hen CT saturation ispresent
o Pre'ents high,speed clearance for internal faults %ith CT saturationor e'ol'ing faults
• Change settings of the percent di"erential characteristic
6usuall# Slope ;o -mpro'es securit# of di"erential element !# increasing the amount
of spurious di"erential current needed to incorrectl# trip
o &i
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igh,
-mpedance
Bus&i"erential
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MultilinMay 3, 2016
igh -mpedance .oltage,operated 2ela#
E*ternal Fault• 59 element set abo%e ma' ossible %olta#ede%eloed a!ross relay durin# e'ternal ault !ausin#(orst !ase C) saturation• *or internal aults+ e'tremely ,i#, %olta#es -(ell
abo%e 59 element i!.u/ (ill de%elo a!ross relay
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MultilinMay 3, 2016
igh -mpedance .oltageOperated 2ela# 2atio matching %ith
Multi,ratio CTs• li!ation o ,i#, imedan!e di$erential relays(it, C)s o di$erent ratios but ratio mat!,in# tas isossible+ but !ould lead to %olta#e ma#ni"!ation
• olta#e de%eloed a!ross ull (indin# o taed C)does not e'!eed C) ratin#+ terminal blo!.s+ et!
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MultilinMay 3, 2016
igh -mpedance .oltageOperated 2ela# 2atio matching %ith
Multi,ratio CTs• se o au'iliary C)s to obtain !orre!t ratio mat!,in#is also ossible+ but t,ese C)s must be able to deli%erenou#, %olta#e ne!essary to rodu!e relay oerationor internal aults
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MultilinMay 3, 2016
Electromechanical igh-mpedance Bus &i"erential
2ela#s• Single phase rela#s• igh,speed
• igh impedance 'oltage sensing
• igh seismic -OC unit
P ! d i h - d B
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MultilinMay 3, 2016
Op$%at'n* t'+$, 20 30+. / I 15K
µP ,!ased igh,-mpedance Bus&i"erential Protection 2ela#s
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MultilinMay 3, 2016
2ST @ , sta!iliKing resistor to limit thecurrent through the rela#4 and force it tothe lo%er impedance CT %indingsIMO. / Metal O*ide .aristor to limit the'oltage to .olts93 / latching contact pre'enting theresistors from o'erheating after the fault is
detected
igh -mpedance Module for&igital 2ela#s
i h - d M d l
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MultilinMay 3, 2016
igh,-mpedance Module
O'ercurrent 2ela#
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MultilinMay 3, 2016
• Fast4 secure and pro'en
• 2equires dedicated CTs4 prefera!l# %ith the sameCT ratio and using full tap
• Can !e applied to small !uses
• &epending on !us internal and e*ternal faultcurrents4 high impedance !us di" ma# not pro'ideadequate settings for !oth sensiti'it# and securit#
• Cannot !e easil# applied to reconLgura!le !uses
• 2equire 'oltage limiting 'aristor capa!le ofa!sor!ing signiLcant energ#
• Ma# require au*iliar# CTs• &o not pro'ide full !eneLts of microprocessor,
!ased rela# s#stem 6eIgI metering4 monitoring4oscillograph#4 etcI;
igh -mpedance Bus Protection ,Summar#
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MultilinMay 3, 2016
$o%,
-mpedance
Bus&i"erential
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MultilinMay 3, 2016
µP,!ased $o%,-mpedance 2ela#s
• (o need for dedicated CTs
• -nternal CT ratio mismatch compensation
• Ad'anced algorithms supplement percent diferential
protection function ma+ing the rela# 'er# secure
• namic !us replica 6!us image; principle is used in
protection of reconLgura!le !us !ars4 eliminating the
need for s%itching ph#sicall# secondar# current
circuits
• -ntegrated Brea+er Failure 6BF; function can pro'ide
optimal tripping strateg# depending on the actualconLguration of a !us !ar
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MultilinMay 3, 2016
• 1p to Current -nputs• ones
• one @ Phase A• one @ Phase B• one 7 @ Phase C• one @ (ot used
• &i"erent CT 2atioCapa!ilit# for EachCircuit
• $argest CT Primar# isBase in 2ela#
,9 CircuitApplications
Small Bus Applications
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• 2ela# , Current -nputs
• ones• one @ Phase A 6 currents;• one @ Phase B 6 currents;• one 7 @ (ot used• one @ (ot used
C12
C11
• &i"erent CT 2atio Capa!ilit# for Each Circuit• $argest CT Primar# is Base in 2ela#
• 2ela# , Current -nputs
• ones• one @ (ot used• one @ (ot used• one 7 @ Phase C 6 currents;• one @ (ot used
, CircuitApplications
Medium to $arge BusApplications
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MultilinMay 3, 2016
$arge Bus Applications
56B p7!,% A
56B p7!,% B
56B p7!,% C
L#8i +%"!y
(,9it7 ,t!t:,;
#pti#'!" BF
$ B A li ti
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MultilinMay 3, 2016
$arge Bus Applications*or buses (it, u to 24 !ir!uits
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MultilinMay 3, 2016
&eLnitions of 2estraint Signals
+a'+u+ o&6
*$o+$t%'ca7 a8$%a*$6
.ca7$ .u+ o&6
.u+ o&6n R iiiii ++++= ...321
( )n R iiiin
i ++++= ...1
321
( )n R
iiii Maxi ,...,,, 321=
nn R
iiiii ⋅⋅⋅⋅= ...321
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>Sum Of? 'sI >Ma* Of? 2estraintMethods
>Sum Of? Approach• ore restraint on e'ternal
aults less sensiti%e or internalaults
• :;!aled aroa!,ta.es into a!!ount number o!onne!ted !ir!uits and mayin!rease sensiti%ity
• rea.oint settin#s or t,eer!ent di$erential!,ara!teristi! more di?!ult toset
>Ma* Of? Approach• @ess restraint on e'ternal aults
more sensiti%e or internal aults
• rea.oint settin#s or t,eer!ent di$erential!,ara!teristi! easier to set
• etter ,andles situation (,ereone C) may saturate !omletely-99A sloe settin#s ossible/
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MultilinMay 3, 2016
Bus &i"erential Adapti'eApproach
9 ' & & $ % $ n
t ' a 7
%$.t%a'n'n*
R%8i#' 1
:7o; 9'&&$%$nt'a7
cu%%$nt.<
R%8i#' 2
:='*= 9'&& $%$nt'a7
cu%%$nt.<
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MultilinMay 3, 2016
Bus &i"erential Adapti'e $ogic&iagram
DIFL
DIR
SAT
DIF
OR
AND
O
R56B BIASED OP
AND
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Phase Comparison Principle• -nternal Faults: ll ault -:lar#e>/ !urrents are
aro'imately in ,ase
• E*ternal Faults: =ne ault -:lar#e>/ !urrent (ill be outo ,ase
• (o .oltages are required or needed
S$cona%> Cu%%$nt o&Fau7t$ C'%cu't
:S$8$%$ C) Satu%at'on<
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Phase Comparison PrincipleContinuedQ
BLOC=
OPERATE
BLOC=
− p D
p
I I
I real
− p D
p
I I
I imag
I p
I D
- I p
E>t%+'!" F!:"t C#'&iti#',
OPERATE
BLOC=
BLOC=
− p D p
I I
I real
− p D
p
I I
I imag
I p
I D
- I p
I't%+'!" F!:"t C#'&iti#',
OPERATE
OPERATE
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CT Saturation
• *ault starts at t0+ C) be#ins to saturate at t1
• C) ully saturated at t2
t0
t1
t2
i
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CT Saturation &etector StateMachine NORMAL
SAT := 0
EXTERNAL
FAULT
SAT := 1
EXTERNAL
FAULT & CTSATURATION
SAT := 1
The differential
characteritic
entered
The differential!
retrainin" tra#ect$r%
$t $f the differential
characteritic f$r
certain 'eri$d $f ti(e
atrati$n
c$nditi$n
The differential
crrent )el$* the
firt l$'e f$r
certain 'eri$d $f
ti(e
C S i
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CT Saturation &etectorOperating Principles
• The 9B SAT )ag WILL NOT !e set duringinternal faults4 regardless of %hether or notan# of the CTs saturateI
• The 9B SAT )ag WILL !e set duringe*ternal faults4 regardless of %hether or notan# of the CTs saturateI
• B# design4 the 9B SAT )ag WILL force the
rela# to use the additional 9B &-2 phasecomparison for 2egion The Saturation &etector =-$$ (OT Bloc+ theOperation of the &i"erential Element / it %illonl# Force ,out,of, Operation
CT S i &
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CT Saturation &etector ,E*amples• The oscillograph# records on the ne*t t%o slides %ere
captured from a B7 rela# under test on a real,time digital
po%er s#stem simulator• First slide sho%s an e*ternal fault %ith deep CT saturation
6RI8 msec of good CT performance;
o SAT saturation detector )ag asserts prior to B-ASE& PP!us di"erential pic+up
o &-2 directional )ag does not assert 6one current )o%sout of Kone;4 so e'en though !us di"erential pic+s up4 notrip results
• Second slide sho%s an internal fault %ith mild CT saturation
o B-ASE& PP and B-ASE& OP !oth assert !efore &-2
assertso CT saturation does not !loc+ !us di"erential
• More e*amples a'aila!le 6COMT2A&E Lles; upon request
CT S t ti E l
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)=$ bu. 9'&&$%$nt'a
p%ot$ct'on $$+$ntp'c?. up 9u$ to =$a8>
C) .atu%at'on
)=$ C) .atu%at'on &a*
'. .$t .a&$> b$&o%$ t=$p'c?up &a*
)=$9'%$ct'ona &a*
'. not .$t
)=$ $$+$nt9o$. not
+aop$%at$
#$.p't$ =$a8> C).atu%at'on t=$$t$%na7 &au7t cu%%$nt'. .$$n 'n t=$oppo.'t$ '%$ct'on
CT Saturation E*ample /E*ternal Fault
0.06 0.07 0.08 0.09 0.1 0.11 0.12-200
-150
-100
-50
0
50
100
150
200
time, sec
c u r r e n t , A
@1 +.
CT S t ti - t l F lt
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)=$ bu. 9'&&$%$nt'ap%ot$ct'on $$+$ntp'c?. up
)=$ .atu%at'on&a* '. not .$t - no
9'%$ct'ona
9$c'.'on %$u'%$9
)=$ $$+$ntop$%at$. 'n
10+.
)=$9'%$ct'ona
&a* '. .$t
A t=$ &aut cu%%$nt.a%$ .$$n 'n on$
9'%$ct'on
CT Saturation / -nternal FaultE*ample
A l i $ - d
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Appl#ing $o%,-mpedance&i"erential 2ela#s for Bus!ar
ProtectionBasic Topics• ConLgure ph#sical CT -nputs
• ConLgure Bus one and namic Bus
2eplica• Calculating Bus &i"erential Element settings
Ad'anced Topics
• -solator s%itch monitoring for
reconLgura!le !uses• &i"erential one CT Trou!le
• -ntegrated Brea+er Failure protection
C L i CT - t
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ConLguring CT -nputs
•For each connected CT circuit enter Primar#rating and select Secondar# ratingI
• Each 7,phase !an+ of CT inputs must !eassigned to a Signal Source that is used todeLne the Bus one and namic Bus 2eplica
;ome relays de"ne 1 u as t,ema'imum rimary !urrent o all o t,eC)s !onne!ted in t,e #i%en us Bone
P 1 it C t & L iti
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Per,1nit Current &eLnition ,E*ample
CurrentChannel
Primar#
Secondar#
one
CT,
F 3200 A
CT,
F A 8 A
CT,7
F7 A A
CT,
F 7 A A
CT,8
F8 A 8 A
CT,F3 5000 8 A
• For one 4 pIuI @ 7 AP
• For one 4 pIuI @ 8 AP
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C L i th B &i" ti l
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ConLguring the Bus &i"erentialone
I ConLgure the ph#sical CT -nputso CT Primar# and Secondar# 'alues
o Both 8 A and A inputs are supported !# the 12 hard%are
o 2atio compensation done automaticall# for CT ratiodi"erences up to 7:
I ConLgure AC Signal Sources
7I ConLgure Bus one %ith namic Bus 2eplica
Bus one settings deLnes the !oundaries of
the &i"erential Protection and CT Trou!leMonitoringI
& l P t &i" ti l
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&ual Percent &i"erentialCharacteristic
i87B+%!?p#i't
L#9
B+%!?p#i't
L#9 S"#p%
i87 S"#p%
i87 S%t
(U'+%,t+!i'%&
Mi' Pi?:p
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Calculating Bus &i"erential
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Calculating Bus &i"erentialSettings / Minimum Pic+up
• &eLnes the minimum di"erential current requiredfor operation of the Bus one &i"erential element
• Must !e set a!o'e ma*imum lea+age current not
Koned o" in the !us di"erential Kone• Ma# also !e set a!o'e ma*imum load conditions
for added securit# in case of CT trou!le4 !ut!etter alternati'es e*ist
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Calculating Bus &i"erential
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Calculating Bus &i"erentialSettings / $o% Brea+point
• &eLnes the upper limit to restraint currents that %ill!e !iased according to the $o% Slope setting
• Should !e set to !e a!o'e the ma*imum load !utnot more than the ma*imum current %here the CTs
still operate linearl# 6including residual )u*;• Assumption is that the CTs %ill !e operating linearl#
6no signiLcant saturation e"ects up to 9 residual)u*; up to the $o% Brea+point setting
Calculating Bus &i"erential
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Calculating Bus &i"erentialSettings / igh Brea+point
• &eLnes the minimum restraint currents that %ill !e!iased according to the igh Slope setting
• Should !e set to !e !elo% the minimum current
%here the %ea+est CT %ill saturate %ith noresidual )u*
• Assumption is that the CTs %ill !e operatinglinearl# 6no signiLcant saturation e"ects up to 9residual )u*; up to the $o% Brea+point setting
Calculating Bus &i"erential
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Calculating Bus &i"erentialSettings / igh Slope
• &eLnes the percent !ias for the restraint currents-2EST≥igh Brea+point
• Setting determines the sta!ilit# of the di"erentialelement for high current e*ternal faults
• Traditionall#4 should !e set high enough toaccommodate the spurious di"erential currentresulting from saturation of the CTs during hea'#e*ternal faults
• Setting can !e rela*ed in fa'our of sensiti'it# andspeed as the rela# detects CT saturation and applies
the directional principle to pre'ent maloperation• 2ange: 8 to in I increments
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2econLgura!le Buses
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NO() BUS
SOU) BUS
C)-7
C)-"
B-7
B-5
B-
C)-5
C)-
S-5
S-
B-C)-
S-3
S-
B-3C)-3
S-1
S-2
B-2C)-2C)-1
B-1
C-1 C-2 C-
C-3 C-5
%ot$ct'n* %$-con&'*u%ab7$ bu.$.
2econLgura!le Buses
2econLgura!le Buses
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NO() BUS
SOU) BUS
C)-7
C)-"
B-7
B-5
B-
C)-5
C)-
S-5
S-
B-C)-
S-3
S-
B-3C)-3
S-1
S-2
B-2C)-2C)-1
B-1
C-1 C-2 C-
C-3 C-5
%ot$ct'n* %$-con&'*u%ab7$ bu.$.
2econLgura!le Buses
2econLgura!le Buses
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NO() BUS
SOU) BUS
C)-"
B-5
B-
C)-5
C)-
S-5
S-
B-C)-
S-3
S-
B-3C)-3
S-1
S-2
B-2C)-2
C)-1
B-1
C-1 C-2 C-
C-3 C-5
C)-7
B-7
%ot$ct'n* %$-con&'*u%ab7$ bu.$.
2econLgura!le Buses
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-solator / T#pical Open0Closed
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-solator / T#pical Open0ClosedConnections
S%itch Status $ogic and
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-solatorOpenAu*iliar#Contact
-solatorClosedAu*iliar#Contact
-solatorPosition
Alarm Bloc+S%itching
O" On C$OSE& (o (o
O" O" $AST .A$-& After timedela#untilac+no%ledged
1ntil -solator
Position is'alid
On On C$OSE&
On O" OPE( (o (o
(OTE: -solator monitoring function ma# !e a !uilt,in featureor user,programma!le in lo% impedance !us di"erentialdigital rela#s
S c S a us og c a danamic Bus 2eplica
&i"erential one CT Trou!le
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&i"erential one CT Trou!le
• Each Bus &i"erential one ma# a dedicated CTTrou!le Monitor
• &eLnite time dela# o'ercurrent element operatingon the Kone di"erential current4 !ased on theconLgured namic Bus 2eplica
• Three strategies to deal %ith CT pro!lems:
I Trip the !us Kone as the pro!lem %ith a CT %illli+el# e'ol'e into a !us fault an#%a#
I &o not trip the !us4 raise an alarm and tr# tocorrect the pro!lem manuall#
7I S%itch to setting group %ith 9B minimumpic+up setting a!o'e the ma*imum loadcurrentI
&i"erential one CT Trou!le
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• Strategies and 7 can !eaccomplished !#: 1sing under'oltage super'ision to ride through
the period from the !eginning of the pro!lem%ith a CT until declaring a CT trou!le condition
1sing an e*ternal chec+ Kone to super'ise the9B function
1sing CT Trou!le to pre'ent the Bus &i"erentialtripping 6;
1sing setting groups to increase the pic+up
'alue for the 9B function 67;
&i"erential one CT Trou!le
&i"erential one CT Trou!le /
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&i"erential one CT Trou!le /Strateg# V E*ample
• CT Trou!le operand is used to rise an alarm
• The 9B trip is inhi!ited after CT Trou!le elementoperates
• The rela# ma# misoperate if an e*ternal fault
occurs after CT trou!le !ut !efore the CT trou!lecondition is declared 6dou!le,contingenc#;
56B #p%+!t%,
U'&%+@#"t!8% #'&iti#'
CT O
E*ample Architecture for $arge
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E*ample Architecture for $argeBus!ars
&ual 6redundant; L!er%ith 7msec deli'er#time !et%een
neigh!ouring -E&sI 1pto 9 rela#s in the ring
Phase A C si#nals andtri !onta!ts
Phase B C si#nals andtri !onta!ts
Phase C C si#nals andtri !onta!ts
&igital -nputs orisolator monitorin# and*
E*ample Architecture / namic
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Phase A C si#nals(ired ,ere+ bus reli!a!on"#ured ,ere
Phase B C si#nals(ired ,ere+ bus reli!a!on"#ured ,ere
Phase C C si#nals(ired ,ere+ bus reli!a
!on"#ured ,ere
Auu7'a%> .;'tc=$. ;'%$ =$%$D
I.o7ato% on'to%'n* &unct'on
con&'*u%$ =$%$
I s o l a t o r
7 o s i t i o
n
I s o l a t o r 7 o s i t i o n
I s o l a t o r 7 o s i t i o n
I s o l a t
o r 7 o s i t i o n
E*ample Architecture namicBus 2eplica and -solator
Position
E*ample Architecture / BF
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Phase A C si#nals(ired ,ere+ !urrentstatus monitored ,ere
Phase B C si#nals(ired ,ere+ !urrentstatus monitored ,ere
Phase C C si#nals(ired ,ere+ !urrent
status monitored ,ere
rea.er *ailureelements!on"#ured ,ere
5 * I n i t i a
t e &
C u r r e n t
; u %1
5 * I n i t i a t e & C u r r e n t ; u % 1
5 * I n i t i a t e & C u r r e n t ; u % 1
5 * I n i t i a
t e & C u r r e
n t ; u
%1
E*ample Architecture BF-nitiation 5 Current Super'ision
E*ample Architecture / Brea+er
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Phase A C si#nals(ired ,ere+ !urrentstatus monitored ,ere
Phase B C si#nals(ired ,ere+ !urrentstatus monitored ,ere
Phase C C si#nals(ired ,ere+ !urrent
status monitored ,ere
rea.er *ail = !ommand#enerated ,ere and send totri aroriate brea.ers
5 r e a . e r
* a i l =
5 r e a . e r * a i l =
5 r e
a . e r * a i l =
5 r e a . e
r * a i l =
)ri
)ri )ri
E*ample Architecture Brea+erFailure Tripping )ri
-EEE 7I7
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-EEE 7I7
• >Guide for Protecti'e 2ela# Applicationsto Po%er S#stem Buses? is currentl#!eing re'ised !# the =or+ing Groupof the -EEE Po%er S#stem 2ela#ing
CommitteeI
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