Building an Efficient, Tightly Coupled Embedded System

White Paper June 2014 Building an Efficient, Tightly Coupled Embedded System Using an Extensible Processor Authors Jeroen Geuzebroek Sr. R&D Engineer, Synopsys Inc. Ad Vaassen Sr. System Engineer Synopsys Inc. Abstract The increasing demand for better filtering and processing capabilities of the processor within embedded systems results in a trend to shift from 8-bit microcontroller tightly coupled embedded systems towards 32-bit processor bus-based embedded systems. As a consequence, the power, performance and area (PPA) ratio of these systems also shifts in favor of performance at the cost of power and area. However ultra low power and small area are the main drivers for these embedded systems. This white paper describes how closely coupled memories and processor extensions can be leveraged to improve the power and area of these embedded systems by making the bus infrastructure superfluous. Removing the bus infrastructure reduces area costs as well as the latency observed when accessing memories and peripheral registers. Reduced latency translates into performance improvement and power reduction. Improving the PPA ratio of an embedded system by tightly coupling memories and peripherals is demonstrated by comparing a bus-based implementation of a sensor hub versus a tightly coupled implementation. The tightly coupled implementation results in a minimum area reduction of 7K equivalent NAND2 gates, and 2.0x energy reduction. Introduction Embedded systems exist in many devices that are a part of our daily lives, not only in high-performance devices such as smart phones and tablets, but also in devices requiring low energy consumption like medical monitors, hearing aids, ID cards and wearable electronics. These embedded systems perform dedicated tasks in a very efficient and optimized way. In general they consist of a deeply embedded processor that collects data from embedded peripherals, filters and processes this data, and returns the processed data to an application host processor or another peripheral. The right PPA ratio is key for such processor-based embedded systems. Ultra low power and small area are the main drivers. Ultra low power is very important as these embedded systems are often found in battery- powered devices with a limited energy budget and where a long battery life is important. Small area is required to reduce BoM costs and limit the device size as embedded systems are often put in very low-cost devices where there is limited room for the (packaged) embedded system. The performance of the embedded systems in the low-cost, low-energy devices only needs to be as good as is required to perform its dedicated tasks within the specified timing constraints, while still enabling low energy consumption and small area. The PPA ratio of an embedded system differs from the ratio in a high-end host processor in a mobile device, where performance is the main driver and power and area are sacrificed. Embedded systems based on an 8-bit microcontroller with tightly coupled peripherals have always been very popular due to their small size and low-power operation. Today, the dedicated tasks running on these embedded systems are becoming more complex, resulting in a demand for better filtering and processing capabilities of the deeply embedded processor. This has resulted in a shift from 8-bit microcontroller based embedded systems to 32-bit processor-based embedded systems [1, 2].

Building an Efficient, Tightly Coupled Embedded System

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