Booth's Algorithm - Multiplication & Division

ECE 369 :: Fundamentals of Computer Architecture 1

Multiplication

More complicated than addition

• Accomplished via shifting and addition

More time and more area

Let's look at 3 versions based on grade school algorithm

01010010 (multiplicand)

x 01101101 (multiplier)

Negative numbers: convert and multiply

Use other better techniques like Booth’s encoding

ECE 369 - Fundamentals of Computer Architecture

1

01010010(multiplicand)× 01101101 (multiplier)0000000001010010 ×101010010000000000 ×0001010010

0101001000 ×1011001101001010010000 ×110000101010000000000000 ×00100001010100101001000000 ×1011100110101001010010000000 ×110001011101010

000000000000000 ×00010001011101010

01010010 (multiplicand)

× 01101101 (multiplier) 00000000

01010010 ×100101001 0 (add & shr)

00000000 0 ×000010100 10 (add & shr)

01010010 00 ×100110011 010 (add & shr)

01010010 000 ×101000010 1010 (add & shr)

00000000 0000 ×000100001 01010 (add & shr)

01010010 00000 ×100111001 101010 (add & shr)

01010010 000000 ×101000101 1101010 (add & shr)

00000000 0000000 ×000100010 11101010 (add & shr)

Multiplication


Multiplication: Implementation

64-bit ALU

Control test

MultiplierShift right

ProductWrite

MultiplicandShift left

64 bits

64 bits

32 bits

Done

1. TestMultiplier0

1a. Add multiplicand to product andplace the result in Product register

2. Shift the Multiplicand register left 1 bit

3. Shift the Multiplier register right 1 bit

32nd repetition?

Start

Multiplier0 = 0Multiplier0 = 1

No: < 32 repetitions

Yes: 32 repetitions


Second version

MultiplierShift right

Write

32 bits

64 bits

32 bits

Shift right

Multiplicand

32-bit ALU

Product Control test

Done

1. TestMultiplier0

1a. Add multiplicand to the left half ofthe product and place the result inthe left half of the Product register

2. Shift the Product register right 1 bit

3. Shift the Multiplier register right 1 bit

32nd repetition?

Start

Multiplier0 = 0Multiplier0 = 1


Yes: 32 repetitions


Final version

ControltestWrite

32 bits

64 bits

Shift rightProduct

Multiplicand

32-bit ALU

Done

1. TestProduct0

1a. Add multiplicand to the left half ofthe product and place the result inthe left half of the Product register

2. Shift the Product register right 1 bit

32nd repetition?

Start

Product0 = 0Product0 = 1


Yes: 32 repetitions


Multiplication example: 0010 x 0110

Iteration MultiplicandOriginal Algorithm

Step Product

0 0010 Initial values 0000 0110

1 00101: 0 -> No operation 0000 0110

2: Shift right 0000 0011

2 0010

1a: 1 -> Product = Product + Multiplicand

0010 0011


3 0010

1a: 1 -> Product = Product + Multiplicand

0011 0001


4 00101: 0 -> No operation 0001 1000



2

Signed Multiplication

The easiest way to deal with signed numbers is to first convert the multiplier and multiplicand to positive numbers and then remember theoriginal sign.

It turns out that the last algorithm will work with signed numbersprovided that when we do the shifting steps we extend the sign of theproduct.


3

Speeding up multiplication (Booth’s Algorithm)

The way we have done multiplication so far consisted of repeatedlyscanning the multiplier, adding the mutiplicand (or zeros) and shiftingthe result accumulated.

Observation: if we could reduce the number of times we have to add the multiplicandthat would make the all process faster.

Let say we want to do: b x a where a=7ten=0111two

With the algorithm used so far we successively:add b, add b, add b, and add 0

If we “recode” the number 7ten as (8-1)ten = (1000 – 0001)two = 100-1all we need to do is:sub b, add 0, add 0, add 0, and add b


4

Booth’s Algorithm

Observation: If besides addition we also use subtraction, we can reduce the number of consecutives additions and therefore we can make the multiplication faster.

This requires to “recode” the multiplier in such a way that the number of consecutive 1s in the multiplier (indeed the number of consecutive additions we should have done) are reduced.

The key to Booth’s algorithm is to scan the multiplier and classify groupof bits into the beginning, the middle and the end of a run of 1s

1 1 1 10 0

Beginning of RunEnd of RunMiddle of Run

A string of 0s already avoids arithmetic,so we can leave them alone


5

Using Booth’s encoding for multiplication

If the initial content of A is an-1…a0 then i-th multiply step, the low-order bit of register A is ai and step (i) in the multiplicationalgorithm becomes:1. If ai=0 and ai-1=0, then add 0 to P2. If ai=0 and ai-1=1, then add B to P3. If ai=1 and ai-1=0, then subtract B from P4. If ai=1 and ai-1=1, then add 0 to P(For the first step when i=0, then add 0 to P)

Current bit Bit to the right Type

1 0 Beg. Run

1 1 Middle Run

1 1 End Run

0 0 Middle Run

Action

Subtract the multiplicand

Add the multiplicand

No arithmetic operation

No arithmetic multiplicand


6

Booth’s algorithm

Start

Test multiplier[i:i-1]01

Add multiplicand to the left half of the product and place the result in the left half of the product register

Subtract multiplicand from the left half of the product and place the result in the left half of the product register

10

Shift the product register right by 1

Done

< 32 rep

= 32 rep

00 11


Booth's algorithm example

Iteration MultiplicandBooth's Algorithm

Step Product

0 0010 Initial values 0000 1101 0

1 0010

10 -> Product = Product - Multiplicand

1110 1101 0

Shift right 1111 0110 1

2 0010

01 -> Product = Product + Multiplicand

0001 0110 1


3 0010

10 -> Product = Product - Multiplicand

1110 1011 0


4 001011 -> No operation 1111 0101 1



Division

Even more complicated

Can be accomplished via shifting and addition/subtraction

More time and more area

We will look at 3 versions based on grade school algorithm

0011 | 0010 0010 (Dividend)

Negative numbers: Even more difficult

There are better techniques, we won’t look at them

claudio

claudio

claudio

(Divisor) 0011 | 0010 0010 (Dividend)


7

Division

1001 (Quotient)

Divisor 1000 1001010 (Dividend)

-1000

10

101

1010

-1000

10 (Remainder)

Dividend = Quotient x Divider + Remainder


8

Division: First Algorithm

Done

Test Remainder

2a. Shift the Quotient register to the left,�setting the new rightmost bit to 1

3. Shift the Divisor register right 1 bit

33rd repetition?

Start

Remainder < 0


Yes: 33 repetitions

2b. Restore the original value by adding�the Divisor register to the Remainder�

register and place the sum in the�Remainder register. Also shift the�

Quotient register to the left, setting the�new least significant bit to 0

1. Subtract the Divisor register from the�Remainder register and place the� result in the Remainder register

Remainder > 0�

–


Division - Implementation

64-bit ALU

Controltest

QuotientShift left

RemainderWrite

DivisorShift right

64 bits

64 bits

32 bits

Control

test

Quotient

Shift left

Write

32 bits

64 bits

32 bits

Shift left

Divisor

32-bit ALU

Remainder


Division

Done. Shift left half of Remainder right 1 bit

Test Remainder

3a. Shift the Remainder register to the left, setting the new rightmost bit to 1

32nd repetition?

Start

Remainder < 0


Yes: 32 repetitions

3b. Restore the original value by addingthe Divisor register to the left half of theRemainder register and place the sum

in the left half of the Remainder register.Also shift the Remainder register to theleft, setting the new rightmost bit to 0

2. Subtract the Divisor register from theleft half of the Remainder register andplace the result in the left half of the

Remainder register

Remainder 0

1. Shift the Remainder register left 1 bit

–>

Write

32 bits

64 bits

Shift left

Shift rightRemainder

32-bit ALU

Divisor

Controltest


Restoring division example

Iteration DivisorDivide Algorithm

Step Product

0 0010Initial values 0000 0111

Shift reminder left by 1 0000 1110

1 00102. Reminder = Reminder - Divisor 1110 1110

3b. (Reminder < 0); +Div; Shift left, R0 = 0 0001 1100


3b. (Reminder < 0); +Div; Shift left, R0 = 0 0011 1000


3a. (Reminder > 0); Shift left, R0 = 1 0011 0001


3a. (Reminder > 0); Shift left, R0 = 1 0010 0011

Done 0010 Shift left half of reminder right by 1 0001 0011


Non-restoring division

How can we avoid adding the divisor back to the reminder?

• Note that this addition is performed whenever the reminder is negative!

So, what exactly are we doing when the reminder is negative?

• We have a certain reminder: R (R < 0)

• We add the divisor back to it: R + D

• We shift the result left by 1: 2*(R + D) = 2*R + 2*D

• We subtract the divisor again in the next step: 2*R + 2*D - D = 2*R + D

• Equivalent of left shifting the reminder R by 1 bit

• Add the divisor in the next step, instead of subtracting


Non-restoring division example

Iteration DivisorDivide Algorithm

Step Product

0 0010Initial values 0000 0111

Shift reminder left by 1 0000 1110

1 0010Reminder = Reminder - Divisor 1110 1110

(Reminder < 0); Shift left, R0 = 0 1101 1100

2 0010Reminder = Reminder + Divisor 1111 1100

(Reminder < 0); Shift left, R0 = 0 1111 1000

3 0010Reminder = Reminder + Divisor 0001 1000

(Reminder > 0); Shift left, R0 = 1 0011 0001

4 0010Reminder = Reminder - Divisor 0001 0001

(Reminder > 0); Shift left, R0 = 1 0010 0011

Done 0010 Shift left half of reminder right by 1 0001 0011


Floating point numbers (a brief look)

We need a way to represent

• Numbers with fractions, e.g., 3.1416

• Very small numbers, e.g., 0.000000001

• Very large numbers, e.g., 3.15576 x 109

Representation

• Sign, exponent, significand: (–1)sign x significand x 2exponent

• More bits for significand gives more accuracy

• More bits for exponent increases range

IEEE 754 floating point standard

• Single precision: 8 bit exponent, 23 bit significand

• Double precision: 11 bit exponent, 52 bit significand


IEEE 754 floating-point standard

Leading “1” bit of significand is implicit

Exponent is “biased” to make sorting easier

• All 0s is smallest exponent, all 1s is largest

• Bias of 127 for single precision and 1023 for double precision

• Summary: (–1)sign x (1+significand) x 2(exponent – bias)

Example

• Decimal: -.75 = -3/4 = -3/22

• Binary: -.11 = -1.1 x 2-1

• Floating point: exponent = 126 = 01111110

• IEEE single precision: 1 01111110 10000000000000000000000


Floating point complexities

Operations are somewhat more complicated (see text)

In addition to overflow we can have “underflow”

Accuracy can be a big problem

• IEEE 754 keeps two extra bits, guard and round

• Four rounding modes

• Positive divided by zero yields “infinity”

• Zero divide by zero yields “not a number”

• Other complexities

Implementing the standard can be tricky

Not using the standard can be even worse

• See text for description of 80x86 and Pentium bug!


Floating point add/subtract

To add/sub two numbers

• We first compare the two exponents

• Select the higher of the two as the exponent of result

• Select the significand part of lower exponent number and shift it right by the amount equal to the difference of two exponent

• Remember to keep two shifted out bit and a guard bit

• Add/sub the signifand as required according to operation and signs of operands

• Normalize significand of result adjusting exponent

• Round the result (add one to the least significant bit to be retained if the first bit being thrown away is a 1

• Re-normalize the result


Floating point multiply

To multiply two numbers

• Add the two exponent (remember access 127 notation)

• Produce the result sign as exor of two signs

• Multiply significand portions

• Results will be 1x.xxxxx… or 01.xxxx….

• In the first case shift result right and adjust exponent

• Round off the result

• This may require another normalization step


Floating point divide

To divide two numbers

• Subtract divisor’s exponent from the dividend’s exponent (remember access 127 notation)

• Produce the result sign as exor of two signs

• Divide dividend’s significand by divisor’s significand portions

• Results will be 1.xxxxx… or 0.1xxxx….

• In the second case shift result left and adjust exponent

• Round off the result

• This may require another normalization step


Summary on Chapter 3

Computer arithmetic is constrained by limited precision

Bit patterns have no inherent meaning but standards do exist

• Two’s complement and IEEE 754 floating point

Computer instructions determine “meaning” of the bit patterns

Performance and accuracy are important so there are many complexities in real machines (i.e., algorithms and implementation)

We designed an ALU to carry out four function

Multiplication

• Unsigned, Signed, Signed using Booth’s encoding, and Carry save adders and their use

Division

Booth's Algorithm - Multiplication & Division

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