basic Real Time Arbitrary Generator with Dynamic Memory

Real-Time Arbitrary Generator

• By: Jonathan CohenItamar Friedman

• Instructor: Michael Yampolsky

• At the High Speed Digital System Lab

Our System – Reminder:

Real-Time Arbitrary Generator

DSP RTAG D/A

• We make a sample wave on PC, store it on our board, and on trigger we produce the wave through D/A

Final Presentation

Presentation main topics:• General:

• Goals• Final System Overview

• System Analysis:• Measurements demonstration• Results

• Conclusions

Real-Time Arbitrary Generator

Goals:

• Our main Goal – Part A:

POC – basic Arbitrary Generator based on Dynamic Memory

– Part B:

• Real Time: Simultaneously I/O• System Analysis

Real-Time Arbitrary Generator

RTAG

System Overview:

Real-Time Arbitrary Generator

PC - “DSP”C++ ProgramWave Maker

PCGidel Board

ControllerController

MCMC FIFOFIFO

DACPLLPLL

RegDACRegDAC

Data path

Control path

Controller1Controller1

FIFO1FIFO1

PLL1PLL1

Super CNTRLSuper CNTRL

System Analysis:

How did we perform the System Analysis?

Real-Time Arbitrary Generator

System Analysis:• Step 1: Selecting properties in GUI & Code:

Real-Time Arbitrary Generator

System Analysis:• Step 2: SignalTap - General View:• Example: Sin(500KHz), Continuous Mode

Real-Time Arbitrary Generator

To DAC

Real-Time Arbitrary Generator

• 1Cycle=300Ticks of 150MHz clk 500KHz• Utilization of memory

From Memory

To DAC

System Analysis:• Step 2: SignalTap - Measurement:• Example: Sin(500KHz), Continuous Mode

System Analysis:• We worked with Triangular & Sin , But any wave(vector) could be uploaded by the DSP.• Triangular(61.7KHz): SignalTap -

Real-Time Arbitrary Generator

System Analysis:

Results

Real-Time Arbitrary Generator

System Analysis:• MainClock = 100MHz

Real-Time Arbitrary Generator

System Analysis:

Real-Time Arbitrary Generator

• 500[KHz] sin, 100points, MainClock = 100MHz :

System Analysis:• (500[KHz] sin, 100points)=50MSPS, delta(FIFO_Indexes) = 100 :

Real-Time Arbitrary Generator

System Analysis:• MainClock = 100MHz, 500[KHz] sin, delta(FIFO_Indexes) = 100 :

Real-Time Arbitrary Generator

Conclusions:• The goal has been achieved:

• Arbitrary Generator could be based on Dynamic Memory• Using single DDR2 180MHz can easily produce 50MSPS DAC streaming(we got to 90MSPS, and it could get better)

• The Hardware supports any kind of wave built by the software.

Real-Time Arbitrary Generator

Conclusions:• In our Architecture, the Precision Resolution and the Frequency Range of the wave is determined by the quality of the PLL and Size of our Memory on Board.• The Major problem: using very short waves at very high sampling rate (Example: 100MHz main clk, 90MHz Sampling, 200 points)

Real-Time Arbitrary Generator

What Next? (future projects)

• Memory Controller• One Board (with PLLs, DAC, …)• Improving Architecture by adding local buffer for short waves

Real-Time Arbitrary Generator

That’s all folks:

• Real Time Arbitrary Generator with dynamic memory

• Jony & Ita , Michael.Y.• HS-DSL: Spring 2009, Winter 2010

Real-Time Arbitrary Generator