Application of 21Z and 87L in 1half CB

8/9/2019 Application of 21Z and 87L in 1half CB

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Abstract Line protection in breaker-and-a-half configurationsrequires main protection functions to respond to the sum of thetwo currents. This concerns many protection functions particu-larly when sensitive settings are applied and/or significant Ctsaturation occurs. If the remote system is relatively weak, thecurrent supplied through the line towards a close-in reverse faulton the breaker-and-a-half terminal may be overwritten with aspurious current produced by saturated Cts. This may affect di-rectionality and impact not only fast and sensitive ground protec-tion functions used by pilot-aided schemes, but also distance, andcurrent differential protection elements. This paper addresses theproblem by providing practical solutions for ground directionalovercurrent, distance and differential functions. A new design forthe digital line current differential relay is presented. The relay iscapable of protecting three-terminal applications with each ter-minal fed from up to four currents.

Index Terms breaker-and-a-half, current transformer satura-tion, digital line current differential protection, distance protec-tion, integrated bus and line protection, transmission lines.

I. I NTRODUCTION

AST practice with respect to protecting line terminals ar-ranged as breaker-and-a-half is to sum up the two currents

externally and feed single-input distance or line differentialrelays with the total current flowing into the protected line.Breaker failure functionality requires monitoring the twobreakers and currents separately and is typically implementedoutside of the main protection relay. Reclosing and synchro-check functions require monitoring and controlling bothbreakers independently, as well as measuring two pairs ofvoltages for the synchrocheck purpose, are also in majorityof cases implemented outside of the main line protectiondevice.

With the breaker failure, reclosing and synchrocheck func-tions performed in a separate device (a breaker controller),application of the main line protection for the breaker-and-a-

half is treated with no major differences compared to singlebreaker configurations.

Fed with externally added currents (Fig.1a) the line differ-ential relay produces a restraint signal as per its design equa-tions, preferably applying some countermeasures for the Ctsaturation problem, all based on the summation of the two lo-

cal currents. Because the relay does not respond to the indi-vidual currents, but to the sum of thereof, a combination ofrestrained and unrestrained differential principles is effec-tively applied, and as such may face stability problems. Forexample, with weak feed from the remote terminal(-s), and alarge through fault current along the breaker-and-a-half con-nection, Ct saturation errors would manifest themselves as aspurious differential current while relatively small restraintwould be produced from the low remote-end currents (highthrough-breaker current not seen by the relay, low through-line current seen by the relay as depicted in Fig.1b).

This problem does not exist in single breaker applications(Fig.1c). With the line current measured directly in single-breaker applications there is no danger of producing a largeerror signal even if the line Ct saturates.

The problem in the breaker-and-a-half arrangements dem-onstrates not only under severe Ct saturation, but could be-come significant under relatively small Ct errors, includinglinear errors related to the accuracy class. As long as thethrough current of the line is considerably higher compared

Application of Distance and Line Current DifferentialRelays in Breaker-and-a-Half Configurations

B. Kasztenny, Senior Member, IEEE , and I. Voloh, Member, IEEE

P (a)DISTANCE /

DIFFERENTIALDISTANCE /

DIFFERENTIALCOMMUNICATIONCHANNEL

(b)

CT-1

CT-2 R e

l a y

M e a s u r e m e n

t

(c)

CT-1 + CT-2 is the linecurrent only if the CTs areaccurate

This measurement is notaffected by the largethrough current

Fig.1. Breaker-and-a-half arr angement: external Ct summation (a), throughfault under weak remote and strong local systems (b), through fault in a

single-breaker application (c).

B. Kasztenny is with General Electric, Ontario, Canada(e-mail: [email protected]).I. Voloh is with General Electric, Ontario, Canada(e-mail: [email protected]).

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with the error current produced by the Cts, there is no dangerof the Ct error signals overriding the actual through line cur-rent. When the error current is comparable with the throughcurrent, the protection system is in danger of misoperation.The through current could be low for long lines and/or whenthe remote system is relatively weak. The current flowingalong the breaker-and-a-half path is controlled by the short-circuit level of the local system alone. With the local terminal

strong, and the remote terminal weak, any relay could bebrought to its design limits by saturating the Cts in thebreaker-and-a-half path.

Distance relays are also exposed to this problem. Duringclose in reverse faults, the voltage is depressed to very lowlevels, and stability of the relay is maintained by the direc-tional supervision alone. If, under such circumstances, Ct thatcarries the current away from the terminal saturates (CT-1 inFig.1b), the error current appears in the direction of the line.With enough error current, the through line current becomesoverridden, and the true reverse direction may get reversed asseen by the relay. As a result, with the voltage depressed and

the current elevated and flowing spuriously in the forward di-rection, distance functions may pickup inadvertently. This in-cludes a directly tripping underreaching zone 1, as well as anoverreaching zone 2 typically used by tele-protectionschemes. In both cases, a false trip could occur. Current-reversal logic, application of a blocking or hybrid permissiveschemes, or similar approaches, may enhance the perform-ance and solve the problem partially. These approaches, how-ever, often rely on a reverse-looking distance zone 4. The lat-ter may spuriously drop out when the effective current getsinverted from the true reverse to a false forward direction dueto Ct errors. Extending the blocking action by using timers isa crude solution, but will jeopardize dependability and speedof operation on evolving external-to-internal faults.

Ground directional overcurrent functions, neutral andnegative-sequence specifically being both fast and sensitive are good supplements enhancing performance of tele-protection schemes [1]. They, however, face similar securityproblems in the breaker-and-a-half applications. With refer-

ence to Fig.2 consider a close-in external line-to-line fault.Now performance of all four Cts (A1, A2, B1 and B2) affectsthe neutral current. With any of the Cts saturating, a spuriousneutral current will be created. There is no real neutral currentthrough the line for this type of fault. Therefore, the operatingsignal for the Neutral Directional Overcurrent function is en-tirely driven by Ct errors. The remote terminal will see thefault via its distance function and key permission to trip,

unless separate pilot channels are used to key from distanceand ground directional functions. Combined with the spuriousoperation of the neutral directional function at the local termi-nal, the received permission would cause a false trip. Three-phase symmetrical faults affect both negative-sequence andneutral functions in a similar manner.

This paper addresses issues related to distance, ground di-rectional and differential functions under Ct saturation inbreaker-and-a-half applications, and is organized as follows.Section II outlines the overall application of the main protec-tion, breaker failure, autoreclose and synchrocheck functionsfor two breakers in a single device. Section III introduces sim-

ple supervision logic for ensuring stability of distance, differ-ential and ground directional functions in the breaker-and-a-half arrangement. Section IV presents a new design principlefor a line current differential relay with multiple current inputsat each terminal of the line.

II. B REAKER -AND -A-HALF TERMINAL PROTECTED ANDCONTROLLED FROM A SINGLE IED

Modern line protection relays (Intelligent ElectronicDevices, IEDs) allow for protection and control of thebreaker-and-a-half arrangement from a single IED.Application of separate breaker failure and/or synchrocheck

relays is no longer dictated by limitations of the mainprotection relay, but driven by application philosophy toeither combine the required functions for cost benefit, or tokeep them separate for dependability.

With reference to Fig.3, a modern IED supporting thebreaker-and-a-half scheme supports two three-phase currentinputs in order to measure both the currents individually for

DISTANCE / DIFFERENTIAL

CT-1

CT-2

A B C

INEUTRAL = 0

Fig.2. Possibility of spurious neutral or negative-sequence currents in the

breaker-and-a-half application.

C B - 1

C B - 2

CT-1

CT-2

VT-1

VT-2

VT

(1 )

(1 )

(3 )

25(1)

25(2)

50BF

50BF

21 87

79(1)

79(2)

CLOSE

CLOSE

TRIP/STATUS

TRIP/STATUS

LINE PROTECTIONIED

Fig.3. Breaker-and-a-half terminal protected and controlled from a singleIED.

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the breaker failure protection (50BF), backup overcurrentprotection (51P), and associated metering functions. The twocurrents are added in software to become a logical input forthe main protection functions of the line: distance (21) or linedifferential (87L) in particular, as well as for the linemetering.

The IED must support one three-phase voltage inputrequired for the main protection, and at least two single-phase

voltage inputs in order to accomplish the synchrocheckfunctionality (25) for both the breakers. A dual-breakerautorecloser (79) typically capable of reclosing the breakerssimultaneously, or sequentially, with the ability to cover out-of-service conditions for any of the two breakers, completesthe application. A suite of backup and auxiliary functions aretypically attached to the voltages and the three currents(breaker 1, breaker 2, line).

Modern IED such as [2] are designed to support enough acinputs (at least 5 voltages, and 6 currents), digital inputs(breaker status, external breaker fail initiate, etc.) and outputcontacts (per pole trip for both breakers, reclose per breaker,

breaker fail re-trip and trip, etc.) to facilitate protection andcontrol of a breaker-and-a-half terminal from a single IED.These devices shall be designed and configured to cope

with the problems outlined in Section I, particularily inapplications with long lines and/or weak remote systems.

III. S UPERVISORY LOGIC TO COPE WITH CT ERRORS

This section outlines a simple supervisory logic to ensuresecurity of the main protection during through current condi-tions on the breaker-and-a-half path with weak feed throughthe line. The logic can be programmed from a number of stan-dard Instantaneous Overcurrent elements (IOCs) and Phase

Directional (Ph Dir) elements of the relay.The logic has been developed to meet the following re-quirements: The supervision should not penalize speed of response to

internal faults (trip time) or sensitivity of the relay tohigh-resistance internal faults. Therefore the permissionto trip should be given all the time unless a through faultcondition is detected.

Permission to trip should be maintained during transitionfrom load conditions, possibly a reverse load, to internalfaults.

The supervision should allow the relay to trip an evolving

external-to-internal fault, in particular with both faultspresent at the same time, i.e. before the external fault iscleared by the associated protection system.

The supervision should respond to elevated phase cur-rents as the high phase currents cause Ct errors and thelatter could jeopardize security of the line protection.

The supervision shall be easily applied to distance, differ-ential, and overcurrent directional functions, includingthe negative-sequence and neutral directional overcurrentelements.

A. Protection Elements Used by the Supervisory Logic

With reference to Figures 3 and 4 the following elementsare required: Phase IOC 1 directionalized as forward to respond to

forward current of CT-1. The element shall be set at 2-3times the nominal rating of CT-1, and is used to unblockthe relay on external-to-internal evolving faults.

Phase IOC2 directionalized as reverse to respond toelevated current of CT-1. Set at 1.5-2 times the nominalof CT-1 and used to supervise the blocking action.

Phase PHS DIR 1 to respond to reverse current in CT-1. Phase IOC3 similar to IOC1, but for CT-2. Phase IOC4 similar to IOC2, but for CT-2. Phase PHS DIR 2 similar to PHS DIR 1, but for CT-2.

The directional functions in one particular application [2]use quadrature polarization with memory action, if required.

B. The Supervisory Logic

With reference to Fig.4, forward and reverse direction in-dications are derived for both the breakers.

A reverse direction for CB-1 (Fig.4b) is declared if bothcurrents are elevated (IOC2 and IOC4) and the directionalelement sees a reverse direction (PHS DIR 1 BLK). Similarlogic is implemented for CB-2, and phases B and C. The re-verse direction flags will be asserted only if elevated current isflowing through the breaker-and-a-half path, and the directionis reverse in one of the legs.

A forward direction for CB-1 (Fig.4a) is declared if thecurrent is elevated in the CB-1 leg and appears in the forwarddirection. Declaration of the forward direction is not impactedby the situation in the second leg of the path. Similar logic isimplemented for CB-2, and phases B and C.

As shown in Fig.4c, the blocking action is established ifPHASE IOC1 A PKP

PHS DIR1 A BLK A N D

BKR 1 A FWD

PHASE IOC2 A PKP

PHS DIR1 A BLK

A N D

BKR 1 A REVPHASE IOC4 A PKP

(a)

BKR 1 A REV

BKR 1 B REV

BKR 1 C REV

BKR 2 A REV

BKR 2 B REV

BKR 2 C REV

BKR 1 A FWD

BKR 2 A REV A N D

BKR 1 B FWD

BKR 2 B REV A N D

BKR 1 C FWD

BKR 2 C REV A N D

BKR 2 A FWD

BKR 1 A REV A N D

BKR 2 B FWD

BKR 1 B REV A N D

BKR 2 C FWD

BKR 1 C REV A N D

O R

0.25 cycle

0 cycle

A N D

CT SAT SUPV0.75 cycle

2.5 cycle

O R

O R

(c)

(b)

Fig.4. Supervisory Logic To Cope with Ct Errors in the Breaker-and-a-HalfConfiguration.

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any of the three phases shows a through current flowing out-side either through CB-1 or CB-2.

For security if lasts for 0.75 of a cycle, the blocking actiongets artificially extended for extra 2.5 cycles (switch off tran-sient logic to cope with clearance of the external fault).

The blocking action gets cancelled if any of the currents iselevated, appears in the forward direction, and is not accom-panied by the reverse direction in the associated leg of the

breaker-and-a-half arrangement. A 0.25 cycle delay is addedfor security.

C. Performance Analysis and Explanation

During load conditions (current below some 1.5 times Ctnominal) none of the IOCs is picked up and the trip permis-sion is asserted permanently.

During internal fault conditions with very weak feed fromthe breaker-and-a-half terminal, the current is not elevatedand may appear in the reverse direction as dominated by theload permission is maintained as none of the IOCs picks up.

During regular internal faults, none of the directional ele-ments operates in the reverse direction, and the trip permis-sion is maintained.

During external faults with one breaker opened, the block-ing action is not established, but it is not needed either.

During external faults with both breakers closed, theblocking action is established as long as both the currentsflowing through the breakers are above the pickup of IOC2and IOC4.

During evolving external-to-internal faults in differentphases, the blocking action is first established (say, phase A),and then canceled when the second fault appears in the for-ward direction in a different phase (say, phase B).

The output flag, CT SAT SUPV of Fig.4c, shall be used tosupervise distance and ground directional functions of a dis-tance relay, and the differential function of a line current dif-ferential relay, if required.

D. Transient Response Examples

Fig.5 presents an external fault example. The trip supervi-

sion is removed in 0.5 of a power cycle when using one par-ticular IED to implement the logic of Fig.4c [1].

Fig.6 shows an evolving fault example. The trip supervi-sion is removed in 1 cycle after the external fault, but is givenin 0.75 of a cycle after the fault evolves into internal.

IV. L INE DIFFERENTIAL ALGORITHM

This section presents a description of a line current differ-ential algorithm based on the original idea [2-3], but extendedto breaker-and-a-half-applications.

Concept [2-3] has been originally implemented for a sin-gle-breaker arrangement. In such an application, each relay[2] sends phasors of local current in all three-phases calcu-lated using a half-cycle estimator (6 numbers) as well as dy-

namic terms used for adaptive restraint (3 numbers). Some ex-tra data is appended to this core of the packet such as relayID, direct I/Os for teleprotection, time stamps to facilitatesynchronization with the use of the ping-pong algorithm [3],GPS-driven time stamps to facilitate channel asymmetry com-pensation [4], CRC-check, etc.

The presented solution targets communications channels of64kbps. The baud-rate of the channel imposes certain limita-tion for the packet size. Application in breaker-and-a-halfconfigurations calls for producing a proper restraining signalout of all the currents of the zone. For example, in three-terminal applications with each of the terminals beingbreaker-and-a-half, 6 three-phase currents surround the linedifferential zone. Exchanging all these currents between theterminals would increase the packet size.

The following design targets have been stated: The packet size should remain unchanged. A total of 9

numbers must represent currents at each terminal interms of phasors and dynamic restraint factors.

Window resizing shall be applied for fast relay operation. Proper restraint shall be produced to secure the differen-

tial system on external faults through the breaker-and-a-half connection.

Fig.5. External Fault Example.External phase-to-phase fault causes enough Ct error to operate spuriouslythe Neutral Directional OC function. The Ct supervisory logic blocks in 0.5

cycle.

Fig.6. External-to-Internal Evolving Fault Example.The relay trips single-pole the correct phase despite the pre-existing external

fault. The Ct supervisory logic unblocks in 0.75 of a cycle.

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Up to four currents could be used at each terminal in or-der to facilitate combined bus and line protection forsmall buses and mashed corners.

Backwards compatibility shall be maintained if the relayis applied in a single breaker configuration.

The following subsections address the above constraints.

A. Phasor Estimation

The input currents are sampled at 64 samples per cycle andpre-filtered using an optimized MIMIC filter aimed at remov-ing dc component(-s) and other low-frequency oscillations.The optimized filter is a Finite Response Filter (FIR) with thewindow length of approximately 1/3 rd of a power system cy-cle.

The digitally pre-filtered currents are converted intophasors by applying half-cycle Fourier algorithm. The half-cycle values are either used as calculated, or two consecutivehalf-cycle measurements are combined into an equivalent full-cycle measurement. The operation of switching from full- tohalf-cycle is referred to as window resizing and is imple-

mented to speed up operation of the relay. The differentialsystem transmits half-cycle values, and the resizing is doneindependently at each terminal of the line.

Half-cycle magnitudes are also calculated and transmittedin order to reflect properly through fault conditions at eachterminal of the line.

In addition a goodness of fit factor is calculated for eachcurrent in order to measure the error between the waveformand its Fourier estimated phasor [2]. The goodness of fit fac-tor is further used to produce an extra restraint to counter-measure the estimation error, and increase security of the re-lay. Conceptually, the goodness of fit factor is proportional to

the following value:21

0)()()()(

2cos

=

+= N

nk k nk k N

n X x

(1)

In equation (1), the present magnitude and phase estimate( X, ) at the k -th sample is compared with the actual wave-form ( x ) over the duration of the data window ( N ), and thesum of squares error measure is calculated.

B. Consolidating Local Currents the Outgoing Packet

Each terminal of the current differential system consoli-dates the local signals into an outgoing packet. Compressionof information takes place in order to reduce the packet sizeand distribute the calculations between the two or three relaysof the line current differential system. This is possible withoutcompromising operating equations or accuracy if the operat-ing equations are shaped accordingly.

First, the phasors (real, imaginary) of all the local currentsare summated to give a sub-sum of the total differential cur-rent of the protected line:

...__2__1__ ++= A RE A RE A RE LOC I I I (2)

Equation (2) is applied to up to four local current inputs

and holds true for both real and imaginary parts, in all threephases.

Second, the measure of a restraining fault current is esti-mated locally using magnitudes of all the local currents viathe following equation:

( ) ( ) ( )( ,...,max 2__22__12__ A MAG A MAG ATRAD LOC I I I = (3)

Equation (3) selects, on a per phase basis, the largestamong the local currents to be a measure of local restraint.Fig.7 illustrates the principles behind equations (2) and (3).

Third, the protection system applies differential character-istic locally to each of the restraining currents. The presentedsystem does not use an explicit restraining characteristic, butthe total operating and restraining value [2-3]. The latter in-corporates values of the pickup, slopes ( S 1, S 2) and breakpoint( B). The following equations are used to accommodate thecharacteristic: In two-terminal applications:If ( ) 22__ B I ATRAD LOC < Then (4a)( ) ( ) ( )2__212___ 2 ATRAD LOC ATRAD REST LOC I S I = Else (4b)( ) ( ) ( ) ( )( ) ( )21222__222___ 22 BS BS I S I ATRAD LOC ATRAD REST LOC += In three-terminal applications:If ( ) 22__ B I ATRAD LOC < Then (4c)

( ) ( ) ( )2__212___ 34

ATRAD LOC ATRAD REST LOC I S I =

Else (4d)( ) ( ) ( ) ( )( ) ( )21222__222___ 3

434

BS BS I S I ATRAD LOC ATRAD REST LOC +=

(a)

I 1 I 2 I 3 I 4

I 1+I 2+I 3+I 4 L I N E

(b)

I 1 I 2 I 3 I 4

I 4 = I 1+I 2+I 3In the worst-case, with norestraint from the remote

terminal, the maximum localcurrent (most likely the fault

current) becomes therestraint

Fig.7. The differential current is created from sums of all the local currents(a). The restraining current is created based on the maximum local current

(b). The latter is an external fault current in the worst-case scenario with nofeed through the line.

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The adaptive portion of the restraint is a geometrical sumof errors derived from eq. (1) and a measure of the clock syn-chronization error [2-3]. The traditional and adaptive re-straints are combined geometrically using a concept of an ex-tra arbitrary multiplier:

( ) ( )2__2_____ A ADA LOC A ATRAD REST LOC A RESTRIANT LOC I MULT I I += (5)

The multiplier increases the impact of signal distortions onthe restraint, and is used to provide better restraint during Ctsaturation conditions on through faults.

Values defined by equations (1-5) are based on half-cyclewindows, and constitute the following outgoing packet:

,...,,,,, ____________ C IM LOC B IM LOC A IM LOC C RE LOC B RE LOC A RE LOC I I I I I I

C RESTRIANT LOC B RESTRIANT LOC A RESTRIANT LOC I I I ______ ,, (6)

C. Total Differential and Restraint Currents

The local and remote data when received are used to calcu-late the total differential and restraining signals for the currentdifferential system.

Before the data is used, a decision is made to either use thefull- or half-cycle measurements. The half-cycle data is usedone time after detecting a fault. After such half-cycle windowis used, the relay switches back to the full-cycle version whenproceeding into the fault. Also, when a packet is lost, the nextpacket that arrives triggers window resizing. This is simply toenable protection using the latest packet even though the pre-vious packet required to calculate the full-cycle quantities islost.

The following equations are used to combine the half-cyclevalues into full-cycle measurements:

)(__)(_____ 5.0 previous A RE LOC present A RE LOC A RE PHASOR LOC I I I += (7a)

( ) ( ) ( )2)(__2)(__2___ 5.0 previous A RESTRAINT LOC present A RESTRAINT LOC A RESTRAINT PHASOR LOC I I I +=

(7b)

Equation (7a) is accurate; equation (7b) is a good ap-proximation. Equations (7) apply to both local and remotesignals, all three phases, and real and imaginary parts.

Next, the relay calculates the total differential and restraintcurrents:

A RE PHASOR REM A RE PHASOR REM A RE PHASOR LOC A RE DIFF I I I I ___2___1_____ ++=

(8a)( ) ( ) ( )...2___12___2_ ++= A RESTRAINT PHASOR REM A RESTRAIN T PHASOR LOC A REST I I I

( )2___2... A RESTRAINT PHASOR REM I + (8b)

And applies the severity equation in order to decide if theline should not should not be tripped offline [2-3]:

( ) ( )2_22_ A REST A DIFF A I P I S += (9)

Positive values of the fault severity, S , cause the relay to

operate. P is the pickup of the characteristic (the slopes andbreakpoints were already accommodated before sending thedata in equations (4)). As indicated by all the equations, thealgorithm is fully phase-segregated.

D. Ct Saturation Detection

The algorithm has a built-in immunity to saturated Cts ow-ing to the concept of the dynamic restraint. The goodness of

fit (1) becomes degraded on saturated Cts, producing a meas-ure of error (1), which added to the restraining signal allowsfor extra security.

In order to boost this natural effect, the system is using anadaptive multiplier in order to increase further the impact ofthe dynamic portion of the restraint (5) on the overall per-formance of the relay.

The multiplier is calculated adaptively per phase as fol-lows:

( ) A A A MULT MULT MULT 21 ,max= (10)

The first component is based on local currents only, and as

such is instantaneous. This component is meant to detectthrough fault condition on the path of the breaker-and-a-halfarrangement.

The second component is based on local and remote cur-rents, and as such is lagging the real time by the channel time.Input signals for this component are taken from the alignmenttable, which aligns instantaneous local values with delayedremote values. This component is meant to detect throughfault conditions between terminals of the line.

The first multiplier is calculated as follows:Step 1. Select the greatest current from the local currents.

The selection is based on half-cycle magnitudes: I 1_MAG ,I2_MAG , I 3_MAG , I 4_MAG . Assume the largest current is in the k -thcircuit (k = 1,2,3 or 4).

Step 2. Calculate two auxiliary currents:

RE k RE X I I __ = (11a)

IM k IM X I I __ = (11b)

RE X RE RE RE RE RE Y I I I I I I __4_3_2_1_ +++= (11c)

IM X IM IM IM IM IM Y I I I I I I __4_3_2_1_ +++= (11d)

The X-current is the maximum current among the localcurrents. The Y-current is the sum of all the local currents butthe maximum current. Note that during through faults with nofeed from the remote terminals I X = -I Y if no Ct saturation.With Ct saturation the currents differ, but remain approxi-mately out of phase.

Step 3. Calculate the multiplier as follows:

If pu I pu I Y X 3&3 >> (12a)

then If ( )( ) oY X I I angleabs 90, > (12b)then ( )( )

oY X I I angleabs MULT

180

5,:= (12c)

else 1:= MULT (12d)else 1:= MULT (12e)

Equations (12) check if both currents (the maximum

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among the local currents, and the sum of all the other localcurrents) are large enough to cause significant Ct saturation.If so, the relative direction of the two currents is checked. Ifthe angle is less than 90 degrees, the multiplier stays at theregular value 1.00. If the angle is larger than 90 degrees, themultiplier is proportional to the angle difference and couldreach the maximum value of 5.00 if the currents are exactlyout of phase.

The second multiplier is calculated applying exactly thesame procedure, but instead of using local currents, the pro-cedure uses the sum of the local currents, and the remote cur-rents. In other words the currents into the line at leach of upto three terminals of the line, regardless of the number of lo-cal currents at each terminal of the line. The second multiplierdetects through fault conditions of the entire line.

Fig.8 illustrates application of the new algorithm underthrough fault conditions. In this example the traditional re-straint of 15pu, is additionally augmented by adding the dy-namic factor. The dynamic restraint is naturally increased bysaturated Ct, and artificially multiplied by the multiplier. In

this example, the T3 terminal sees Ct saturation in the leg car-rying the current out of the line toward the fault. This Ct satu-ration will jeopardize stability of all terminals. However, allterminals will use high values of the multiplier to boost the ef-fect of dynamic restraint, and will not misoperate.

V. C ONCLUSIONS

This paper presents practical application solutions for pro-tection of lines in breaker-and-a-half applications. A simplelogic that could be implemented on modern line relays is pre-sented to ensure security under Ct saturation during throughfaults on the breaker-and-a-half path.

A novel line current differential system is described suit-able not only for breaker-and-a-half applications, but also forapplications with up to four local inputs at each of the up tothree terminals of the line. The solution is designed to pro-duce correct restraining signal as per principle of differentialprotection without sending all the raw local currents betweenall terminals of the line. The solution incorporates Ct satura-tion detection, charging current compensation and zero-sequence removal for application on tapped lines with powertransformers [5].

The described algorithm is implemented on commerciallyavailable relay [2] with thousands of unit-years of field ex-perience.

VI. R EFERENCES [1] B.Kasztenny, D.Sharples, B.Campbell, M.Pozzuoli, Fast Ground Direc-

tional Overcurrent Protection Limitations and Solutions, in Proc. 27th Annual Western Protective Relay Conference , Spokane, WA, October 24-26, 2000.

[2] A.Adamiak, G.Alexander, W.Premerlani, A New Approach to CurrentDifferential Protection for Transmission Lines, in Proc. Electric Councilof New England Protective Relaying Committee Meeting , Portsmounth,NH, October 22-23, 1998.

[3] M.Adamiak, G.Alexander, W.Premerlani, E.Saulnier, B.Yazici, DigitalCurrent Differential System, U.S. Patent 5 809 045, Sep.15, 1998.

[4] G.Brunello, I.Voloh, I.Hall, J.Fitch, Current Differential Relaying Cop-ing with Communications Channel Asymmetry, in Proc. 8th Develop-ments in Power System Protection Conference , Amsterdam, April 5-8,2004, pp.821-4.

[5] B.Kasztenny, B.Campbell, Improved Line Current Differential ProtectiveRelaying Method and Relay for in-Zone Tapped Transformers, U.S. Pat-ent 6 829 544, Dec.7, 2004.

VII. B IOGRAPHIES Bogdan Kasztenny (M94, SM97) holds a posi-tion of a Protection and System Engineering Man-ager for the protective relaying business of GeneralElectric. Prior to joining GE in 1999, he workedfor Wroclaw University of Technology, TexasA&M University, and Southern Illinois University.

Bogdan received his Ph.D. degree from the Wro-claw University of Technology, Poland. Bogdanauthored more than 140 papers, and is the inventorof several patents. In 1997, he was awarded a pres-tigious Senior Fulbright Fellowship. In 2004 Bog-dan received GEs Thomas Edison Award for in-

novation.

Ilia Voloh (M99) received his Electrical Engineerdegree from Ivanovo State Power University, So-viet Union. He then was for many years withMoldova Power Company in various progressiveroles in Protection and Control field. Currently heis an Application Engineer with GE Multilin. Hisareas of interest are current differential relaying,phase comparison, distance relaying and advancedcommunications for protective relaying.

2 p u

This CT should carry 19pu.For illustration 15pu isassumed to reflect CTsaturation error causing aspurious differential currentof 4 pu.

4 p u

5 p u

2 p u

T1

6 pu -15 pu

T2

T3

I LOC = 6 pu I LOC = 7 pu

I L O C

= - 9 p u

I TRAD = 4 pu I TRAD = 5 pu

I T R A D

= 1 5 p u

(a)

2 p u

All three terminals apply themultiplier of 5 to furtherincrease the traditionalrestraint driven by the localvalue of 15pu at T3

4 p u

5 p u

2 p u

T1

6 pu -15 pu

T2

T3

6 pu 7 pu

- 9 p u

(b)

M1 = 1 (2pu vs 4pu)M2 = 5 (6+7pu vs -9pu)M = max(1,5) = 5

M1 = 1 (2pu vs 5pu)M2 = 5 (7+6pu vs -9pu)M = max(1,5) = 5

M1 = 5 (6pu vs - 15pu)M2 = 5 (-9pu vs 6+7pu)M = max(5,5) = 5

Fig.8. An example of calculating the restraints (a) and multipliers for Ctsaturation algorithm (b).

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Application of 21Z and 87L in 1half CB

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