7323057-EC-2-Lab-Manual

VSA GROUP OF INSTITUTIONS

VSA GROUP OF INSTITUTIONSVSA SCHOOL OF ENGINEERING

SALEM

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

Name: ………………………………........ Reg. No. : ………................

Class: ………………………………. Semester: …………………

Subject: ……………………………. Sub. Code:………………

Compiled by

Ms.A.Maragathamani, Lect/ECE

Department Of ECE 1


Department Of ECE 2


INDEX

EXP.No DATE NAME OF THE EXPERIMENTS PAGE NO. MARKS STAFF SIGN.

Department Of ECE 3


Department Of ECE 4


EX.NO: 1 SERIES AND SHUNT FEEDBACK AMPLIFIERSDATE:

AIM:(i)To design and construct the Voltage Shunt feedback amplifier and to obtain its frequency response curve for with and without feedback.(ii)To design and construct the Current Series feedback amplifier and to obtain its frequency response curve for with and without feedback.

(i) VOLTAGE SHUNT FEEDBACK AMPLIFIER

APPARATUS REQUIRED:

S.No Components Range Quantity

1. Transistor BC107 1

2. Resistor 600Ω,4KΩ,4.7KΩ,10KΩ 1

3. Function Generator - 1

4. Cathode Ray Oscilloscope - 1

5. Regulated Power Supply (0-30)V 1

6. Probe - 2

7. Connecting wires - -

8. Bread Board - 1

Department Of ECE 5


PIN CONFIGURATION: SYMBOL:

BC107

E

C

B

CIRCUIT DIAGRAM:(i) Without Feedback

B C 1 0 7

R c4 k

R e

R 1

R 21 0 k

R s

6 0 0 R L

4 . 7 k

C i

C o

C e

V C C = 1 0 V

F G

CRO

0

Department Of ECE 6


DESIGN:Given

ii) With Feedback

Department Of ECE 7


B C 1 0 7

R c4 k

R e

R 1

R 21 0 k

R s

6 0 0 R L

4 . 7 k

C i

C o

C e

V C C = 1 0 V

F G

CRO

0

R f

6 8 k

C f

TABULATION:

(ii) CURRENT SERIES FEEDBACK AMPLIFIER

APPARATUS REQUIRED:

Department Of ECE 8

S.No.

With FB With out FB

Frequency (Hz)

Output Voltage (Volts)

Gain = 20log(Vo/Vi) (dB)

Frequency (Hz)


Gain = 20log(Vo/Vi)(dB)


S.No Components Range Quantity1. Transistor BC107 1

2. Resistor 600Ω,4.7KΩ,10KΩ 1




6. Probe - 2


8. Bread Board - 1


Department Of ECE 9


BC107

E

C

B

CIRCUIT DIAGRAM:(i)Without Feedback

B C 1 0 7

R c

R e

R 11 0 k

R 2

R S

6 0 0R L4 . 7 k

C i

C o

C e

V C C =1 0 V

0

F G

CRO

DESIGN:

Department Of ECE 10


Given

(ii) With Feedback



B C 1 0 7

R c

R e

R 11 0 k

R 2

R S

6 0 0R L4 . 7 k

C i

C o

V C C =1 0 V

0

F G

CRO

TABULATION:

(ii) CURRENT SERIES FEEDBACK AMPLIFIER Vi = Volts

S.No.

With FB Without FB

Frequency (Hz)


Gain = 20log(Vo/Vi) (dB)

Frequency (Hz)


Gain = 20log(Vo/Vi)(dB)

PROCEDURE



1. Connections are given as per the circuit diagram.2. Apply 10V dc supply to the collector and base of transistors.3. Set the I/P voltage using Function generator and vary the frequency in desired range.4. For each frequency note down the corresponding O/P voltage values.5. Repeat the same procedure for with feedback amplifier circuit.

6. Graphs are plotted as gain versus frequency for the tabulated readings.

MODEL GRAPH:



f1’ f1 f2 f2

’

Frequency (Hz)


X

With out FB

With FB

3dB

3dB

Gain (dB) Ao

0.707Ao

Y

Ao’

0.707Ao’


RESULT



VIVA:

1. What is Feedback? What are its types?

2. Which type of FB is used in amplifiers?

3. Give any 4 merits of negative FB?

4. Define desensitivity.

5. What do you meant by Sampling and mixing in the context of FB amplifiers?

Ex. No: 2 HARTLEY AND COLPITTS OSCILLATORS



DATE:

AIM:(i)To design and construct a Hartley oscillator circuit to generate a sine

waveform.(ii) To design and construct a Colpitts oscillator circuit to generate a sine

waveform.

(i) HARTLEY OSCILLATOR

APPARATUS REQUIRED:

S.No Components Range Quantity1. Transistor BC548 1

2. Resistor 390Ω,270KΩ 1

3. Capacitor 1nF,0.02µF,0.1µF,47µF 1

4. Radio Frequency Choke 30mH 1



7. Probe - 2


9. Bread Board - 1

DESIGN:




BC548

E

C

B

CIRCUIT DIAGRAM:


0

B C 5 4 8

R e3 9 0

R b

2 7 0 k

C

0 . 0 2 u F

C i

4 7 u F

C e

0 . 1 u F C o1 n

R F C3 0 m H

1

2

L 1

1

2

L 2

1

2

V C C =1 0 V

0

CRO


PROCEDURE:1. Connections are given as per the circuit diagram.2. Switch on the dc power supply and apply 10V as bias voltage.3. Sine wave output is obtained and the readings are tabulated.4. Graph is plotted by taking time period along X-axis and voltage along Y-

axis.



(ii) COLPITTS OSCILLATOR

APPARATUS REQUIRED:

S.No Components Range Quantity1. Transistor BC107 12. Resistor 2.2KΩ,100KΩ

47KΩ12

3. Capacitor 0.02µF, 0.1µF,0.2µF, 10µF

12

4. Cathode Ray Oscilloscope - 15. Regulated Power Supply (0-30)V 16. Probe - 27. Connecting wires - -8. Bread Board - 1

PROCEDURE:

1. Connections are given as per the circuit diagram.2. Switch on the dc power supply and apply 12V as bias voltage.3. Sine wave output is obtained and the readings are tabulated.4. Graph is plotted by taking time period along X-axis and voltage along Y-axis.




BC107

E

C

B

DESIGN:

CIRCUIT DIAGRAM:

B C 1 0 7

R e2 . 2 k

R 1

1 0 0 k

V C C =1 2 V

0

CRO

R c4 7 k

R 24 7 k

C e1 0 u F

C o

1 0 u FC i

0 . 1 u F

C 1

0 . 2 u F

C 2

0 . 0 2 u F

L1 2

0



MODEL GRAPH:

TABULATION:

S.NoType

Amplitude Time period

Unit Volts ms

1. Hartley oscillator

2. Colpitts oscillator

VIVA:1.State Barkhausen criterion.2.What is the use of RFC?3.How do Hartley differ from Colpitts oscillator?4.Give the frequency range of Hartley and Colpitts oscillator.



RESULT:



Ex. No: 3 RC PHASE SHIFT AND WIEN BRIDGE OSCILLATORSDATE:

AIM:(i)To design and construct a RC phase shift oscillator circuit to generate a

sine waveform.

(ii) To design and construct a Wien bridge oscillator circuit to generate a

sine waveform.

(i) RC PHASE SHIFT OSCILLATOR

APPARATUS REQUIRED:

S.No Components Range Quantity1. Transistor BC107 12. Resistor 10KΩ 33. Capacitor 10µF

47µF21

4. Cathode Ray Oscilloscope - 15. Regulated Power Supply (0-30)V 16. Probe - 27. Connecting wires - -8. Bread Board - 1




BC107

E

C

B

CIRCUIT DIAGRAM:



0

B C 1 0 7

R e

R 1

C i

1 0 u F

V C C =1 2 V

0

CROR 2

R

1 0 k

C C C

R1 0 k

R1 0 k

R c

0

C e

4 7 u F

C o

1 0 u F

DESIGN:



MODEL GRAPH:

Model Calculation



(ii) WIEN BRIDGE OSCILLATOR

APPARATUS REQUIRED:



2. Resistor 2.2KΩ,47KΩ,300KΩ

4.6KΩ,41KΩ,100KΩ

1

2

3. Capacitor 1nF,

10µF

2

3



6. Probe - 2




8. Bread Board - 1


BC107

E

C

B

DESIGN:

CIRCUIT DIAGRAM:



B C 1 0 7 B C 1 0 7

R c 14 . 6 k R c 2

4 . 6 k

R e 14 7 k

R e 22 . 2 k

R 11 0 0 k

R 24 1 k

R 31 0 0 k

R 44 1 k

R R3 0 0 k

R

C1 n

C1 n

C 0 1

1 0 u F

C o 2

1 0 u F

C e1 0 u F

V C C =1 2 V

0

CRO

TABULATION:

S.No Type Amplitude(Volts) Time period(ms)

1. RC phase shift oscillator

2. Wien bridge oscillator

MODEL GRAPH:



PROCEDURE:

1. Connections are given as per the circuit diagram.

2. Switch on the dc power supply and apply 12V as bias voltage.

3. Sine wave output is obtained and the readings are tabulated.

4. Graph is plotted by taking time period along X-axis and voltage along Y-

axis.



VIVA:

1.Why do we call Wienbridge oscillator as lead-lag circuit oscillator?

2.Why 3 RC networks in cascaded connection are in RC phase shift oscillator?

3.What are the advantages & disadvantages of RC phase shift oscillator?

RESULT:



EX.NO:4 SIMULATION OF BUTTERWORTH SECOND ORDER LOW DATE: PASS FILTER

AIM:

To design and construct a second order Butterworth low pass filter having

upper cutoff frequency 1KHz and to create a PSpice model and simulate to

determine its frequency response.



SOFTWARE REQUIRED:

PSPICE OrCAD 10.3

SYMBOL:

7 4 1

+3

-2

V +7

V -4

O U T6

O S 11

O S 25Non-Inverting

I/P

Inverting I/P

O/P

PIN DIAGRAM:



CIRCUIT DIAGRAM:

DESIGN:

PROCEDURE:



1. We are using Pspice evaluation package and Vdc as input source.

2. Select Program OrCAD 10.3 Capture click to get the component file.

3. To create the lowpass filter circuit we require Opamp(741),Vdc , ground

terminals,resistors,capacitors and external a.c input signal.

4. Select the parts one by one and place them in the work area.

5. Arrange the parts and make connections using wire.

6. Save the circuit as file.

7. Click Pspice before which place the voltage marker at the i/p and o/p sides.

8. Click Pspice New simulation profile open analysis setup time

domain analysis change Run to time give O.K.

9. Open Pspice create Netlist to make sure that there are no wiring errors.

10.If there is no error, then open Pspice click Run click Plot add plot

to window Cut and paste the waveforms.

VIVA:

1. What is the expansion of Pspice?

2. Differentiate active filter and passive filter.

3. Give the important features of IC 741.

4. Define cut-off frequency and bandwidth.

RESULT



Ex.No:5 SIMULATION OF DIFFERENTIAL AMPLIFIERDATE:

AIM:To design and construct a differential amplifier in both common and

differential modes and create a PSpice model to simulate in both modes.

SOFTWARE REQUIRED:

PSPICE OrCAD 10.3



SYMBOL:

Q2N2222

E

B

C

DESIGN:

Vcc=12v , IE=1mA , VEE= -12V

Assume Ad=150 , VBE = 0.7V

RE=[VEE - VBE)] / IE

re=26mV/IE

Ad=Rc/re; Rc=Adre

CIRCUIT DIAGRAM:

(i)Common Mode



ii) Differential Mode

PROCEDURE:


2. Select Program OrCAD 10.3 Capture click on file new project

click to get the component file.



3. To draw the circuit we require transistors ( 2N2222),Vdc , ground

terminals,resistors and external a.c input signal.



6. The parts attributes are changed by giving double click on the label then

enter the new value.


8. Click Pspice before which place the differential voltage marker at the o/p

side and voltage marker at the input side.



10.Open Pspice create Netlist to make sure that there are no wiring errors.

11.If there is no error, then open Pspice click Run click Plot add plot to

window Cut and paste the waveforms.

12.The same procedure is repeated for differential mode of operation.

VIVA:

1. Define CMRR.

2. Give some applications of differential amplifier.

3. What are the ideal characteristics of differential amplifier

RESULT:



EX.NO:6 SIMULATIONS OF ASTABLE AND MONOSTABLE DATE: MULTIVIBRATORS

AIM:To create a PSpice model and to simulate Astable and Monostable multivibrators.



SOFTWARE REQUIRED:

PSICE OrCAD 10.3

PIN DIAGRAM:

CIRCUIT DIAGRAM:

(i)Astable Multivibrator



X1

5 5 5 D

GN

D1

TR I G G E R2

O U TP U T3

R E S E T4

C O N TR O L5

TH R E S H O L D6

D I S C H A R G E7

VC

C8

V 15 v 0

R 1

3 . 6 k

R 27 . 2 k

C 10 . 1 u F

0

0

C 2

0 . 0 1 u F

O/P

(ii) Monostable Multivibrator

X2

5 5 5 D

GN

D1

TR I G G E R2

O U TP U T3

R E S E T4

C O N TR O L5

TH R E S H O L D6

D I S C H A R G E7

VC

C8

V 25 v 0

R 31 0 k

C 30 . 1 u F

0 0C 4

0 . 0 1 u F

Trigger I/P

O/P

PROCEDURE:




2. Select Program OrCAD 10.3 Capture click on file new project

click to get the component file.

3. To draw the circuit we require IC 555, Vdc, ground terminals, resistors,

capacitors.



6. The parts attributes are changed by giving double click on the label then

enter the new value.


8. Click Pspice before which place the voltage marker at the input side and

output side.



10.Open Pspice create Netlist to make sure that there are no wiring errors.

11.If there is no error, then open Pspice click Run click Plot add plot to

window Cut and paste the waveforms.

12.The same procedure is repeated for monostable multivibrator.

RESULT:



EX.NO: 7 TUNED CLASS C AMPLIFIER

DATE:

AIM:



To design and construct a tuned Class C amplifier circuit and to obtain its

frequency response.

APPARATUS REQUIRED:



2. Capacitor 1nF,0.1F

220F

1

2




6. Probe - 2


8. Bread Board - 1




BC107

E

C

B

CIRCUIT DIAGRAM:

B C 1 0 7

R 1

R 2 R e

L

1

2

C1 n F

C i

2 2 0 u F

C e2 2 0 u F

V C C =1 0 V

F G

CRO

0

C o

0 . 1 u F

DESIGN:



Given

MODEL GRAPH:



TABULATION:Vi = Volts

S.No Frequency Output Voltage Gain = 20log(Vo/Vi)

Unit Hz Volts dB

PROCEDURE:




2. Apply 10V dc supply to the collector and base of transistors.

3. Set the I/P voltage using Function generator and vary the frequency in

desired

range.

4. For each frequency note down the corresponding O/P voltage values.

5. Graphs are plotted as gain versus frequency for the tabulated readings.

VIVA:

1. What is Class C operation?

2. Define tank circuit.

3. Give some applications of tuned Class C amplifier.

4. What is the difference b/w Class C and Class D operation?

RESULT:



EX.NO: 8 ASTABLE, MONOSTABLE AND BISTABLE MULTIVIBRATORSDATE:

AIM:



(i) To design and construct an astable multivibrator and to obtain its

waveform.

(ii)To design and construct a monostable multivibrator with a pulsewidth of

0.1ms using transistor.

(iii) To design and construct a bistable multivibrator with a frequency of

2 KHz and to obtain its performance curve.(i) ASTABLE MULTIVIBRATOR

APPARATUS REQUIRED:



2. Capacitor 1nF 2



5. Probe - 2


7. Bread Board - 1

DESIGN:Given




BC548

E

C

B

CIRCUIT DIAGRAM:

B C 5 4 8 B C 5 4 8

0

R c 1R c 2R 1 R 2

C 1

1n F

C 2

1 n F

V C C =1 0 V

O/P O/PVc2Vc1

MODEL GRAPH:




t (ms)

t (ms)

t (ms)

t (ms)

Vc1

(V)

Vc2

(V)

VB1

(V)

VB2

(V)

O/P across C1

O/P across C2

O/P across B1

O/P across B2


PROCEDURE:



3. O/P is taken from collector and base of each transistor.

4. Readings are noted and tabulated.

5. Graph is drawn for timeperiod versus amplitude.



(ii) MONOSTABLE MULTIVIBRATOR

APPARATUS REQUIRED:


1. Transistor SL100 2

2. Diode 1N4007 1

3. Capacitor 1nF 1




7. Probe - 2


9. Bread Board - 1





A K A K

1N4007

CIRCUIT DIAGRAM:



S L 1 0 0 S L 1 0 0

R e

0

R c 1 R c 2

C

C sR B

R 2

R 1

0 D 1 I N 4 0 0 7

C c C d

0 . 0 0 1 u F

V C C =1 2 V

R d

Trigger I/P

DESIGN:Given



MODEL GRAPH:

(iii)


t(ms)

t(ms)

Vin

(V)

Vo

(V)

Trigger I/P

O/P across C


(iv) BISTABLE MULTIVIBRATOR

APPARATUS REQUIRED:


1. Transistor SL100 2

2. Diode 1N4007 3




6. Probe - 2


8. Bread Board - 1

DESIGN:Given




A K A K

1N4007

CIRCUIT DIAGRAM:



MODEL GRAPH:



TABULATION:

S.No Amplitude Time periodUnit Volts ms

1.AstableMV

Across C1

Across C2

Across B1

Across B2

2.Monostable MV

Trigger I/P

O/P

3.Bistable MV

Trigger I/P

Across C1

Across C2

PROCEDURE:





3. Set the trigger I/P voltage using Function generator.

4. O/P is taken from collector of each transistor.





VIVA:

1. What is the difference b/w oscillator and multivibrator?

2. Define pulse width.

3. What do you mean by quasi stable state?

4. What is the use of speed-up capacitor?

5. Give some applications of bistable multivibrator.

6. Which type of feedback is used in multivibrators?

7. What is the difference b/w blocking oscillator and oscillator?

8. Give some applications of astable multivibrator.

9. Give some triggering methods of monostable multivibrator.

RESULT:



EX.NO: 9 INTEGRATOR, DIFFERENTIATOR, CLIPPERS AND

DATE CLAMPERS



AIM:(i) To design and construct differentiator and integrator circuits and to obtain

their output waveforms.

(ii) To construct biased positive and negative clipper circuits and to obtain

their output waveforms.

(iii) To construct and test the clamper circuit.

(i) INTEGRATOR & DIFFERENTIATOR

APPARATUS REQUIRED:


1. Capacitor 0.1F 1

2. Diode 1N4007 1



5. Probe - 2


7. Bread Board - 1

DESIGN:Given




A K A K

1N4007

PROCEDURE:




2. Set the i/p signal with the help of function generator.

3. O/P is taken from CRO.


5. Graph is drawn for time period versus amplitude.

CIRCUIT DIAGRAM:

(i) Differentiator Without Diode



R

C

0.1uF

1KHz

FG

0

CRO

(ii) Differentiator With Diode

R

C

0.1uF

1KHz

FG

0

CROD

1N4007

(iii) Integrator Without Diode

1KHz

FG

0

CROC

0.1uF

R

(iv) Integrator With Diode

1KHz

FG

0

CROD

1N4007C

0.1uF

R

MODEL GRAPH:(i) Differentiator I/P wave form



O/P wave form without Diode

O/P wave form with Diode

(ii) Integrator I/P wave form

O/P wave form without Diode

O/P wave form with Diode



(ii) CLIPPER



APPARATUS REQUIRED:


1. Diode 1N4007 1

2. Resistor 2.5KΩ 1




6. Probe - 2


8. Bread Board - 1

PROCEDURE:







A K A K

1N4007

CIRCUIT DIAGRAM:(i)Biased positive Clipper



1KHz

FG

0

CROD

1N4007

R

2.5K

2V

(ii) Biased negative Clipper

1KHz

FG

0

CRO

D

1N4007

R

2.5K

2V

MODEL GRAPH:(i)Biased positive Clipper



ii)Biased negative Clipper



(iii) CLAMPER



APPARATUS REQUIRED:


1. Diode 1N4007 1

2. Resistor 10KΩ 1

3. Capacitor 10F 1




7. Probe - 2


Bread Board - 1

PROCEDURE:





5. Graph is drawn for time period versus amplitude.




A K A K

1N4007

CIRCUIT DIAGRAM:(i) Positive Clamper

R

1KHz

FG

0

CRO

C

10uF

10KD

1N4007

(ii) Negative Clamper

R

1KHz

FG

0

CRO

C

10uF

D 10K

1N4007

MODEL GRAPH:



(i)Positive Clamper

(ii) Negative Clamper



TABULATION:

VIVA:


S.No Amplitude TimeperiodUnit Volts ms

1.DifferentiatorWithout diode

With diode

2.IntegratorWithout diode

With diode

3.Clipper+ ve clipper

- ve clipper

4.Clamper+ ve Clamper

- ve Clamper


1.If the I/P to the differentiator is cosine wave what is the O/P?

2.What do you mean by biased clipper?

3.What are the other names of clipper & clamper.

4. If the I/P to the integrator is square wave what is the O/P?

5. If the I/P to the integrator is step signal what is the O/P?

RESULT:



Ex.No:10 Simulation of CMOS Inverter, NAND and NOR gates



DATE:

AIM:To construct a CMOS inverter, NAND and NOR gates and to create their PSPICE model

to simulate them.

SOFTWARE REQUIRED:

PSPICE OrCAD 10.3

CIRCUIT DIAGRAM:



(i) INVERTER

M 1

M b re a k P

M 2

M b re a k N

V 13 . 3 V

0

00

V 2

TD = 0

TF = 1 n sP W = 1 0 0 u sP E R = 2 0 0 u s

V 1 = 0

TR = 1 n s

V 2 = 3 . 3 V

Vo

(ii) NAND



(iii) NOR



PROCEDURE:


2. Select Program OrCAD 10.3 Capture click to get the component file.

3. To create CMOS inverter circuit we require NMOS, PMOS, Vdc, ground

terminals and external a.c input signal.




7. Click Pspice before which place the voltage marker at the i/p and o/p sides.



9. Open Pspice create Netlist to make sure that there are no wiring errors.

10.If there is no error, then open Pspice click Run click Plot add plot

to window Cut and paste the waveforms.

11. The same procedure is repeated for simulation of NAND and NOR gates.

RESULT:


7323057-EC-2-Lab-Manual

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Transcript of 7323057-EC-2-Lab-Manual