62nd ECTC Advance Program

Sponsored by: Supported by:

On behalf of the Program Committee and Executive Committee, it is my pleasure to invite you to the 62nd Electronic Components and Technology Conference (ECTC) which will be held at the Sheraton San Diego Hotel and Marina, San Diego, Calif., from May 29 to June 1, 2012. This premier international conference is sponsored by the IEEE Components, Packaging and Manufacturing Technology Society (CPMT).

The ECTC Program Committee represents a wide range of disciplines and expertise from the electronics industry around the world. We have selected more than 300 high-quality papers to be presented at the conference in 36 oral sessions, four interactive presentation sessions and one student posters session. The 36 sessions run through the daytime and cover peer-reviewed papers on 3D/TSV, sensors and MEMS, embedded devices, LEDs, co-design, RF packaging, microfluidics and inkjet, in addition to conventional packaging topics such as advanced packaging technologies, all types and levels of interconnections, materials, assembly manufacturing, system packaging, optoelectronics, reliability, electronic components and simulation. The program committee strives to address new trends as well as ongoing technological issues. Four Interactive Presentation Sessions feature technical peer-reviewed presentations presented in a format that enhances and encourages interaction. One student poster session focuses on research conducted in the academia presented by the budding scientists. Authors from companies, research institutes, and universities from nearly 20 countries will present at the ECTC, making it a truly diverse and global conference.

In addition to the technical sessions that are held during the day, four panel sessions focusing on crucial topics presented by industry experts enhance the technical program. In the special session titled “Next Generation Packaging and Integration: The Transformed Role of the Packaging Foundry,” chair Raj Pendse will lead a panel of experts in discussing the increased level of integration in the changing industry landscape and what subcontracted assembly companies are doing to address the customer demand. This panel is intended to serve as an excellent roadmap review for the industry where significant portion relies on subcontracted assembly.

The Panel Discussion on Tuesday evening at 7:30pm, chaired by Rolf Aschenbrenner and Ricky Lee and titled “Power Electronics: A Booming Market,” will focus on power electronics from a packaging perspective. The Plenary Session on Wednesday at 7:00pm, chaired by Christopher Bower and titled “Photonics: Expanding Markets and Emerging Technologies” will unveil the less known world of photonics research and discuss how it can help improve the semiconductor revenues. Thursday evening starts with the Gala Reception at 6:30pm, followed by the CPMT Seminar

at 8:00pm, titled “Advanced Coreless Package Substrate and Material Technologies” and chaired by Kishio Yokouchi and Venky Sundaram.

The Professional Development Courses (PDC), organized by the PDC Committee chaired by Kitty Pearsall, will be taught on Tuesday, May 29 from 8:00am-5:30pm. World-class experts in their fields will offer 16 courses on different topics. Participants can catch up on new technology developments and broaden their technical knowledge base.

The technical program and professional development courses are supplemented by the Technology Corner Exhibits where leading companies, primarily in the electronics components, materials, and packaging fields exhibit their latest technologies and products. The exhibitors invite you to their reception on Wednesday at 5:30pm. Along with our receptions and coffee breaks every day, luncheons are another great opportunity to network and discuss technical and business matters. It is my pleasure to announce that Greg Bartlett, the CTO of GLOBALFOUNDRIES, is the invited keynote speaker at the ECTC Luncheon on Wednesday.

There will be more than I can explain at the ECTC. Whether you are a manager, engineer, executive or a student, I invite you to make attending the ECTC a top priority in 2012 in order to experience the exciting developments in electronic components and technology. I also would like to take this opportunity to thank our sponsors, exhibitors, authors and speakers, instructors, session chairs, committee members, and arrangement, finance, publication and publicity chairs, as well as all the volunteers for their support and hard work. I also thank all conference attendees in advance for making the 62nd ECTC a great success. I look forward to seeing you in beautiful San Diego from May 29 to June 1, 2012.

Senol PekinIntel Corporation62nd ECTC Program Chair

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IndexECTC Registration .......................................................................3, 29, 30General Information ...................................................................................3CPMT Seminar .............................................................................................4Special Session: Next Generation Packaging & Integration ..........42012 ECTC Panel Session ........................................................................42012 ECTC Plenary Session ....................................................................4ECTC Luncheon Keynote Speaker ........................................................5Luncheons and Receptions ......................................................................5Hotel Information ............................................................................... 3, 29Executive and Program Committees ..............................................6, 7Professional Development Courses .............................................. 8-13Area Attractions ....................................................................................... 13Program Sessions ...............................................................................14-282012 Technology Corner Exhibits ..................................................... 29Conference Overview ............................................................................ 31

The 62nd Electronic Components and Technology Conference (ECTC)

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Advance Registration

Online registration is available at www.ectc.net. For more information on registration rates, terms, and conditions see page 30.

To register in advance for the 62nd ECTC, your application and payment check/credit card information must be received no later than May 12, 2012.

Register early … save $100 or more! All applications received after May 12, 2012 will be considered Door Registrations. Those who register in advance can pick up their registration packets at the ECTC Registration Desk in the Bayview Foyer at the Sheraton San Diego Hotel and Marina.

Join IEEE and Save over $100 on ECTC Registration, $ 50 on Professional Courses – and Receive Free CPMT membership! Details on IEEE/CPMT membership can be found at www.ectc.net/registration.

Additional Advance Programs are available from:Eric Perfecto, Publicity Chair62nd Electronic Components & Technology ConferencePhone: +1-845-894-4400Email: [email protected]

On-Site Registration Schedule

Registration will be held in the Bayview Foyer at the Sheraton San Diego Hotel and Marina.

Monday, May 28, 2012 – 3:00PM to 5:00PM (PD Courses & Conference)

Tuesday, May 29, 2012 – 6:45AM to 8:00AM (AM PD Courses & OSAT Session Only)

Tuesday, May 29, 2012 – 11:00AM to 1:15PM (PM PD Courses Only)Tuesday, May 29, 2012 – 1:15PM to 5:00PM (Conference)Wednesday, May 30, 2012 – 6:45AM to 4:00PM Thursday, May 31, 2012 – 7:30AM to 4:00PMFriday, June 1, 2012 – 7:30AM to 12:00PM

General Information

Conference organizers reserve the right to cancel or change the program without prior notice. The Sheraton San Diego Hotel and Marina, as well as the ECTC, are both smoke-free environments.

Loss Due to Theft

Conference management is not responsible for loss or theft of personal belongings. Security for each individual’s belongings is the individual’s responsibility.

ECTC SponsorsWith 61 years of history and experience behind us, ECTC is recognized as the premier semiconductor packaging conference and offers an unparalleled opportunity to build relationships with more than 1,000 individuals and organizations committed to driving innovation in semiconductor packaging.

We have a limited number of sponsorship opportunities in a variety of packages to help you get your message out to attendees. These include Gala Sponsorships, Program Sponsorships and several other options that can be customized to your company’s interest.

If you would like to enhance your presence at ECTC and increase your impact with a sponsorship, please take a look at our sponsorship brochure on the website www.ectc.net under “Sponsors.”

To sign-up for sponsorship, or to get more details, please contact Wolfgang Sauter at [email protected] or +1-802-769-3634.

Hotel AccommodationsRooms for ECTC attendees have been reserved at the Sheraton San Diego Hotel and Marina. The special conference rate for a single/double occupancy room is:

$179.00 / night for Lanai Rooms$189.00 / night for Traditional Rooms$209.00 / night for Deluxe Rooms$239.00 / night for Club Rooms

Please note these rooms are on a first come, first served basis. If a specific category is no longer available, attendees will be offered the next best available. These prices include single or double occupancy in one room.

Room reservations must be made directly with the hotel by April 27, 2012 to ensure our preferred conference rate. All reservations made after the cut-off date of April 27, 2012 at 5pm PT will be accepted on a space and rate available basis. If you need to cancel a reservation, please do so AT LEAST 5 days before arrival for a full refund. In the event that you check into the Sheraton San Diego Hotel and Marina and check out prior to your scheduled check out date, you will be charged a $100 early departure fee. To avoid this fee, you must advise the hotel at or before check-in. (Check in time: 3pm; Check out time: 12 Noon)

Transportation ServicesEnjoy the free shuttle transportation, which runs every 15 minutes, between the East and West Towers, as well as the San Diego International Airport. Look for the gray, white and blue vans! For more information on special discounted, airport transportation rates for ECTC attendees, please visit www.ectc.net and click the transportation link.

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The above schedule for Tuesday will be rigorously enforced to prevent students from being late for their courses.

62nd

2012 ECTC Panel SessionPower Electronics – A Booming Market

Technology

Power electronics is the application of solid-state electronics for the control and conversion of electric power. In contrast to electronic systems concerned with transmission and processing of signals and data, in power electronics substantial amounts of electrical energy are processed. Therefore, the main metric of power electronics becomes the efficiency. Power electronics can be found wherever there is a need to modify a form of electrical energy (i.e. change its voltage, current or frequency). The power range of these energy converters is from some milliwatts (as in a mobile phone) to hundreds of megawatts (as in a HVDC transmission system). With classical electronics, electrical currents and voltage are used to carry information, whereas with power electronics, they carry power. In modern systems the energy conversion is performed with semiconductor switching devices such as diodes, thyristors and transistors. This is an emerging industry and there exists a booming market. People typically are curious about the following questions. How will the industry supply chain develop? What are the major directions for future innovation? How are the fruits of global research and development being implemented in domestic industry? What is the impact of emerging power electronics technologies on the world’s semiconductor industry? We have a distinguished panel of experts to provide answers.

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2012 ECTC Plenary Session

Technologies

Microfabricated photonic devices such as lasers, light-emitting diodes and light detectors are pervasive in modern society, and the associated technology and business opportunities appeared to be maturing during the last decade. However, over the past few years, new growth businesses, such as solid-state lighting, and new technologies, such as silicon photonics, have emerged and promise to make the next decade very exciting in the photonics arena. In this panel session, leading experts will discuss these developments with a special emphasis on device packaging challenges and opportunities. Solid-state lighting using high-brightness LEDs has the potential to dramatically lower our energy consumption while also providing a very long device lifetime. Experts will discuss the market for solid-state lighting and also look at how advanced wafer-level packaging technology will be required to meet the cost targets necessary for true market penetration. The new field of silicon photonics opens a technology platform to combine the large bandwidth capability of photonic devices with the advanced fabrication infrastructure associated with silicon integrated circuits. A panel of experts will present the latest technical advances in photonics along with the associated device packaging challenges and opportunities.

2012 Special Session

We are quite possibly in the midst of the most rapidly changing landscape in the history of the packaging industry - the increasing levels of integration and I/O density brought forth by new Si nodes are driving a change in the way packages are designed and built. The traditional approach of a substrate-based package comprising a die attached to a lead frame or laminate substrate is giving way to packaging at the wafer level and the Si level. Interconnections are changing form wire bond to flip chip and through Si vias (TSVs). The traditional boundaries and hand off points between the Si and the package are rapidly fading away. This presents many new challenges to the packaging industry from both a technology and business perspective. The nature of the knowhow and technology needed is changing and so is the capital intensity and sustainability of the business.

In this session, we are bringing together a group of packaging technology experts who also represent some of the world’s leading packaging business houses. These experts will present their respective views regarding the direction of packaging technology based on the trends in the end markets and end products and the manner in which the packaging business is responding to the changing landscape.

CPMT Seminar

and Material Technologies

In the last couple of years, Japanese electronics companies started to apply the coreless technology to ASICs for network /communication equipment and other products. Coreless package substrate technology is acknowledged to have advantages for improving electrical performance on high frequency and broader bandwidth signal transmission. Although it has several year volume production experiences, the industry has thus far found it difficult to ensure the quality of the technology on mass-production levels. In this seminar, the latest technical challenges on substrate materials, substrate processes, and assembly processes will be discussed.

1. Coreless Packaging Technology for High-performance Application Yuji Nishitani – Sony Corp

2. Characteristic of the Coreless Package and Next High Density Package Tanaka Kuniyuki – Shinko Electric Industries Co., Ltd.

3. Low Temperature Curable Polymer Dielectrics for Substrateless Package Takeshi Eriguchi – Asahi Glass Co., Ltd.

4. The Low Warpage Coreless Substrate for High Speed Large Size Die Packaging Masateru Koide – Fujitsu Advanced Technology, Ltd.

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General Chair’s Speakers Reception(by invitation only)

Host: Eric Perfecto – IBM Corporation

Students, have you ever wondered how the ECTC technical committees review and select papers? Or, just what subjects, content and paper organization make a standout ECTC paper? Then please come to the ECTC Student Reception. You’ll have a chance to enjoy some good food and meet with representatives of each technical subcommittee. Don’t miss this chance for an inside view of technical subcommittee operations. Sponsored by the IBM Corporation.

Exhibitor Reception

62nd ECTC Gala ReceptionThursday,

All badged attendees and their guests are invited to attend a reception hosted by Gala Reception sponsors.

The Electronic Components and Technology Conference will sponsor a luncheon on Tuesday, May 29, for all Professional Development Courses attendees.

The Electronic Components and Technology Conference will sponsor a luncheon on Wednesday, May 30, for conference attendees. The guest speaker will be Gregg Bartlett of GLOBALFOUNDRIES.

The IEEE Components, Packaging and Manufacturing Technology Society will sponsor a luncheon for conference attendees on Thursday, May 31.

The Program Chair will sponsor a luncheon for conference attendees on Friday, June 1.

ECTC Luncheon Keynote Speaker

Packaging Worlds

Gregg Bartlett is Chief Technology Officer at GLOBALFOUNDRIES. He is responsible for the company technology strategy, advanced node development, technology partnerships, and alliances. Gregg joined GLOBALFOUNDRIES in 2009 after a 25-year career in technical and management positions at Freescale Semiconductor and its predecessor, Motorola’s Semiconductor Products Sector.

Immediately prior to joining GLOBALFOUNDRIES, Gregg served as Vice President of Design Technology at Freescale, where he was responsible for design methodology and the creation of design IP and collateral for advanced solutions across high-performance networking, automotive, wireless and analog product markets.

He is a member of the board of directors of the Semiconductor Research Corporation, as well as various consortia governance committees. Gregg received his bachelor’s degree in chemical engineering from Kansas State University.

63rd Electronic Components and Technology Conference

The Cosmopolitan Hotel of Las VegasLas Vegas, NV USAMay 28 – 31, 2013

Mark Your Calendar NOW!

Since 1994, iNEMI (the International Electronics Manufacturing Initiative) has been developing a biennial technology roadmap spanning a 10-year horizon. In 2004, iNEMI expanded the initiative to proactively include global input. This year ECTC is hosting one of the several regional meetings intended to solicit input for the 2013 iNEMI Roadmap. Open to all conference attendees.

2012 ExecutiveCommitteeGeneral ChairDavid [email protected]+1-518-305-6317

Vice-General ChairWolfgang SauterIBM [email protected]+1-802-769-3634

Program ChairSenol PekinIntel [email protected]+1-480-552-4898

Assistant Program ChairBeth KeserQualcomm, [email protected]+1-858-658-3332

Jr. Past General ChairRajen DiasIntel [email protected]+1-480-554-5202

Sr. Past General ChairJean TrewhellaIBM [email protected]+1-845-894-3974

Exhibits ChairBill MoodyB. Moody & Associates, [email protected]+1-302-478-4143

Finance ChairPatrick ThompsonTexas Instruments, [email protected]+1-972-995-7660

Publications ChairSteve BezukQualcomm CDMA [email protected]+1-858-651-2770

Publicity ChairEric D. PerfectoIBM [email protected]+1-845-894-4400

Web AdministratorAlan HuffmanRTI [email protected]+1-919-248-9216

Professional DevelopmentCourses ChairKitty PearsallIBM [email protected]+1-512-286-7957

Arrangements ChairLisa RenziRenzi & Company, [email protected]+1-940-383-3059

CPMT RepresentativeC. P. WongGeorgia Institute of [email protected]+1-404-894-8391

2012 ProgramCommittee Advanced PackagingChairJoseph W. SoucyDraper [email protected]+1-617-258-2953

Assistant ChairRaj N. MasterMicrosoft [email protected]+1-650-693-0849

Daniel BaldwinEngent, Inc.

Charles BandaLaboratory for Physical Sciences

Rozalia BeicaLAM Research AG

Christopher BowerSemprius, Inc.

Paul M. HarveyIBM Corporation

Altaf HasanIntel Corporation

Erik JungFraunhofer IZM

Sam KarikalanBroadcom Corporation

Beth KeserQualcomm, Inc.

Young-Gon KimIDT

John KnickerbockerIBM Corporation

Jeffrey A. KnightElliot Manufacturing

John H. LauITRI

S. W. Ricky LeeHong Kong University of Science andTechnology

Luu T. NguyenTexas Instruments, Inc.

Raj PendseSTATS ChipPAC, Inc.

Sudipta K. RayIBM Corporation

Subhash L. ShindeSandia National Laboratory

E. Jan VardamanTechSearch International, Inc.

James Jian ZhangMicron Technology, Inc.

Applied ReliabilityChairKeith [email protected]+1-408-276-7193

Assistant ChairScott SavageMedtronic Microelectronics [email protected]+1-480-303-4749

Jo CaersRoyal Philips

Sridhar CanumallaMicrosoft Corporation

Harry K. CharlesThe Johns Hopkins University APL

Tim ChaudhryBroadcom Corporation

Darvin R. EdwardsTexas Instruments, Inc.

Deepak GoyalIntel Corporation

Vikas GuptaTexas Instruments, Inc.

Dongming HeQualcomm, Inc.

Donna M. NoctorSiemens Industry, Inc.

John H. L. PangNanyang Technological University

S.B. ParkBinghamton University

Lakshmi N. RamanathanMicrosoft Corporation

Ephraim SuhirUniversity of California, Santa Cruz

Jeffrey SuhlingAuburn University

Dongji XienVidia Corporation

Charles ZhangIntel Corporation

Assembly & ManufacturingTechnologyChairHirofumi NakajimaRenesas Electronics [email protected]+81-44-435-1137

Assistant ChairPaul [email protected]+1-678-990-3320 ext. 229

Sai AnkireddiIntersil, Inc.

Sharad BhattShanta Systems, Inc.

Claudius FegerIBM Corporation

Jerry LuIntel Corporation

Vijay KhannaIBM Corporation

Wayne KohPowertech Technology .Inc.

Choon Heung LeeAmkor Technology Korea

Mali MahalingamFreescale Semiconductor, Inc.

Debendra MallikIntel Corporation

Sylvain OuimetIBM Corporation

Kitty PearsallIBM Corporation

Sande Petty-WeeksSkyworks Solutions, Inc.

Tom PoulinAerie Engineering

Shichun QuNational Semiconductor Corporation

Shawn ShiMedtronic Corporation

Tom SwirbelMotorola, Inc.

Sean TooMicrosoft Corporation

Andy TsengAdvanced Semiconductor Engineering, Inc.

Shaw Fong WongIntel Corporation

Jie XueCisco Systems, Inc.

Jin YangIntel Corporation

Electronic Components & RFChairRockwell M. HsuWilinx [email protected]+1-480-838-7435

Assistant ChairManos M. TentzerisGeorgia Institute of [email protected]+1-404-385-6006

Amit P. AgrawalCisco Systems, Inc.

Eric BeyneIMEC

Prem ChahalMichigan State University

Craig GawFreescale Semiconductor, Inc.

Abhilash GoyalOracle

T. S. HorngNational Sun Yat-Sen University

C. P. HungAdvanced Semiconductor Engineering, Inc.

Lih-Tyng HwangNational Sun Yat-Sen University

Mahadevan K. IyerTexas Instruments, Inc.

Timothy G. LenihanTGL Consulting

Li LiFreescale Semiconductor, Inc.

Sebastian LiauITRI

Lianjun LiuEverspin Technologies

Albert LuSingapore Institute of ManufacturingTechnology

Nanju NaIBM Corporation

Andrea PaganiniIBM Corporation

Markondeya R. PulugurthaGeorgia Institute of Technology

Albert F. PuttlitzMechanical Eng. Consultant

Thomas G. Reynolds, IIIConsultant

Clemens RuppelEPCOS AG

Hideki SasakiRenesas Electronics Corporation

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Grit SommerInfineon Technologies AG

Frank TheunisEPCOS AG

Emerging TechnologiesChairKarlheinz BockUniversity of Berlin and Fraunhofer [email protected]+49-89-54759-506

Assistant ChairBernd K. AppeltASE, [email protected]+1-408-768-8533

Isaac Robin [email protected]

Vasudeva P. AtluriRenavitas Technologies

Mark BachmannUniversity of California, Irvine

John CunninghamOracle

Rabindra N. DasEndicott Interconnect Technologies,Inc.

Steve GreathousePlexus Corporation

Maria JoanaIBM Corporation

Goran MatijasevicUniversity of California, Irvine

Dave PeardHenkel Corporation

C. S. PremachandranGlobal Foundries Singapore Pte. Ltd.

Koneru RamakrishnaAnveshak Technology & KnowledgeSolutions

Nancy StoffelInfotonics Technology Center

Klaus Juergen WolterTechnische Universitaet Dresden

Enboa WuHong Kong Applied Science andTechnology Research Institute

Allison XiaoNational Starch and Chemical Company

InterconnectionsChairBernd EbersbergerIntel Mobile [email protected]+49-89-998853-53281

Assistant ChairGilles PouponCEA LETI - [email protected]+33-4-38-78-53-99

Flynn CarsonSTATS ChipPAC, Inc.

William ChenASE-US, Inc.

Rajen DiasIntel Corporation

Tom GregorichMediaTek

Alan HuffmanRTI International

Li LiCisco Systems, Inc.

Changqing LiuLoughborough University

Wei-Chung LoITRI

James LuRensselaer Polytechnic Institute

Voya MarkovichEndicott Interconnect Technologies, Inc.

David McCannGLOBALFOUNDRIES

James E. MorrisPortland State University

Lou NichollsAmkor Technology, Inc.

Prema PalaniappanTexas Instruments, Inc.

Senol PekinIntel Corporation

Wolfgang SauterIBM Corporation

Lei ShanIBM Corporation

Akitsu ShigetouNational Institute for Materials Science

Matthew YaoRockwell Collins

Materials & ProcessingChairChin C. LeeUniversity of California, [email protected]+1-949-824-7462

Assistant ChairDiptarka MajumdarSun Chemical [email protected]+1-201-933-4500 x1258

Rajen ChanchaniSandia National Laboratory

Choong Kooi CheeIntel Corporation

Tim ChenDarbond Electronic Materials Co., Ltd.

Bing DangIBM Corporation

Don FryeHenkel Corporation

Robert KaoTaiwan University

Dong Wook KimQualcomm

Yi-Shao LaiAdvanced Semiconductor Engineering, Inc.

Grace Yi LiIntel Corporation

Kwang-Lung LinNational Cheng Kung University

Daniel D. LuHenkel Corporation

Hongtao MaCisco Systems, Inc.

Mikel MillerDraper Laboratory

Kyung-Wook PaikKAIST

Stephanie PotisekDow Chemical

Yoichi TairaIBM Corporation

Quinn TongHenkel Corporation

Yutaka Tsukadai-PACKS

Lejun WangMedtronic, Inc.

Myung Jin YimQualcomm

Tieyu ZhengIntel Corporation

Modeling & SimulationChairBruce KimThe University of [email protected]+1-205-348-4972

Assistant ChairSuresh K. SitaramanGeorgia Institute of [email protected]+1-404-894-3405

Ramachandra AcharCarleton University

Daniel de AraujoNimbic, Inc.

Wenden BeyeneRambus

Henning BraunischIntel Corporation

Zhaoqing ChenIBM Corporation

L. J. ErnstDelft University of Technology

Xuejun FanLamar University

Pradeep LallAuburn University

Michael LamsonConsultant

Sheng LiuHuazhong University of Science andTechnology

Yong LiuFairchild Semiconductor Corporation

Erdogan MadenciUniversity of Arizona

Tony MakMiddlesex Community College

Gamal Refai-AhmedAMD, Inc.

Sandeep SaneIntel Corporation

Madhavan SwaminathanGeorgia Institute of Technology

Andrew A. O. TayNational University of Singapore

Jie-Hua ZhaoApple

OptoelectronicsChairAndrew [email protected]+1-818-393-7311

Assistant ChairHenning SchroederFraunhofer [email protected]+49-30-46403-277

Harry G. KellziTeledyne Microelectronic Technologies

Gee-Kung ChangGeorgia Institute of Technology

Fuad DoanyIBM Corporation

Kannan RajSun Labs, Oracle

Masanobu OkayasuOpnext

Masataka ItoIbiden USA R&D

Michael LeersFraunhofer ILT

Ping ZhouLDX Optronics, Inc.

Shogo UraKyoto Institute of Technology

Soon JangFiconTEC USA

Stefan WeissOclaro Switzerland AG

Yi-Jen ChanITRI

Z. Rena HuangRensselaer Polytechnic Institute

Interactive PresentationsChairNam PhamIBM [email protected]+1-512-286-8011

Assistant ChairMark PoliksEndicot Interconnect [email protected]+1-607-755-2064

Swapan BhattacharyaGeorgia Institute of Technology

Rao BondaAmkor Technology

Ibrahim GuvenUniversity of Arizona

Mark PoliksEndicott Interconnect Technologies, Inc.

Patrick ThompsonTexas Instruments, Inc.

Professional DevelopmentCoursesChairKitty PearsallIBM [email protected]+1-512-286-7957

Assistant ChairJeffrey SuhlingAuburn [email protected]+1-334-844-3332

Eddie KobedaIBM Corporation

Albert F. PuttlitzMechanical Eng. Consultant

IBM Corporation

This course covers the detailed material consid-erations required for achieving high reliability for lead-free solder joints. The reliability discussed in-cludes joint mechanical properties, development of type and extent of intermetallic compounds (IMC) under a variety of material combinations and aging conditions and how those IMCs affect the reliability. The failure modes, thermal cycling reliability, and fragility of solder joints as a func-tion of material combination, thermal history, and stress history will be addressed in detail, and novel alloys with reduced fragility will be presented. Electromigration, corrosion, and tin whisker growth will also be discussed. Further-more, the reliability of through-hole solder joints will be reviewed, and recommendations will be provided, particularly for thick boards. The em-phasis of this course is placed on the understand-ing of how the various factors contribute to the failure modes, and how to select proper solder alloys and surface finishes for achieving high reli-ability. Also presented are the desirable future alloys and fluxes in order to meet the challenge of miniaturization.

%� Implementation Status %� Prevailing Materials Alloys and Finishes %� Surface Finishes Issues of ENIG, Immersion Ag,

and Immersion Sn %� Mechanical Properties Shear, Pull, and Creep %� Intermetallic Compounds Effect of Cu, Ni,

Other Additives, and Heat History %� Failure Modes Grain Deterioration, Orienta-

tion, Mixed Alloys, and Interfacial Voiding %� Thermal Cycle Reliability Effect of Cycling

Condition, Surface Finishes, and Reflow Tem-perature

%� Reliability of Through-Hole Joints Large and Thick Boards, Partially Filled Through-hole

%� Fragility Effect of Surface Finishes, Alloys, Re-flow, Strain Rate, Aging, Cycling, and IMC

%� Electromigration Effect of Current Density, Back Stress, and Cu UBM Thickness

%� Corrosion SAC and Performance of Surface Finishes Under Harsh Conditions

%� Tin Whisker – Causes of Formation, Methods for Control

Anyone interested in achieving high reliability lead-free solder joints and who wants to know how to achieve it should take this course.

Modeling and simulation has become indispens-able to the development of new technologies and reliability evaluations in microelectronics packaging and microsystems. This course aims to give a state-of-the-art and in-depth coverage of the advances and applications in a broad range of modeling and simulation in IC packaging and microsystems: 1) diffusion type modeling, includ-ing heat conduction, moisture diffusion, chemical etching process, static electrical current flow, and mass diffusion in electromigration; 2) coupled and integrated multi-physics modeling techniques in temperature/humidity (such as reflow process and HAST condition), and thermal-electrical-me-chanical and mass diffusion in electromigration. 3) fracture mechanics and delamination modeling including damage mechanics approach; 4) fatigue/creep modeling with various creep model op-tions; and 5) dynamic modeling under drop/im-pact loading at component and system levels. The physics of modeling, the fundamental principles, and mathematical formulations are discussed, with the numerical implementation techniques using commercial finite element analysis code. Numerous practical skills and approaches for performing multi-physics modeling, non-linear modeling, dynamic modeling, and fracture me-chanics modeling will be described. The course uses many real case studies to demonstrate the applications of modeling together with experi-mental validations.

%� Introduction %� Physics of diffusion modeling: Heat conduction;

Chemical etching process applications in TSV formation modeling; Electrical current flow modeling application in electromigration; Mass diffusion in electromigration; Moisture diffusion.

%� Sequentially coupled multi-physics modeling: Electrical-thermal-mechanical modeling; Electri-cal-mass diffusion modeling in electromigration; Hygro-thermal-vapor pressure modeling in reflow and HAST.

%� Coupled multi-physics modeling: Hygro-ther-mal-vapor pressure modeling with damage me-chanics; Electrical-thermal-mechanical-vacancy diffusion modeling in electromigration.

%� Fracture mechanics and delamination modeling %� Fatigue/creep modeling %� Dynamic modeling under drop/impact loading %� Real case studies in each category above

The course is designed specifically for staff mem-bers, technical managers, design and reliability engineers, and students, who are involved with finite element modeling for design and reliability of electronic packaging or microsystems.

Wafer Level Chip Scale Packaging (WL-CSP) has gained so much success as a packaging form factor in the consumer arena in the past few years that it is almost considered as a technology commodity. It has been driven by needs for cost reduction, size shrinkage, and enhanced perfor-mance. This course will provide an overview of the WL-CSP technology. The market drivers, benefits, and challenges facing industry-wide adoption will be discussed. The current WL-CSP configurations will be reviewed in terms of their construction, manufacturing process, and published electrical and thermal performance, together with package and board level reliability. Since the technology marks the convergence of fab, assembly, and test, the course will also address some fundamental issues such as: 1. Does it fit best with front-end or back-end process-ing? 2. Will it be applicable and cost effective for memory and other complex devices such as ASICs and microprocessors? 3.Are the current standards for design rules, outline, and reliability applicable? 4. Extensions to higher pin count packages (>100) and other areas such as RF, imaging, sensors, and MEMS will be reviewed.

%� Wafer Level Chip Scale Packaging (WL-CSP) Definition

%� Market Drivers for WL-CSPs - Portable and Wearable

%� Cost and Benefits of WL-CSPs %� Barriers and Challenges for WL-CSPs %� Review of Current WL-CSPs in the Industry

(Bump on Pad, Bump on Polymer, Redistribu-tion with Al and and Cu, Fan-out Configura-tions)

%� Wafer Level Testing - Status and Challenges %� Infrastructure Service Providers - Bumping,

Turnkey Solutions, Market Shares %� Extension of WL-CSP Concept to other Appli-

cations (Medical, Automotive, Space, Sensors, Imaging, MEMS, LEDs)

%� Future Trends: Enhanced Lead-Free Solder Balls, Large Die Size, Wafer Level Underfill, Thin and Ultra Thin WL-CSP, Stacked WL-CSP, MCM in Reconstituted Wafers , Embedded Components, etc.

The course will be useful to the following three groups of engineers and scientists: 1. Newcomers to the field who would like to obtain a general overview of WL-CSP. 2. R&D practitioners who would like to learn new methods for solving CSP problems. 3.Those considering WL-CSP as an alternative for their interconnect systems.

8

This course is based on the author’s activity in 3D integration over the past seven years with leading companies in the industry, his weekly 3D blog Insights From the Leading Edge in Solid State Technology, the two-volume Wiley-VCH book Handbook of 3D IC Integration: Technology and Applications of 3D IC Circuits which the author authored and edited and the authors articles in Yoles i-Micronews entitled “A Closer Look.”The course will begin by defining and contrasting 3D Integration (thinning, bonding and TSV) to 3D packaging (thinning stacking and wire bonding to the BGA base). The various drivers for 3D integration including the electrical performance and economic issues will be examined. We will examine the various process sequences being proposed for 3D integration and the process unit operations necessary to fabricate a 3D stack. The processes sequences proposed by IDMs, Universities, and Institutes will be compared and contrasted. We will look at the first products going commercial in 2012. We will then examine the applications being commercialized by early and later adopters and the evolving infrastructure that will be necessary to accomplish this. The course examines the current state of 3D design and test and will end by looking the remaining technical and market barriers.

%� 3D packaging %� 3D IC Integration %� 3D definitions %� Economics of 3DIC vs continued scaling %� 3D processing and materials %� 3D processes going commercial %� 3D research at Univ., Institutes foundries and

IDMs %� 3DIC applications - CIS, memory, memory-on-

logic, logic %� Infrastructure development %� 3D design and test %� Remaining barriers %� Conclusions

The course will be aimed at technical person-nel wanting a status review of the subject and marketing/management personnel looking for a status report to help determine their position in the business food chain.

Polymers and nanocomposites are widely used in electronic and photonic packaging as

adhesives, encapsulants, insulators, dielectrics, molding compounds and conducting elements for interconnects. These materials also play a critical role in the recent advances of low-cost, high performance novel such as: No Flow Underfills, Reworkable Underfills for Ball Grid Array (BGA); Chip Scale Packaging (CSP); System in a Package (SIP); Direct Chip Attach (DCA); Flip-Chip (FC), Paper-thin IC and 3D Packaging; Conductive Adhesives (both ICA and ACA); Embedded Pas-sives (high K polymer composites); nano particles and nanofunctional materials such as CNTs; graphenes. It is imperative that both material sup-pliers, formulators and their users have a thor-ough understanding of polymeric materials and the recent advances on nano materials and their importance in the advances of the electronic packaging and interconnect technologies.

%� Fundamental of Polymers and Materials Science and Engineering

%� Materials Needs for Next Generation Elec-tronic Packaging

%� Novel Nanocomposites for Flip-chip Underfill Applications

%� Recent advances on Nano Lead-free Alloys for High Performance Components Interconnects

%� Low-cost High Performance Lead-free Inter-connect Materials and Processes

%� Recent Advances on CNTs as Thermal Inter-face Materials (TIMs)

%� Lotus Effect Coating for Self-cleaning Applica-tions

%� Fundamentals of Electrically Conductive Adhe-sives (ECAs)

%� Recent Advances in Conductive Adhesives and Conductive Inks

%� Recent Advances in nano-conductive Adhe-sives

Engineers, scientists and managers involved in the design, process and manufacturing of IC electronic components and hybrid packaging, electronic material suppliers involved in materi-als manufacturing and research & development should attend. electronic material suppliers involved in materials manufacturing and research & development should attend.

Analog and power electronic packaging are the fastest growing segments and wide applications in the electronic industry due to the rapid advances in integrated circuit (IC) fabrication and the demands of a growing market in almost all areas of electronic application such as consumer elec-tronics, home electronics, computing electronics, automotive, railway and high/ power industry. However, due to the intrinsic structural nature, the requirement for analog and power product and its reliability is extremely high. This course

will present a state-of-art and in-depth overview of recent advances in analog and power elec-tronic packaging. A review of recent advances in analog and power electronic packaging and modeling is presented based on the develop-ment of analog IC and power device integration. The short course will cover in more detail how advances in both semiconductor analog and power advanced package design and materials have co-enabled significant advances in analog and power device capability during recent years. Along with new packaging development, the role of modeling is a key to assure successful package design. An overview of the analog and power package modeling is also presented. Challenges of analog and power semiconductor packaging in both next generation design and modeling are presented and discussed.

%� Challenges of Analog and Power Electronic Packaging

%� Analog Packaging Overall Trends %� Trends of Discrete Power MOSFET Packaging %� Trends of Power IC Packaging Design %� Integration of Analog and Power IC, SiP and

SOC development %� Trends of power electronic packaging and

power module development %� Trends of mixed Analog and Power SiP/Hybrid

SiP/3D/Stack/Embedded Packaging %� Trends of analog and power packaging model-

ing %� Modeling methodologies development and

challenges %� Modeling in typical analog and power packaging

assembly process %� Modeling for analog and power packaging typi-

cal reliability and tests %� Summary

The course is designed for staff members, technical managers, design and manufacturing personnel, packaging and reliability engineers in microelectronics industry and power electronics companies. Although the course covers most recent advances in this area, the course does not assume prior knowledge of these issues and hence is of interest for both experts and new actors in this area. It is also good for universities professors, staff and students for further study and discussion.

The objective of this course is to provide an overview of the fundamentals of mechanics and reliability and how they can be integrated to per-form knowledge based package risk assessment. This is a methodology that uses the knowledge of the field environment and empirical models to perform quality and reliability assessment and

9

leverages mechanics to proactively assess the impact of geometry, material choices. The course will start with the introduction of the key ele-ments of reliability assessment like use conditions, accelerated/ life tests, methods of statistical data analysis, acceleration factor models for different failure mechanisms, use of statistics to project reliability performance at use conditions. It will also highlight the main components of mechan-ics like stress-strain curves, characterization of material behavior, stress analysis methods and fundamentals of fracture mechanics. The course will then introduce the methodology for using mechanics for effective reliability assessment. The concepts of design for reliability and experiment planning supporting the methodology will be dis-cussed. Comprehensive case studies highlighting different package risk areas will be introduced to showcase the application of methodology to real examples. In class reliability statistics/ mechanics based assessment exercises will help students practice skills. Target audience: engineers working on packaging, reliability, and materials.

%� Introduction to reliability%� Key components of reliability / reliability

statistics%� Introduction to mechanics%� Key components of mechanics%� Overview of the reliability assessment method-

ology using mechanics%� Comprehensive case studies highlighting differ-

ent package risk areas%� In class reliability statistics/ mechanics based

assessment exercises%� Summary of key learning elements

Engineers working on Packaging, Reliability, and Materials.

Novel electronic packages and system-integration concepts are continuously being developed to meet the ever-increasing demand for low-cost and high-Performance systems. To ensure high-speed signal transmission, all interconnections in these packages must be capable of support-ing broadband signals without degrading signal integrity beyond acceptable limits. Furthermore, the choice of the right packaging material for interposers/boards plays a crucial role in the cost and performance of the entire system. The objective of this course is to provide and illustrate methods for efficient high-frequency modeling and optimization of interconnections in electronic packaging, considering signal integrity and electromagnetic interference effects in differ-ent packaging materials.

Introduction The course will also cover in detail the follow-ing areas: Integration technologies in electronic packaging; High-frequency design challenges “ Ma-terials for advanced packaging (laminates, silicon, ceramics and glass) “ Illustration of methods for modeling and optimization of planar interconnec-tions; Impedance-controlled transmission-lines in different packaging materials; Impact of process tolerances; Reduction of parasitics “ Illustration of methods for modeling and optimization of verti-cal interconnections; Bond wires (wedge/wedge and ball/wedge); Vias in multilayered substrates considering geometrical/return-path discontinui-ties Through Silicon Vias (TSVs) in low, medium and high-resistivity silicon; and the Reduction of parasitics “ Comparison of the performances of interconnections in different packaging materials.

%� Interconnections at different packaging levels (chip-to-interposer, within the interposer and interposer-to-board)

%� Materials for advanced packaging (laminates, silicon, ceramics and glass)

%� Methods for high-frequency modeling/op-timization of impedance-controlled planar interconnections considering tolerances

%� Illustration of methods using transmission-lines on laminates, silicon and glass

%� In-depth study of vertical interconnections (examples: bond wires and vias)

%� Modeling and optimization of wedge/wedge and ball/wedge bond-wires considering cop-per/gold/aluminum wires

%� Methods for modeling and optimization of vias considering geometrical/return-path disconti-nuities

%� Illustration of methods using vias in laminates, silicon and glass

%� Methods for modeling/optimization of TSVs for 3D-chip integration and interposers

%� Illustration of methods considering TSVs in low, medium and high-resistivity silicon

%� Illustration of methods to predict cut-off-fre-quency of propagation modes in TSVs

%� Illustration of methods to quantify impact of modes on TSV performance

%� Discussion of new concepts/structures for reducing TSV losses in low-resistivity silicon

%� Comparison of performances of interconnects in different packaging materials

Engineers, researchers, designers and technical managers involved in the process of electrical modeling/layouts/design/integration of electronic packages, printed circuit boards and interconnec-tions in different packaging technologies (ceramic, glass, silicon and laminates)

The technical course will provide an overview of the failure modes and mechanisms observed in the plastic packages. A brief introduction to the methodology of failure analysis of these packages will be described. Emphasis will be paid to the tools and techniques currently used and the future direction for the tools and techniques required for successful and timely failure analysis of next generation package technologies. A discussion on the strategies for use of these tech-niques and a flow chart for failure analysis will be included.

%� Package Technology Trends, Drivers & Chal-lenges

%� Failure analysis challenges offered by package technology roadmap

%� Overview of the failure modes and mecha-nisms observed in the organic packages

%� Introduction to the methodology of failure analysis of organic packages

%� Typical Failure analysis flow charts for opens and shorts

%� Failure analysis case studies will be presented %� Current Analytical Capabilities for Package Fault

Isolation and Failure Analysis %� Strategies to use these techniques to identify

failures and understand failure mechanisms %� Analytical Capabilities to support next genera-

tion packaging technologies

Engineers and technical managers who are involved in package technology development, reli-ability assessment of packages and failure analysis.

The continued miniaturization of high perfor-mance solid-state electronics, the emergence of 3D packaging and chip stack technology, and the maturation of wide band gap microwave devices have made near-junction thermal transport a requisite part of any successful thermal packag-ing strategy. While conventional, remote cooling techniques are incapable of targeting the often-dominant, on-chip temperature rise, high-conduc-tivity substrates, microfluidics, and thermoelectric techniques can be used to suppress the genera-tion of on-chip hot spots. However, successful implementation of near-junction techniques

10

It is extremely important to registerin advance to prevent delays atdoor registration. Course sizes

are limited.

IC wafer. In W2W 3D, different systems are first fabricated independently and then stacked and interconnected vertically. This course will discuss all these technologies, with emphasis on advances of Through-Strata-Vias (TSVs) technologies, 3D platforms and potential applications. A particular focus will be on various TSV fabrication/pro-cessing methods and applications, with relevant critical issues addressed, such as TSV processing, alignment, bonding, wafer thinning and handling for C2C, C2W and W2W integration platforms. Sample designs and applications towards com-mercialization will also be presented. The issues associated with each technology category will be discussed, including integration architecture and design tools, yield and cost, thermal and mechani-cal constraints, and manufacturing infrastructure. Finally, future directions into micro/nano/electro-opto/bio system hyper-integrations including MEMS will be presented, showing 3D-TSV hyperintegration as a very promising emerging architecture for future computer, network, nano-tech, and biotech applications.

%� Why 3D Integration? %� Overview of 3D Integration and Packaging

Technologies %� 3D Packaging %� Chip-to-Wafer (C2W) 3D Integration %� Transistor Build-up 3D Integration %� Wafer-to-Wafer (W2W) 3D Integration: - Key

unit processes; - Major bonding approaches; - Through-Silicon-Vias (TSVs) technologies and processing alternatives

%� 3D-TSV Technology Status, Assessment and Challenges/Issues

%� 3D-Enabled Designs and Applications %� 3D-TSV Hyperintegration Perspectives and

Technology Projections %� Conclusions

Engineers and managers involved in future R&D investments, assembly and product development of electronic packaging, and wanting fundamental understanding of 3D-TSV technologies, as well as the materials and equipment suppliers wanting to know about the existing and future 3D-TSV technologies and options, will greatly benefit from this course.

3D integration consists of 3D IC packaging, 3D IC integration, and 3D Si integration, which will be discussed. Emphases are placed on the key en-abling technologies for 3D IC/Si integrations, such as TSV forming, filling, and CMP, front and back-side metallization, RDL, IPD, temporary bonding and de-bonding, wafer thinning and handling, thin chip/wafer strength measurement and improving, W2W bumpless bonding, lead-free microbump-

ing (d15µm pitch) and assembly, low-temperature wafer bumping and C2C and C2W bonding, and thermal management. Useful characterization and reliability data for 3D IC integration will also be provided. The application of 3D IC integration such as CMOS image sensor, MEMS, LED, memo-ry/logic + logic/microprocessor, active and passive interposers will be presented. More than 15 companies’ passive interposes (samples) used as substrates, carriers, stress relief (reliability) buffer, and thermal management tools will be discussed. Furthermore, the critical issues of TSV and 3D integration will be given and some potential solu-tions or research topics will be recommended. Finally, TSV manufacturing yield and hidden costs will be discussed and several roadmaps of 3D IC/Si integration will be provided. All the materials are based on the technical papers and books published within the past 3 years by the lecturer and others.

%� Introduction%� Origin of 3D Integration%� Overview and outlook of 3D IC packaging%� Overview and outlook of 3D IC integration%� Overview and outlook of 3D Si integration%� TSV forming (DRIE and laser)%� TSV dielectric, barrier, and seed-metal layers%� TSV filling and CMP%� Fabrication and characterization of TSS

(Through Silicon Stacking) interposers/chips%� Fabrication and characterization of 3D IC chipp

stacking%� Reliability of TSV interposers/chips%� Effects of TSV interposer on thermal l perfor-

mances%� Effects of TSV interposer on mechanical

performances%� Glass interposers%� Interposers filled with W and CNT%� Wafer thinning and thin-wafer handling%� Cu-Cu bumpless W2W bonding%� SiO2 -SiO2 bumpless W2W bonding%� Low-cost lead-free microbumps ()15µm pitch):

fabrication and characterization)%� Low-cost lead-free microbumps ()15µm pitch):

assembly and reliability)%� Low temperature ()180°C) lead-free C2C,

C2W, and W2W bonding%� 3D IC chip stacking with low temperaturee

bonding%� CMOS image sensor with TSV%� 3D MEMS and IC integration%� 3D LED and IC integration%� Wide I/O memory, interface, and DRAM%� Equivalent thermal conductivities for copper-

filled TSV interposer/chip%� Hot spots in thin chips for 3D IC stacking%� Embedded 3D IC integration in substrate/PCB%� Supply chain for 3D IC integration %� Critical issues in adopting TSV and 3D ICC

integration

11

requires the integration of thermal management principles and concepts into the design and development process from the earliest stages of product design. The characterization and remediation of near-junction temperature spikes is the focus of this proposed Professional Devel-opment Course. Following a brief review of the silicon and compound semiconductor roadmaps and conventional thermal packaging technology, first-order relations for the analytic prediction of on-chip temperature distributions for logic and power components on silicon will be presented. Attention will then turn to the cooling poten-tial and issues encountered in the use of high thermal conductivity SiC and diamond substrates; miniaturized, thin film, and self-cooling solid state thermoelectric coolers; and liquid as well as evaporative microfluidic cooling.

%� Industry Roadmaps for semiconductor and packaging technology

%� Understanding the junction-to-ambient thermal resistance stack

%� Modeling and predicting the near-junction temperature rise

%� High thermal conductivity substrates %� On-chip thermoelectric coolers %� Liquid and evaporative microfluidics %� Wrap up: What have we learned?

This course is aimed at product managers, research staff, and packaging specialists involved in the design, development, optimization, and testing of advanced micro- and nanoelectronic products. Thermal researchers and developers of advanced thermal management technology would also greatly benefit from this course.

Based on the instructor’s 3D research activities since late 1990s, this course will discuss the latest development of Through-Strata-Vias (or Through-Si-Vias, TSVs) and other relevant enabling technologies for 3D IC integration and packaging. A comprehensive overview of 3D integration and packaging technologies will be presented, including motivation, key technologies, technol-ogy assessment and status towards commer-cialization. In this course, 3D hyper-integration technologies are divided into 4 categories: 3D packaging, chip-to-wafer (C2W) assembly, transis-tor build-up, and wafer-to-wafer (W2W) 3D. For 3D packaging, the ICs are packaged vertically in chip-to-chip (C2C), system-in-packaging (SiP) and package-on-package (PoP) fashions. The C2W assembly is similar to SoC approach, but with known-good-dies (KGDs) assembled on an IC wafer, then processed in wafer-level. In transistor build-up 3D, active devices are built-up over an

12

%� 3D IC/Si integration roadmaps%� Summary

If you are involved with any aspect of the electronics industry, you should attend this course. You will receive more than 300 pages of handouts from the Instructor’s papers and books, Advanced MEMS Packaging (McGraw-Hill, 2010) and Reliability of RoHS Compliant 2D & 3D IC Interconnects (McGraw-Hill, 2011)

The course will provide a broad overview of polymers used in semiconductor packaging and the important structure-property-process-performance relationships. We will cover in more depth the chemistries, material properties, and process considerations for adhesives, underfills, coatings and mold compounds. Additionally, we will provide an introduction to common thermal analysis methods (DSC, DMA, TMA, and TGA) used to characterize thermosetting polymers used in semiconductor packaging. Finally, the course will provide an introduction to the rheo-logical performance of polymer-based materials used in packaging semiconductors. In most cases, adhesives, underfills, mold compounds and coat-ings are applied as a viscous liquid and then cured. The flow properties of these materials are critical to performance in high volume manufacturing. The course will provide an introduction to rheol-ogy measurements and examples of rheology issues in semiconductor packaging.

%� Thermosetting polymers versus thermoplastics %� Temperature dependence of physical proper-

ties %� Thermosetting polymers; curing, curing mecha-

nisms, network formation %� Overview of key chemistries used (epoxies,

acrylates, polyimides, bismaleimides) %� Chemistry of die attach adhesives and capillary

underfills %� Chemistries used in mold compounds %� Packaging Substrate Materials %� Encapsulants (mold compounds) and coatings %� Introduction to thermal analysis of thermoset-

ting polymers %� Introduction to rheological characterization

methods; types of rheometers and basic techniques

%� Introduction to the rheological properties of adhesives

%� Key rheology properties; shear thinning, viscos-ity, rheology changes during curing

Packaging engineers involved in the develop-ment, production, and reliability testing of semiconductor packages would benefit from the course. R&D professionals interested in gaining

a basic understanding of the structure/property/process/performance relationships in polymers and polymer-based materials used in electronic packaging will also find this course valuable.

Corporation

This course will cover all aspects of the flip chip technology. It will detail and compare the various UBM (electroplating, electroless plating and sputtering) and solder (electroplating, ball drop, C4NP, and solder screening) depositions methods, which are used in traditional single chip modules, chip scale packages and 3D applica-tions. It will include process considerations when joining to laminate, ceramic and Si substrates. This course will cover the accelerated reliability tests currently used to qualify the flip chip connections, the failure types and the analytical tools used to identify defect root cause. Finally, it will cover the issues and solutions associated with Pb-free solder implementation, such as barrier consump-tion, Kirkendall void formation, BEOL dielectric cracking, electromigration, etc. The students are encouraged to bring failed samples analysis for group discussion on root cause.

%� Introduction to Flip Chip %� Implication of latest RoHS ruling %� UBM metal selection %� Cu pillar fabrication technology %� Flip chip solder deposition processes %� Pb-free solder additives %� Flip Chip defects classification %� Assembly: Inspection, flux, reflow and underfill %� Micro bump / Fine pitch interconnection %� Flip chip applications: From Wafer Level Pack-

aging to 3D interconnect %� Flip chip structural testing %� Reliability testing %� CPI issues such as device chip cracks %� Electromigration testing %� Class discussion: Flip chip fabrication and reli-

ability fails and root cause analysis

The targeted audience includes scientists, engi-neers and managers currently using flip chips or considering moving from wirebonding packages, as well as reliability, product or applications engi-neers who need a deeper understanding of flip chip fabrication, advantages, limitations and failure mechanisms.

This class will highlight the need to design pack-ages up front for highly reliable field performance. It will cover the types of co-design which can make the difference between devices which are successful and those which fail. Major emphasis will be given to the use of modeling to character-ize assemblies from the pre-design stage through final system design. These models should include Electrical, Thermal, and Thermomechanical analysis. Models are only as good as the inputs to those models, so a description of the required inputs and methods to characterize the materials properties will be described. Some interactions are best addressed by up-front test die validation. A description of typical electrical, thermal, and thermomechanical test structures will be pro-vided along with guidelines for getting the most from these devices. The influence of shadow moiré testing on determining the accuracy of thermomechanical models will be addressed. Since a majority of field failures result from ther-momechanical effects, particular emphasis will be placed on validating thermomechanical models for reliability prediction. Methods for characteriz-ing the adhesion of interfaces and the relationship of the measured results to modeled values will be highlighted. New findings for Pb-free solders will be presented, including aging effects and the rarely considered collapse of solders which can occur when a device is placed under a heat sink load.

%� Typical Failure Modes %� The Importance of Co-Design %� Co-Design Methodology %� The Inputs Required for Co-Design %� Model Validation %� Adhesion Characterization %� Solder Reliability

This class will be of interest to those involved in designing package solutions for first pass success, those seeking a better understanding of valida-tion techniques, and those who want an overview of package thermomechanical reliability.

This course will teach the fundamentals of IC Package Electrical Performance metrics such as Signal Integrity, Power Integrity and Electro-magnetic Compatibility and how to apply that knowledge to an advanced IC Package design. Conceptual discussions on the basic principles of Interconnect Electromagnetics, such as RLC Parasitics, Transmission Line behavior, and the as-sociated common design challenges such as Signal

It is extremely important to registerin advance to prevent delays atdoor registration. Course sizes

are limited.

Reflections, Crosstalk, Simultaneous Switching Noise and Power Delivery Network Resonances will be made at a level that is understandable to common Package Design engineers. Relation-ship between these common Signal Integrity and Power Integrity design issues and system level Electromagnetic Compatibility will be introduced, besides the other component level causes for inter-system and intra-system EMC issues. Areas of electrical performance concern in typical wa-fer level, flip chip and wire bonded packages on laminate / build-up substrates will be discussed and generic electrical design guidelines will be provided.

%� Basics of Interconnect Electromagnetics - RLC Parasitics, Transmission Line behavior and S-parameters

%� Basics of Digital Signals - Signal Spectrum, Noise Margin, Timing Margin, Jitter, Eye-Diagram

%� Basics of RF Signals - Bandwidth, Sensitivity, Signal-to-Noise Ratio

%� Basics of EMC - Electromagnetic Interference, Electromagnetic Compatibility, Relationship to component level performance

%� Signal Reflections on Transmission Lines - Impedance Matching, Reflection Coefficient, Step-function responses

%� Crosstalk - Inductive and Capacitive Coupling, Common Impedance Coupling, Near-End / Far-End Crosstalk

%� Simultaneous Switching Noise - Power Delivery Network Impedance, Resonances, SSO Noise, Decoupling Capacitors

%� IC Package Electrical Design - Impedance Discontinuities, Pad/Ball Assignments, Power/Ground Planes, IR Drop

%� Package Design Guidelines - Single-Ended / Dif-ferential Pairs, Power Delivery, Vias, Crosstalk control, Shielding

%� Conductor Sizing - Electromigration, IR Drop and Self-heating, Current Carrying Capacity of Package Interconnects

IC Package Design engineers and managers that are looking to learn about electrical performance design challenges and techniques; Packaging signal integrity / power integrity engineers to refresh their conceptual understanding of the funda-mentals and the challenges posed by process limitations.

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The IEEE Components, Packaging and Manufacturing Technology Society (CPMT) has been authorized to offer Continuing Education Units (CEUs) by the International Association for Continuing Education and Training (IACET) for all Professional Development Courses that will be presented at the 62nd ECTC. CEUs are recognized by employers for continuing professional development as a formal measure of participation and attendance in “non-credit” self-study courses, tutorials, symposia and workshops. IEEE-CPMT CEUs can be applied towards the “IEEE-CPMT Professional Development Certificate.” Complete details, including voluntary enrollment forms, will be available at the conference. All costs associated with ECTC Professional Development Courses CEUs will be underwritten by the conference, i.e. there are no additional costs for Professional Development Courses attendees to obtain CEU credit.

Nestled at the edge of spectacular San Diego Bay, the Sheraton San Diego Hotel & Marina enjoys panoramic views of the bay and the city skyline, yet is just 10 minutes from renowned attractions including the San Diego Zoo, Old Town and Balboa Park.

The 1,053 newly renovated guest rooms and suites are located in two towers and feature bold naval hues, the Sheraton Sweet Sleeper™ Bed, Shine by Sheraton™ bath products and balconies with bay or city views. Enjoy the five minute scenic walk around the marina that connects both hotel towers.

The redesigned hotel offers green initiatives, plus 120,000 sq ft of meeting space, five restaurants, three swimming pools, tennis courts, a spa and jogging trails. Stay connected to what’s important with the lobby’s new “connection destination,” Link@Sheraton experienced with Microsoft.

In addition to the newly renovated hotel and area landmarks, other local San Diego area attractions include its longstanding naval base on Coronado Island as well as Old Globe Theater. San Diego also boasts more championship golf courses, over 85, than any other US city. And one last thing, don’t forget to bring your passports as Tijuana, Mexico is only an hour away from sunny San Diego!

Committee: Interconnections

Session Co-Chairs:Changqing Liu – Loughborough UniversityTel: +44-1509-227681Email: [email protected]

James Lu – Rensselaer Polytechnic InstituteTel: +1-518-276-2909Email: [email protected]

–

Cheng-Ta Ko – Industrial Technology Research Institute

–

Julie Roullard, Stephane Capraro, Thierry Lacrevaz, Cedric Bermond, Bernard Flechet, and Gregory Houzet – Université de Savoie; Alexis Farcy – STMicroelectronics; Jean Charbonnier, Christine Fuchs, Christine Ferrandon, and Patrick Leduc – CEA-LETI

–

Eiji Morinaga, Haruhiko Miyagawa, Ryohei Satoh, and Yoshiharu Iwata – Osaka University

–

Christopher Gregory, Matthew Lueck, Alan Huffman, John Lannon, and Dorota Temple – RTI International; Russell Stapleton – LORD Corporation

–

Robert Edgeworth, Roger Quon, Alison Gracias, and Eric Bersch – SEMATECH

–

Ji-won Shin, Yong-Won Choi, and Kyung-Wook Paik – KAIST; Un Byoung Kang, Young Kun Jee, and Ji Hwan Hwang – Samsung Electronics Company, Ltd.

–

Hiren Thacker, Ivan Shubin, Ying Luo, Kannan Raj, James Mitchell, Ashok Krishnamoorthy, and John Cunningham – Oracle

Committee: Applied Reliability

Session Co-Chairs:Sridhar Canumalla – Microsoft CorporationTel: +1-425-538-4060Email: [email protected]

Jeffrey Suhling – Auburn UniversityTel: +1-334-844-3332Email: [email protected]

–

Hossain Mohammad, Sriram Muthukumar, Aravamudhan Srinivasa, Nowakowski Marilyn, Ma Xiaoqing, Walwadkar Satyajit, and Kulkarni Vijay – Intel Corporation

–

John McMahon, Brian Gray, and Brian Standing – Celestica

– Masazumi Amagai and Yutaka Suzuki – Texas Instruments, Japan

–

Jussi Hokka, Jue Li, Joonas Makkonen, Mikael Broas, Toni Mattila, and Mervi Paulasto-Kröckel – Aalto University

–

Packaging MaterialsSB Park, Dapeng Liu, Hohyung Lee, and Yeonsung Kim – State University of New York at Binghamton; Sam Zhang – Analog Devices, Inc.

–

Ben-Je Lwo and Chung-Yen Ni – National Defense University

–

Jo Caers, Susan Zhao, Marcel de Jong, Georges Calon, and Harry Gijsbers – Philips

Committees: Emerging Technologies / Electronic Components & RF

Session Co-Chairs:John Cunningham – OracleTel: +1-858-526-9121Email: [email protected]

P. Markondeya Raj – Georgia Institute of TechnologyTel: 404-558-2615Email: [email protected]

–

Nancy Stoffel – Smart System Technology & Commercialization Center; J. Kelly Lee; Kevin Fite – Clarkson University

–

Jean-Louis Pornin, Damien Saint-Patrice, Charlotte Gillot, Emmanuelle Lagoutte, Michel Pellat, and Stéphane Fanget – CEA-LETI-MINATEC

–

PhenomenonDamien Saint-Patrice, Jean-Louis Pornin, Benoit Savornin, Guillaume Rodriguez, Severine Danthon, Pierre-Louis Charvet, Pierre Nicolas, Stephane Nicolas, and Stephane Fanget – CEA-LETI

– Paolo Nenzi, Francesco Tripaldi, Volha Varlamava, Farizio Palma, and Marco Balucani – University of Rome

–

Yoshihiko Kurui, Hiroaki Yamazaki, Yoshiaki Shimooka, Saito Tomohiro, Etsuji Ogawa, Tadashi Ogawa, Tamio Ikehashi, Yoshiaki Sugizaki, and Hideki Shibata – Toshiba

–

Sungjun Kim, Yang Zhang, Minfeng Wang, Mark Bachman, and Guann-Pyng Li – University of California, Irvine

–

Yunhan Huang, Michael Osterman, and Michael Pecht – University of Maryland

14

Reliability Processing

Committee: Modeling & Simulation

Session Co-Chairs:Henning Braunisch – Intel CorporationTel: +1-480-552-0844Email: [email protected]

Michael Lamson – ConsultantTel: +1-231-544-8093Email: [email protected]

–

Wendem Beyene – Rambus, Inc.

–

Sidharath Jain and Jiming Song – Iowa State University; Telesphor Kamgaing and Yidnekachew Mekonnen – Intel Corporation

–

CorrelationRajen Murugan, Souvik Mukherjee, and Minhong Mi – Texas Instruments, Inc.; Lionel Pauc and Claudio Girardi – Texas Instruments, France; Dipanjan Gope, Daniel de Araujo, Swagato Chakraborty, and Vikram Jandhyala – Nimbic

–

Yu Chang and Ralf Schmitt – Rambus, Inc.

–

Bhyrav Mutnury, Minchuan Wang, Douglas Wallace, and Douglas Winterberg – Dell Inc.; Arun Chada Reddy – Missouri University of Science and Technology; Antonio Ciccomancini – CST

–

PatternsZhaoqing Chen, Wiren Dale Becker, and George Katopis – IBM Corporation

–

Kyung Suk (Dan) Oh and Arun Vaidyanath – Rambus, Inc.; Woopoung Kim – Qualcomm, Inc.

Committee: Optoelectronics

Session Co-Chairs: Hiren Thacker – OracleTel: 858-526-9442Email: [email protected]

Alex Rosiewicz – EM4Tel: +1-781-275-7501 Ext 222Email: [email protected]

–

Gordon Elger, Benno Spinge, Ralph Peters, Nils Benter, Harald Willwohl, and Shinichi Honma – Philips Technology GmbH; Norbert Lesch – Philips Lumileds

–

Fei Chen, Mengxiong Zhao, Zhangming Mao, Jiawei Yao, Cao Li, and Sheng Liu – Huazhong University of Science and Technology; Kai Wang – Guangdong Real Faith Optoelectronics, Inc.

–

Marc Schneider, Benjamin Leyrer, Christian Herbold, Stefan Maikowske, and Jürgen Brandner – Karlsruhe Institute of Technology

–

Henning Schröder and Lars Brusberg – Fraunhofer IZM; Norbert Arndt-Staufenbiel and Klaus-dieter Lang – Technical University Berlin; Karim Richlowski – Contag GmbH

– PackagingJonas Tsai, Yang Zhang, G.P. Li, and Mark Bachman – University of California, Irvine

–

Michael Leers, Matthias Winzen, Heinrich Faidel, Erik Liermann, Joern Miesner, Heinz-Dieter Plum, and Hans Dieter Hoffmann – Fraunhofer Institute for Laser Technology ILT

–

Jintang Shang, Shunjin Qin, Hui Yu, and Tingting Wang – Southeast University


Session Co-Chairs:James E. Morris – Portland State UniversityTel: +1-503-725-9588Email: [email protected]

Tom Gregorich – MediaTekTel: +886-0975-591-310Email: [email protected]

–

Mark Sugden, Changqing Liu, David Hutt, and David Whalley – Loughborough University

–

NanocompositesXianbo Yang and Premjeet Chahal – Michigan State University

–

Vanessa Smet, Mamun Jamal, Alan Mathewson, and Kafil M Razeeb – Tyndall National Institute

–

Ashok Sridhar, Henri Fledderus, Roel Kusters, and Jeroen Van den Brand – TNO/Holst Centre; Maarten Cauwe – IMEC

–

Chaoqi Zhang, Hyung Suk Yang, and Muhannad Bakir – Georgia Institute of Technology

–

PhonesKiwon Lee and Kyung-Wook Paik – KAIST; Ilkka J. Saarinen and Lasse Pykari – Nokia Corporation

–

Masatsugu Nimura, Jun Mizuno, and Shuichi Shoji – Waseda University; Akitsu Shigetou – National Institute for Materials Science; Katsuyuki Sakuma – IBM Corporation; Hiroshi Ogino and Tomoyuki Enomoto – Nissan Chemical Industries

Optoelectronics Integration

15

Committee: Advanced Packaging

Session Co-Chairs:Christopher Bower – Semprius, Inc.Tel: +1-919-522-5022Email: [email protected]

John Knickerbocker – IBM CorporationTel: +1-914-945-3306Email: [email protected]

–

Ivan Shubin, Alex Chow, Hiren Thacker, Kannan Raj, Ashok Krishnamoorthy, James Mitchell, and John Cunningham – Oracle; Eugene Chow and Dirk DeBruyker – Palo Alto Research Center (PARC); Koji Fujimoto – Dai Nippon Printing Co., Ltd.

–

John Lannon, Allan Hilton, Alan Huffman, Matthew Lueck, Erik Vick, Scott Goodwin, Garry Cunningham, Dean Malta, Christopher Gregory, and Dorota Temple – RTI International

–

Jong-Min Yook, Jun Chul Kim, Se-Hoon Park, Jong-In Ryu, and Jong Chul Park – Korea Electronics Technology Institute

–

Raghunandan Chaware, Kumar Nagarajan, and Suresh Ramalingam – Xilinx, Inc.

– Meng-Jen Wang – Advanced Semicondutor Engineering

–

Aric Shorey and Scott Pollard – Corning, Inc.

–

Venky Sundaram, Gokul Kumar, Sungkyu Lim, Qiao Chen, Fuhan Liu, and Rao Tummala – Georgia Institute of Technology

Committees: Applied Reliability / Interconnections

Session Co-Chairs:Vikas Gupta – Texas InstrumentsTel: 214-567-3160Email: [email protected]

Wei-Chung Lo – ITRITel: + 886-3-591-7024Email: [email protected]

–

Joohee Kim, Jonghyun Cho, Daniel Jung, Jun So Pak, and Joungho Kim – KAIST; Jong-Min Yook and Jun Chul Kim – Korea Electronics Technology Institute

–

Yunlong Li, Dimitrios Velenis, Thomas Kauerauf, Michele Stucchi, Yann Civale, Augusto Redolfi, and Kristof Croes – IMEC

–

Bahareh Banijamali, Suresh Ramalingam, and Raghunandan Chaware – Xilinx, Inc.

–

Ha-Young You, Jung Woo Pyun, Young-Gyun Ryu, and Hyoung-Sub Kim – Samsung Electronics Co., Ltd.

–

Yiwei Wang, Tengfei Jiang, Jay Im, and Paul S. Ho – University of Texas, Austin; Seung-Hyun Chae and Rajiv Dunne – Texas Instruments, Inc.; Yoshimi Takahashi – Texas Instruments, Japan

–

Thomas Frank, Cedrick Chappaz, and Lucile Arnaud – STMicroelectronics; Stephane Moreau, Patrick Leduc, and Aurelie Thuaire – CEA-LETI; Lorena Anghel – TIMA

–

Ingrid De Wolf, Veerle Simons, Vladimir Cherman, Riet Labie, Bart Vandevelde, and Eric Beyne – IMEC


Session Co-Chairs:S. W. Ricky Lee – Hong Kong University of Science and TechnologyTel: +852-2358-7203Email: [email protected]

James Jian Zhang – Micron Technology, Inc.Tel: +1-916 458 3540Email: [email protected]

–

Roderich Zeiser, Philipp Wagner, and Jürgen Wilde – University of Freiburg, IMTEK

–

Jong Woon Kim, Heung Woo Park, Min Kyu Choi, Won Kyu Jeung, and Jung Won Lee – Samsung Electro-Mechanics Company, Limited

–

Zhuqing Zhang, Robert Walmsley, Jennifer Wu, and Sheldon Bernard – Hewlett Packard Company

–

M. A. Matin, K. Ozaki, D. Akai, K. Sawada, and M. Ishida – Toyohashi University of Technology

–

Michal David Henry, Roy Olsson, Christopher Nordquist, Randy Shul, Doug Greth, Janet Nguyen, Michael Wiwi, and Thomas Plut – Sandia National Laboratories

– PackagingStephane Nicolas, Stephane Caplet, Florent Greco, Marcel Audoin, Xavier Baillin, and Stephane Fanget – CEA-LETI-MINATEC

–

Min Miao, Yufeng Jin, Hua Gan, Jing Zhang, and Yunsong Qiu – Institute of Microelectronics, Peking University; Yang Zhang and Zhensong Li – Beijing Information Science and Technology University

16

Committee: Materials & Processing

Session Co-Chairs:Stephanie Potisek – Dow ChemicalTel: +1-979-238-9573Email: [email protected]

Lejun Wang – Medtronic, Inc.Tel: +1-480-303-4719Email: [email protected]

–

Kazutaka Honda, Akira Nagai, Makoto Satou, Hidenori Abe, and Shinsuke Hagiwara – Hitachi Chemical Co., Ltd.

–

Takafumi Fukushima – Tohoku; Kang-Wook Lee and Mitsumasa Koyanagi – Tohoku University

–

Satomi Kawamoto, Teraki Shin, and Iida Hidenori – NAMICS Corporation

–

Zhuo Li, Rongwei Zhang, Yan Liu, and C. P. Wong – Georgia Institute of Technology

–

Il Kim and Kyung-Wook Paik – KAIST

–

H. R. Kuder, D.C. Frye, L.P. Rector, J. England, and P.J. Gleeson – Henkel Corporation

–

Sanna Lahokallio and Laura Frisk – Tampere University of Technology

Committee: Assembly & Manufacturing Technology

Session Co-Chairs:Wei Koh – Powertech Technology, Inc.Email: [email protected]

Tom Poulin – Aerie EngineeringTel: +1-909-248-1237Email: [email protected]

–

Katsuyuki Sakuma, Kurt Smith, Frank Pompeo, and Jae-Woong Nah – IBM Corporation

–

C.S. Liu, C.S. Chen, C.H. Lee, H.Y. Tsai, H.P. Pu, M.D. Cheng, T.H. Kuo, H.W. Chen, C.Y. Wu, M.J. Lii, and Doug C.H. Yu – Taiwan Semiconductor Manufacturing Company, Ltd.

–

Yanggyoo Jung, Minjae Lee, Sunwoo Park, Dongsu Ryu, Youshin Jung, Chanha Hwang, and Choonheung Lee – Amkor Technology, Korea; Sungsoon Park and Miguel Jimarez – Amkor Technology, Inc.

–

Toshihisa Nonaka, Shoichi Niizeki, and Noboru Asahi – Toray Industries, Inc.

–

Jovica (John) Savic, Mohan Nagar, Weidong Xie, Mudasir Ahmad, Hari Thurairjaretatnam, and David Senk – Cisco Systems, Inc.; Nokibul Islam, Gun Oh Park, Raj Pendse, HangChul Choi, and SangHo Lee – STATS ChipPAC, Ltd.

–

Zhiyuan Yang – Peregrine Semiconductor

–

Yoo-Sun Kim, Kiwon Lee, and Kyung-Wook Paik – KAIST


Session Co-Chairs:Lakshmi N. Ramanathan – Microsoft CorporationTel: +1-425-421-3838 Email: [email protected]

Dongming He – Qualcomm, Inc.Tel: +1-858-651-8139Email: [email protected]

–

Ming Sun, Muh-Ren Lin, and Tim (Imtiaz) Chaudhry – Broadcom Corporation

–

Tae-Kyu Lee, Hongtao Ma, and Cherif Guirguis – Cisco Systems, Inc.

–

and Thermal AgingKarsten Meier and Klaus-Juergen Wolter – Technische Universität Dresden; Frank Kraemer – Universität des Saarlandes

–

Liang Yin and Michael Meilunas – Universal Instruments Corporation; Babak Arfaei, Luke Wentlent, and Peter Borgesen – Binghamton University

–

Huili Xu and ChoongUn Kim – University of Texas, Arlington; Hongtao Ma, Tae-Kyu Lee, and Kuo-Chuan Liu – Cisco Systems, Inc.

–

Cillian Burke and Jeff Punch – CTVR, Stokes Institute

–

Jeffrey Suhling, Mohammad Motalab, Zijie Cai, and Pradeep Lall – Auburn University

Characterization

17

Committee:Assembly & Manufacturing Technology

Session Co-Chairs:Andy Tseng – Advanced Semiconductor Engineering, Inc.Tel: +1-408-986-6502Email: [email protected]

Hirofumi Nakajima – Renesas Electronics Co.Tel: +81-44-435-1137Email: [email protected]

–

Antonio La Manna – IMEC

–

Koji Fujimoto and Kousuke Suzuki – Dai Nippon Printing Co., Ltd.; Nobuhide Maeda, Hideki Kitada, and Takayuki Ohba – The University of Tokyo; Tomoji Nakamura – Fujitsu Laboratories Ltd.

–

WiresAndreas C. Fischer, Simon Bleiker, Nutapong Somjit, Tommy Haraldsson, Niclas Roxhed, Göran Stemme, and Frank Niklaus – KTH Stockholm

–

Chau-Jie Zhan, Shin-Yi Huang, Kuo-Shu Kao, Yu-Wei Huang, Yu-Min Lin, Chia-Wen Fan, Su-Ching Chung, Jing-Yao Chang, Tsung-Fu Yang, Tai-Hung Chen, and John H. Lau – Industrial Technology Research Institute

–

Yuksel Temiz, Michael Zervas, Carlotta Guiducci, and Yusuf Leblebici – Ecole Polytechnique Federale de Lausanne

–

Ming Chih Chen, Frank Hsieh, and Dyi-Chung Hu – Unimicron Technology Corp.

–

Sung-Geun Kang and Youngrae Kim – Seoul Technopark; Jieun Lee, Naeun Lim, Eunsol Kim, Teakgyu Jeong, and Sarah Eunkyung Kim – Seoul National University of Science and Technology


Session Co-Chairs:Lou Nicholls – Amkor Technology, Inc.Tel: 480-786-7687Email: [email protected]

Bernd Ebersberger – Intel Mobile CommunicationsTel: +49-89-998853-53281Email: [email protected]

–

Ekta Misra, Timothy H. Daubenspeck, Thomas A. Wassick, George J. Scott, David L. Questad, Krishna R. Tunga, Gary Lafontant, Gordon Osborne Jr., and Timothy Sullivan – IBM Corporation

–

Sadia Khan, Nitesh Kumbhat, and Rao Tummala – Georgia Institute of Technology; Kodai Okoshi – Namics Corporation; Georg Meyer-Berg – Infineon Technologies

–

Stefan Härter, Andreas Reinhardt, and Jörg Franke – Institute for Manufacturing Automation and Production System; Rainer Dohle and Jörg Goßler – Micro Systems Engineering

–

Minhua Lu, Steve Wright, Gerard McVicker, and Sri Sri-Jayantha – IBM T.J. Watson Research Center

–

M. Pang, M. Kaufmann, H. Sze, R. Sharifi, K. Tan, C. W. Neo, R. Ramakrishna, S. Karikalan, C. Lu, M. Lin, and R. Khan – Broadcom Corporation

–

Wen P. Lin, Chu-Hsuan Sha, and Chin C. Lee – University of California, Irvine

–

Kei Murayama and Mitsutoshi Higashi – Shinko Electric Industries Co., Ltd.; Taiji Sakai and Nobuaki Imaizumi – Fujitsu Laboratories Ltd.


Session Co-Chairs:Bing Dang – IBM CorporationTel: 1-914-945-1568Email: [email protected]

Hongtao Ma – Cisco Systems, Inc.Tel: +1-408-832-4502Email: [email protected]

–

Sandip Halder, Ingrid de Wolf, Andy Miller, Mireille Maenhoudt, Gerald Beyer, Bart Swinnen, and Eric Beyne – IMEC; David Grant, David Marx, Maurice Ford, and Russ Dudley – TAMAR Technology

–

Peter Saettler and Klaus-Juergen Wolter – Technical University Dresden; Mathias Boettcher – Fraunhofer IZM

–

M. Murugesan, T. Fukushima, T. Tanaka, and M. Koyanagi – Tohoku University; H. Nohira – Tokyo City University; H Kobayashi – ASET

–

Pillar BumpsWei Koh – Pacrim Technology; Changtse Lin – PTI

–

Ching Kuan Lee, Chau-Jie Zhan, John H. Lau, Huan-Chun Fu, Jui-Hsiung Huang, Zhi-Cheng Hsiao, Yu-Jiau Huang, Shang-Wei Chen, Shin-Yi Huang, Chia-Wen Fan, and Cheng-Ta Ko – Industrial Technology Research Institute

–

Christine Taylor and Suresh Sitaraman – Georgia Institute of Technology

–

PlasmaHajime Sakamoto and Yoshiyuki Iwata – Ibiden Co., Ltd.; Keigo Takeda and Masaru Hori – Nagoya University

18

Electromigration


Session Co-Chairs:Wendem Beyene – RambusTel: 408-462-8366Email: [email protected]

Daniel de Araujo – Nimbic, Inc.Tel: 512-487-1027Email: [email protected]

–

Jianyong Xie and Madhavan Swaminathan – Georgia Institute of Technology

–

Jing Zhou, Lixi Wan, Fengwei Dai, Huijuan Wang, Tianmin Du, Chongshen Song, Guidotti daniel, Liqiang Cao, and Daquan Yu – Institute of Microelectronics Chinese Academy of Sciences

–

Mélanie Brocard, Patrick Le Maître, Alexis Farcy, and Jean-Claude Marin – STMicroelectronics; Cédric Bermond, Thierry Lacrevaz, and Bernard Fléchet – Université de Savoie; Patrick Leduc, Haykel Ben Jamaa, Séverine Chéramy, and Nicolas Sillon – CEA-LETI

–

Toshio Sudo, Yoshiaki Oizono, Yoshitaka Nabeshima, and Takafumi Okumura – Shibaura Institute of Technology; Atsushi Sakai, Shiro Uchiyama, and Hiroaki Ikeda – Association of Super-Advanced Electronics Technologies

–

Hong Shi, John Xie, and Arif Rahman – Altera Corporation

–

Zheng Xu and James J.-Q. Lu – Rensselaer Polytechnic Institute; Xiaoxiong Gu, Bucknell Webb, and John Knickerbocker – IBM Corporation

–

Kiyeong Kim, Jun So Pak, and Joungho Kim – KAIST; Hyungdong Lee – Hynix Semiconductor, Inc.


Session Co-Chairs:Mikel Miller – Draper LaboratoryTel: +1-617-258-2844Email: [email protected]

Dong Wook Kim – Qualcomm, Inc.Tel: 858-845-7074Email: [email protected]

–

Kuei Hsiao Kuo, Jason Lee, Stan Chen, and Rick Lee – Siliconware Precision Industries Co., Ltd.; F.L. Chien – Siliconware Precision Industries Co., Ltd. (SPIL); John Lau – Industrial Technology Research Institute

–

Greg Parks, Babak Arfaei, and Eric Cotts – Binghamton University; Minhua Lu and Eric Perfecto – IBM Corporation

–

Zhiwen Chen, Bing An, and Yiping Wu – Huazhong University of Science & Technology; Changqing Liu and Rob Parkin – Loughborough University

–

Yuan-Yun Wu, Wen P. Lin, and Chin C. Lee – University of California, Irvine

–

C. R. Kao, H. Y. Chuang, T. L. Yang, M. S. Kuo, Y. J. Chen, J. J. Yu, and C.C. Li – National Taiwan University

–

W. M. Chen and C. R. Kao – National Taiwan University; S. K. Kang – IBM Corporation

–

Andrej Novikov and Mathias Nowottnick – University of Rostock


Session Co-Chairs:Darvin R. Edwards – Texas Instruments, Inc.Tel: +1-972-995-3569Email: [email protected]

Tim Chaudhry – Broadcom CorporationTel: +1-949-926-5977Email: [email protected]

–

Electromigration TestsTian Tian, Jung Kyu Han, Daechul Choi, and King-Ning Tu – University of California, Los Angeles

–

Ari Lumbantobing and Sanjay Tiku – Microsoft Corporation

–

ConditionsMahdi Sadeghinia, K.M.B. Jansen, and L.J. Ernst – Delft University of Technology; Heinz Pape – Infineon Technologies

–

Power CyclingJeffrey Suhling, Jordan Roberts, Mohammad Motalab, Safina Hussain, Richard Jaeger, and Pradeep Lall – Auburn University

–

Max Wu, H.Y. Pan, Larry Lin, Christine Chiu, Tulip Chou, Gary Lu, Patrick Liu, Gene Wu, H.P. Pu, H.Y. Tsai, and Bill Kiang – Taiwan Semiconductor Manufacturing Company, Ltd.

–

Jorge Teixeira, Alexandre Azevedo, Oriza Tavares, and Rui Marques – Nanium

–

Gyujei Lee, Suk-Woo Jeon, and Kwang-Yoo Byun – Hynix Semiconductor, Inc.; Hyo-Soo Lee – Korea Institute of Industrial Technology (KITECH); Dongil Kwon – Seoul National University

19


Session Co-Chairs:Rozalia Beica – Lam Research AGTel: +43 (0) 676 8204 1233Email: [email protected]

Sam Karikalan – Broadcom CorporationTel: +1-949-926-7296Email: [email protected]

–

ProcessesNiranjan Kumar, Sesh Ramaswami, John Dukovic, Jennifer Tseng, Ran Ding, Nagarajan Rajagopalan, Zhihong Wang, Sherry Xia, Rao Yallamanchili, Brad Eaton, and Rohit Mishra – Applied Materials

–

PlasmaYasuhiro Morikawa, Takahide Murayama, Toshiyuki Sakuishi, Manabu Yoshii, Satoru Toyoda, and Koukou Suu – Ulvac, Inc.

– Electrical and Morphological Assessment

Jean-Philippe Colonna, Gennie Garnier, Pascal Chausse, Roselyne Segaud, Amandine Jouve, Catherine Brunet-Manquat, Severine Cheramy, and Nicolas Sillon – CEA-LETI-MINATEC; Perceval Coudrain, Christophe Aumont, and Nicolas Hotellier – STMicroelectronics

–

Martin Wilke, Michael Töpper, Quoc Hue Huynh, and Klaus-Dieter Lang – Fraunhofer IZM

–

Fumihiro Inoue, Tomohiro Shimizu, Hiroshi Miyake, Ryohei Arima, and Shoso Shingubara – Kansai University

– Manho Lee, Jonghyun Cho, Joohee Kim, Jun So Pak, and Joungho Kim – KAIST; Hyungdong Lee, Junho Lee, and Kunwoo Park – Hynix Semiconductor, Inc.

–

Yann Civale, Silvia Armini, Harold Philipsen, Augusto Redolfi, Dimitrios Velenis, Kristof Croes, Zaid El-Mekki, Kevin Vandersmissen, Gerald Beyer, Bart Swinnen, and Eric Beyne – IMEC


Session Co-Chairs:Gilles Poupon – CEA-LETI-MINATECTel: +33-438-785-399Email: [email protected]

Voya Markovich – Endicott Interconnect Technologies, Inc.Tel: +1-607-755-1978 Email: [email protected]

–

Elie Eid – Universite de Savoie, IMEP-LAHC; Thierry Lacrevaz, Cedric Bermond, and Bernard Flechet – Universite de Savoie; Alexis Farcy – STMicroelectronics; Francis Calmon – Institut des Nanotechnologies de Lyon; Patrick Leduc – CEA-LETI

–

Jonghyun Cho, Joohee Kim, Jun So Pak, and Joungho Kim – KAIST; Junho Lee, Hyungdong Lee, and Kunwoo Park – Hynix Semiconductor, Inc.

– The Size Dependency of Full IMC Solder Joint for 3D InterconnectionLiping Mo and Fengshun Wu – Huazhong University of Science & Technology; Changqing Liu – Loughborough University

–

Hyunho Baek and William Eisenstadt – University of Florida; Shadi Harb – Intel Corporation

–

Shyh-Shyuan Sheu, Zhe-Hui Lin, Chih-Sheng Lin, John H. Law, Keng-Li Su, Tzu-Kun Ku, Shih-Hsien Wu, Jui-Feng Hung, Peng-Shu Chen, Shinn-Juh Lai, and Wei-Chung Lo – Industrial Technology Research Institute

–

David Secker, Mandy Ji, and John Wilson – Rambus Inc.

–

Tseshih Sung, Kevin Chiang, Daniel Lee, and Mike Ma – Siliconware Precision Industries Co., Ltd.


Session Co-Chairs:Raj N. Master – Microsoft CorporationTel: +1-650-693-0849Email: [email protected]

Daniel Baldwin – Engent, Inc.Tel: +1-678-990-3320Email: [email protected]

–

Yen-Laing Lin, C. S. Chen, Y. C. Chuang, C. S. Liu, H. P. Pu, M. D. Cheng, S. Y. Wu, T. H Kuo, C. C. Kuo, M. J. Lii, and Douglas Yu – Taiwan Semiconductor Manufacturing Corporation, Ltd.

–

Laurene Yip – Xilinx, Inc.

–

Hamid Eslampour, Mukul Joshi, YoungChul Kim, HyunIl Bae, and KeonTaek Kang – STATS ChipPAC, Inc.

–

Albert, Chang-Yi Lan, C.S. Hsiao, Erik So, and B.H. Ma – Siliconware Precision Industries Co., Ltd.; John Lau – Industrial Technology Research Institute

–

Mathew Manusharow, Sriram Muthukumar, Emily Zheng, Asim Sadiq, and Cliff Lee – Intel Corporation

–

GaWon Kim, JiHeon Yu, ChulWoo Park, JinYoung Kim, Glenn Rinne, ChoonHeung Lee, and SeoungJoon Hong – Amkor Technology, Korea

–

Tian Tian and King-Ning Tu – University of California, Los Angeles; Kai Chen – Xian Jiaotong University; Martin Kunz and Nobumichi Tamura – Lawrence Berkeley National Laboratory, Berkeley; Chau-Jie Zhan and Tao-Chih Chang – Industrial Technology Research

20

Ecosystem

Committee: Electronic Components & RF

Session Co-Chairs:Amit P. Agrawal – Cisco Systems, Inc.Tel: +1-408-424-2732Email: [email protected]

Lih-Tyng Hwang – National Sun Yat-Sen UniversityTel: 886-7-5252000 x4485Email: [email protected]

–

P. Markondeya Raj, K. P. Murali, Saumya Gandhi, Venky Sundaram, and Rao Tummala – Georgia Institute of Technology; Kirk Slenes and Nathan Berg – TPL, Inc.; Chris Catterson – Southwest Research Institute

–

Yi-Chieh Lin, Yu-Chih Lin, Tzyy-Sheng Horng, and Lih-Tyng Hwang – National Sun Yat-Sen University; Chi-Tsung Chiu and Chih-Pin Hung – Advanced Semiconductor Engineering

–

Takahito Watanabe and Shintaro Yamamichi – Renesas Electronics

–

Seungyong Baek, Philip Pun, and Amit Agrawal – Cisco Systems, Inc.

–

Premjeet Chahal, Kyoung Park, Joshua Myers, and Collin Meierbachtol – Michigan State University

–

Robert Brocato, Terisse Brocato, Joel Wendt, Carlos Sanchez, and Larry Stotts – Sandia National Laboratories

–

Bowei Zhang, Zhenyu Li, and Mona Zaghloul – The George Washington University


Session Co-Chairs:Paul Houston – EngentTel: +1-678-990-3320 ext 229Email: [email protected]

Sylvain Ouimet – IBM CorporationTel: +1-450-534-6690Fax: +1-450-534-6800Email: [email protected]

–

Lejun Wang, Chunho Kim, Scott Sleeper, Gavin Hall, Julie Dobbins, and Molly McGuire – Medtronic

–

Yi Hung Lin, Y.F Chen, Stan Chen, F.L Chien, and Rick Lee – Siliconware Precision Industries Co., Ltd.; John Lau – Industrial Technology Research Institute

–

Yong Liu, Richard Qian, and Shichun Qu – Fairchild Semiconductor Corporation

–

Jiantao Zheng, Krishna Tunga, Jeffrey Zitz, and Kamal Sikka – IBM Corporation

–

Daniel Cavasin, Majed Anani, and Eric Tosaya – AMD

–

Margin AssessmentRamgopal Uppalapati, Mike Williams, Sanjay Goyal, and Satish Parupalli – Intel Corporation

–

Mudasir Ahmad, Qiang Wang, and Weidong Xie – Cisco Systems, Inc.

Committees: Electronic Components & RF / Emerging Technologies

Session Co-Chairs:Rockwell Hsu – Cisco Systems, Inc.Tel: +408-526-6006Email: [email protected]

Karlheinz Bock – Fraunhofer EMFTTel: +49-89-54759-506Email: [email protected]

– using Printed ElectronicsMatti Mäntysalo – Tampere University of Technology; Li Xie, Fredrik Jonsson, Yi Feng, Ana López Cabezas, and Li-Rong Zheng – KTH Royal Institute of Technology

–

Taoran Le, Ziyin Lin, C. P. Wong, and Manos Tentzeris – Georgia Institute of Technology

– ModuleSanttu Koskinen and Matti Mäntysalo – Tampere University of Technology; Lasse Pykäri – Nokia Corporation

–

Gokul Kumar, Srikrishna Sitaraman, Vivek Sridharan, Nithya Sankaran, Fuhan Liu, Nitesh Kumbhat, Venky Sundaram, and Rao Tummala – Georgia Institute of Technology; Vijay Nair and Telesphor Kamgaing – Intel Corporation; Frank Juskey – TriQuint

–

Kuan-Chung Lu and Tzyy-Sheng Horng – National Sun Yat-Sen University; Hsin-Hung Lee, Kung-Chin Fan, Tzu-Yuan Huang, and Chun-Hsun Lin – Siliconware Precision Industries Co., Ltd.

–

Maciej Wojnowski, Rudolf Lachner, Josef Böck, Grit Sommer, and Klaus Pressel – Infineon Technologies; Christoph Wagner – DICE GmbH & Co KG

–

Katsuya Kikuchi and Masahiro Aoyagi – National Institute of AIST; Toshio Gomyo and Toshikazu Ookubo – Association of Super-Advanced Electronic Technologies (ASET); Toshio Sudo – Shibaura Institute of Technology; Kanji Otsuka – Meisei University

Embedded Devices

21


Session Co-Chairs:Subhash L. Shinde – Sandia National LaboratoryTel: +1-505-284-2965Email: [email protected]

Luu T. Nguyen – Texas InstrumentsTel: +1-408-721-4786Email: [email protected]

– Addressing the Bandwidth Challenges

Li Li, Peng Su, Jie Xue, and Mark Brillhart – Cisco Systems, Inc.; John Lau, P.J. Tzeng, C.K. Lee, and C.J. Zhan – Industrial Technology Research Institute

–

J. Souriau and L. Castagné – CEA-LETI; J. Liotard – STMicroelectronics; K. Inal, J. Mazuir, and F. Letexier – EMSE; G. Fresquet – Fogale; M. Varvara and N. Launay – SPTS; B. Dubois and T. Malia – Gemalto

–

K. Zoschke, T. Fischer, M. Toepper, T. Fritzsch, H. Oppermann, and T. Braun – Fraunhofer IZM; O. Ehrmann and K. Lang – Technical University Berlin; T. Itabashi and M. P. Zussman – HD MicroSystems; M. Souter – Tamarack Scientific

–

Rajiv Dunne, Tom Bonifield, Philipp Steinmann, and David Stepniak – Texas Instruments, Inc.; Yoshimi Takahashi – Texas Instruments, Japan

–

J. Knickerbocker, P. S. Andry, E. Colgan, B. Dang, T. Dickson, C. Jahnes, Y. Liu, J. Maria, R.J. Poastre, L. Turlapati, C. K. Tsang, and B. C. Webb – IBM Corporation

–

Yongwon Choi, Jiwon Shin, and Kyung-Wook Paik – KAIST

–

Herman Oprins, Vladimir Cherman, Bart Vandevelde, Geert Van der Plas, Paul Marchal, and Eric Beyne – IMEC


Session Co-Chairs:Flynn Carson – STATS ChipPAC, Inc.Tel: +1-510-979-8338Email: [email protected]

William Chen – Advanced Semiconductor Engineering, Inc.Tel: +1-408-986-6505Email: [email protected]

–

Ivy Qin, Cuong Huynh, Bob Chylak, and Horst Clauberg – Kulicke and Soffa, Inc.; Inderjit Singh and Shin Low – Xilinx, Inc.; Hui Xu and Viola Acoff – University of Alabama

–

Toyohiro Aoki, Takashi Hisada, Keishi Okamoto, Shinichi Harada, John Malinowski and Keith Beckham – IBM Corporation; Yong-Seok Yang and Joon-Su Kim – Amkor Technology, Korea

–

Suresh Tanna, Jairus L. Pisigan, and John Persic – Microbonds, Inc.; Wan Ho Song and Michael Mayer – University of Waterloo

–

ComponentsPeng Su – Cisco Systems, Inc.; Hidetoshi Seki, Chen Ping, and Shingo Itoh – Sumitomo Bakelite Co. Ltd.; Louie Huang, Nicholas Liao, Bill Liu, Curtis Chen, Winnie Tai, and Andy Tseng – Advanced Semiconductor Engineering

–

Hidenori Abe, Dong Chul Kang, Takashi Yamamoto, Takashi Yagihashi, Yoshinori Endo, Hiroyuki Saito, Takahiro Horie, Hironori Tamate, Yoshinori Ejiri, Naoki Watanabe, and Tomio Iwasaki – Hitachi Chemical Co., Ltd.

–

John Beleran, Yong Bo Yang, and Hyman Robles – United Test And Assembly Center, Ltd.; Alfred Yeo – Global Foundries, Singapore

–

Dong Liu, Haibin Chen, and Jingshen Wu – Hong Kong University of Science & Technology; Fei Wong, Kan Lee, and Ivan Shiu – NXP Semiconductors Hong Kong, Ltd.


Session Co-Chairs:Kwang-Lung Lin – National Cheng Kung UniversityTel: +886-6-2762709Email: [email protected]

C Robert Kao – National Taiwan UniversityTel: +886-2-33663745Email: [email protected]

–

Shou-Jen Hsu, Chu-Hsuan Sha, and Chin C. Lee – University of California, Irvine

–

Hiroyuki Ishida and Takuya Yazaki – Suss MicroTec; Toshinori Ogashiwa and Yukio Kanehira – Tanaka Kikinzoku Kogyo; Shin Ito and Jun Mizuno – Waseda University

–

In-Tae Bae and Dae Young Jung – State University of New York at Binghamton; Yong Du – Advanced Semiconductor Engineering; William Chen – Advanced Semiconductor Engineering, Inc.

–

Hideo Miura, Naoki Saito, Naokazu Murata, Kinji Tamakawa, and Ken Suzuki – Tohoku University

–

Jeremy Palmer, Dahwey Chu, Lauren Rohwer, and Lu Fang – Sandia National Laboratories

– Liang-Yi Hung, Don Son Jiang, and Yu Po Wang – Siliconware Precision Industries Co., Ltd.

–

John Persic, Jairus Pisigan, and Suresh Tanna – Microbonds, Inc.; Wan Ho Song, Michael Mayer, and Norman Zhou – University of Waterloo

22

Processes


Session Co-Chairs:L. J. Ernst – Delft University of TechnologyTel: +31-15-278-6519Email: [email protected]

Bruce Kim – The University of AlabamaTel: +1-205-348-4972Email: [email protected]

–

Yong Liu and Richard Qian – Fairchild Semiconductor Corporation

–

Takeshi Terasaki, Takahiko Kato, Tomio Iwasaki, Yasutaka Ookura, and Masato Nakamura – Hitachi, Ltd.; Hideki Ishii and Kenji Yamamoto – Renesas Electronics Corp.

–

Xuejun Fan and Vishal Nigaraj – Lamar University

–

Pradeep Lall – Auburn University

–

Xi Liu and Suresh Sitaraman – Georgia Institute of Technology; Ming Li, Don Mullen, and Julia Cline – RAMBUS, Inc.

–

Heinz Pape and Ingrid Maus – Infineon Technologies; Leo Ernst – Delft University of Technology; Bernhard Wunderle – Chemnitz University of Technology

–

Abigail Agwai, Ibrahim Guven, and Erdogan Madenci – University of Arizona


Session Co-Chairs:Shichun Qu – Fairchild SemiconductorTel: +1-408-822-2064Email: [email protected]

Jie Xue – Cisco Systems, Inc.Tel: +1-408-853-0199Email: [email protected]

–

Jae-Woong Nah, Michael Gaynes, Eric Perfecto, and Claudius Feger – IBM Corporation

–

ProcessingAric Shorey, Tom Dunn, Mark Tronolone, and Aric Shorey – Corning, Inc.

–

Sun-Rak Kim, Il Kim, and Seung Seob Lee – KAIST; Jae Hak Lee – KIMM

–

TechnologySeung Wook Yoon – STATS ChipPAC, Ltd.

–

Alain Phommahaxay, Greet Verbinnen, Pieter Bex, Joris Pancken, Anne Jourdain, Bart Swinnen, Andy Miller, and Eric Beyne – IMEC; Tobias Woitke, Peter Bisson, and Walter Spiess – Suss MicroTec

–

Cheng-Hsiang Liu, Hong-Da Chang, Hsin-Yi Liao, Kuo-Hsiang Li, Chen-Han Lin, and Tse-Yuan Lin – Siliconware Precision Industries Co., Ltd.; John Lau – Industrial Technology Research Institute

–

Suzette Pangrle and Jeffrey Leal – Vertical Circuits, Inc.


Session Co-Chairs:S.B. Park – Binghamton UniversityTel: +1-607-777-3415Email: [email protected]

Scott Savage – Medtronic Microelectronics CenterTel: +1-480-303-4749Email: [email protected]

–

Anurag Bansal and Hongtao Ma – Cisco Systems, Inc.

–

Steven Wright, Cornelia Tsang, Joana Maria, Bing Dang, Robert Polastre, Paul Andry, and John Knickerbocker – IBM Corporation

–

Dongji Xie, Min Woo, and Tom McMullen – NVIDIA

–

T.C. Yeh, Tsung-Fu Tsai, Larry Lin, Roger Hsieh, and Kenneth Wu – Taiwan Semiconductor Manufacturing Company, Ltd.

–

Huili Xu and ChoongUn Kim – University of Texas, Arlington; Hongtao Ma, Tae-Kyu Lee, and Kuo-chuan Liu – Cisco Systems, Inc.

– Electromigration Measurements in

Robert Frye – RF Design Consulting, LLC; Kai Liu, Aung KyawOo, and M. Pandi Chelvam – STATS ChipPAC, Ltd.

–


Modeling and Characterization

23

Committees: Interconnections / Emerging Technologies

Session Co-Chairs:Akitsu Shigetou – National Institute for Materials ScienceTel: +81-29-860-4342Email: [email protected]

Nancy Stoffel – STC MEMSTel: +1-585-919-3033Email: [email protected]

–

René Puschmann and Mathias Boettcher – Fraunhofer IZM; Michael Ziesmann – NXP Semiconductors

– End ElectronicsRabindra Das, Frank Egitto, Bill Wilson, Francesco Marconi, John Lauffer, Barry Bonitz, Mark Poliks, and Voya Markovich – Endicott Interconnect Technologies, Inc.

–

Eunseok Song, Jun So Pak, and Joungho Kim – KAIST

–

C. Bouvier, S. Bolis, D. Saint-Patrice, A. Pouydebasque, F. Jacquet, C. Bridoux, and S. Moreau – CEA-LETI-MINATEC; Emmanuelle Viger-Blanc – STMicroelectronics

–

Ayad Ghannam and David Bourrier – LAAS-CNRS; Lamine Ourak, Christophe Viallon, and Thierry Parra – LAAS-CNRS / Toulouse University

–

Saumya Gandhi, Shu Xiang, P. Markondeya Raj, Venky Sundaram, and Rao Tummala – Georgia Institute of Technology

– ApplicationsPhilip Damberg, Ilyas Mohammed, Rey Co, Roseann Alatorre, Ellis Chau, and Wei-Shun Wang – Invensas


Session Co-Chairs:Young-Gon Kim – IDTTel: +1-408-360-1545Email: [email protected]

Altaf Hasan – Intel CorporationTel: +1-480-554-3427Email: [email protected]

– Package on Package ArchitecturesRobert Nickerson, Chuck Gealer, Rey Olmedo, Choong Kooi Chee, and Ai Ling Low – Intel Corporation

–

Nitesh Kumbhat, Fuhan Liu, Venky Sundaram, and Rao Tummala – Georgia Institute of Technology

–

Mamoru Kurashina, Daisuke Mizutani, Masateru Koide, Manabu Watanabe, Kenji Fukuzono, and Hitoshi Suzuki – Fujitsu

–

Hsi Chang Hsu, David Chang, Kenny Liu, Nicholas Kao, Mark Liao, and Steve Chiu – Siliconware Precision Industries Co., Ltd.; John Lau – Industrial Technology Research Institute

–

Yonggang Jin, Jerome Teysseyre, and Xavier Baraton – STMicroelectronics; S.W. Yoon, Yaojian Lin, and Pandi C. Marimuthu – STATS ChipPAC, Ltd.

–

Akiya Kimura, Susumu Obata, Toshiya Nakayama, Ryuichi Togawa, Takayoshi Fujii, Hiroshi Koizumi, Kazuhito Higuchi, Yosuke Akimoto, Miyuki Shimojuku, and Akihiro Kojima – Toshiba Corporation

– CompoundsTaku Hasegawa, Hidenori Abe, and Takatoshi Ikeuchi – Hitachi Chemical Co., Ltd.


Session Co-Chairs:Don Frye – Henkel Electronics Materials LLCTel: +1-714-368-8524Email: [email protected]

Tieyu Zheng – Intel CorporationTel: +1-480-554-2936Email: [email protected]

–

Wei Lin, Shengmin Wen, Akito Yoshida, and JeongMin Shin – Amkor Technology, Inc.

–

Yuya Suzuki, Masakazu Hashimoto, Ryota Mori, and Toshihiko Jimbo – Zeon; Srikrishna Sitaraman, Abhilash Goyal, Fuhan Liu, Nitesh Kumbhat, Venky Sundaram, and Rao Tummala – Georgia Institute of Technology

–

Tanja Braun, Jörg Bauer, Karl-Friedrich Becker, Erik Jung, Mathias Koch, and Rolf Aschenbrenner – Fraunhofer IZM; Leopold Georgi and Klaus-Dieter Lang – Technical University Berlin

–

CyclingShuangxi Sun and Xin Luo – Shanghai University; Zandén Carl, Zandira Masoud, and Johan Liu – SMITCenter and BioNano Systems Laboratory; Lilei Ye – Smart High-Tech AB

–

Xiangdong Xue, Chris Bailey, Ohidul Alam, and Hua Lu – University of Greenwich

–

Ziyin Lin, Yagang Yao, Andrew Mcnamara, Kyoungsik Moon, and C. P. Wong – Georgia Institute of Technology

–

Rabindra Das, Evan Chenlly, Erich Kopp, Dave Alcoe, Mark Poliks, and Voya Markovich – Endicott Interconnect Technologies, Inc.

24

Technologies Interface Materials


Session Co-Chairs:Yong Liu – Fairchild Semiconductor CorporationTel: +1-207-761-3155Email: [email protected]

Xuejun Fan – Lamar UniversityTel: +1-409-880-7792Email: [email protected]

–

Seng Guan Chow, Yaojian Lin, Eric Chien Ouyang, and Billy Byung Hoon Ahn – STATS ChipPAC, Inc.

–

Jui-Hung Chien, Chiao-Ling Lung, Kun-Ju Tsai, Huai-Chung Chang, Yung-Fa Chou, and Ding-Ming Kwai – Industrial Technology Research Institute; Chin-Chi Hsu and Ping-Hei Chen – National Taiwan University; Shih-Chieh Chang – National TsingHua University

–

PackageNicholas Kao, Eason Chen, Daniel Lee, and Mike Ma – Siliconware Precision Industries Co., Ltd.

–

Sathyanarayanan Raghavan and Suresh Sitaraman – Georgia Institute of Technology

–


–

Siva Gurrum, Darvin Edwards, Thomas Marchand-Golder, Jotaro Akiyama, Satoshi Yokoya, Jean-Francois Drouard, and Franck Dahan – Texas Instruments, Inc.

–

Andrew Tay, Siow Ling Ho, and Shailendra Joshi – National University of Singapore

Committee: Optoelectronics

Session Co-Chairs:Andrew Shapiro – JPLTel: +1-818-393-7311Email: [email protected]

Kannan Raj – Sun Labs, OracleTel: +1-858-526-9208Email: [email protected]

–

Fuad Doany, Clint Schow, Alexander Rylyakov, Benjamin Lee, Christopher Jahnes, Christian Baks, Daniel Kuchta, and Frank Libsch – IBM T.J. Watson Research Center

–

Takashi Shiraishi, Takatoshi Yagisawa, Tadashi Ikeuchi, Satoshi Ide, and Kazuhiro Tanaka – Fujitsu Laboratories, Ltd.

Marika Immonen, Jin Hua Wu, Hui Juan Yan, Peifeng Chen, Dan Ting Ma, Jian Xiong Xu, and Tarja Rapala – TTM Technologies, Inc.

–

CommunicationsJohn Cunningham, Ivan Shubin, Hiren Thacker, Glenn Li, Xuezhe Zheng, Jin Young Lee, Jon Lexau, Ron Ho, Jin Yao, Ying Luo, and Kannan Raj – Oracle

–

Yuka Ito, Shinsuke Terada, Mayank Kumar Singh, Shinya Arai, and Koji Choki – Sumitomo Bakelite Co., Ltd.

–

Lars Brusberg, Henning Schröder, and Klaus-Dieter Lang – Fraunhofer IZM; Marco Queiser – TU Berlin

–

Hiroshi Uemura, Kentaro Kobayashi, Kohei Hiyama, Hideto Furuyama, Yoshiaki Sugizaki, and Hideki Shibata – Toshiba Corporation

Committee: Emerging Technologies

Session Co-Chairs:Mark Bachman – University of California, IrvineTel: +1-949-824-6421Email: [email protected]

Joana Maria – IBM T.J. Watson Research CenterTel: +1-914-945-2649Email: [email protected]

–

Xiangdong Xue – University of Greenwich; Xueyong Wei – University of Cambridge

–

Jintang Shang, Xinhu Luo, Shunjin Qin, and Hui Yu – Southeast University; Wei Lin and C. P. Wong – Georgia Institute of Technology

–

Kyoung Youl Park, Cecilia Acosta, Nophadon Wiwatcharagoses, and Premjeet Chahal – Michigan State University

–

Erik Jung – Fraunhofer IZM

–

TechnologiesRobert Hahn, Krystan Markquardt, Mikael Thunmann, Thomas Stolle, Michael Töpper, Martin Wilke, and K. D. Lang – Fraunhofer IZM

–

Edward King Long Chan and Matthew Ming Fai Yuen – Hong Kong University of Science & Technology

–

Sarkis Babikian, Liang Li Wu, Guann-Pyng Li, and Mark Bachman – University of California, Irvine

25

Committee: Interactive PresentationsSession Co-Chairs:Mark Poliks – Endicott Interconnect Technologies, Inc.Tel: +1-607-755-2064Email: [email protected]

Ibrahim Guven – University of ArizonaTel: +1-520-626-5225Email: [email protected]

Zhaoqing Chen – IBM Corporation

Rabindra Das, Steven Rosser, Robert Welte, Tim Antesberger, John Lauffer, Richard Kelly, Mark Poliks, and Voya Markovich – Endicott Interconnect Technologies, Inc.

Hamid Eslampour, YoungChul Kim, SeongWon Park, and TaeWoo Lee – STATS ChipPAC, Inc.

Thomas Dieter Ewald and Norbert Holle – Robert Bosch GmbH; Klaus-Jürgen Wolter – Dresden University of Technology

Thomas Krebs, Susanne Duch, Yvonne Loewer, and Wolfgang Schmitt – Heraeus Materials Technology

Seok Won Lee, Byoung Wook Jang, Jong Kook Kim, Yoon Ha Jung, Young Bae Kim, Ho Geon Song, Sa Yoon Kang, Young Min Kang, San Man Lee, Ki Chul Park, and Chi Sun Ju – Samsung Electronics Company, Ltd.

Fu’an Li and Xiaobing Luo – Huazhong University; Xingguo Cheng and Sheng Liu – Huazhong University of Science and Technology

Ziyin Lin, Kyoungsik Moon, and C. P. Wong – Georgia Institute of Technology; Shunyi Lau – The Chinese University of Hong Kong

Carlo MethodZhang Luo and Sheng Liu – Huazhong University of Science & Technology; Min Jin – Hunan University

Masato Miyatake, Hikari Murai, Shin Takanezawa, Shinji Tsuchikawa, Masaaki Takekoshi, Masahisa Ose, and Tomohiko Kotake – Hitachi Chemical Co., Ltd.

Suddhasattwa Nad, Jinlin Wang, Lilia Kondrachova, Rajen S. Sidhu, Chonglun Fan, Srinivasa R. Aravamudhan, and Satish Parupalli – Intel Corporation

Siyuan Qi, Robert Litchfield, David Hutt, Bala Vaidhyanathan, Changqing Liu, and Patrick Webb – Loughborough University; Stephen Ebbens – University of Sheffield

Jong-In Ryu, Se-Hoon Park, Dongsu Kim, and Jun-Chul Kim – Korea Electronics Technology Institute

Himani Sharma, Parthasarathi Chakraborti, Yushu Wang, P. Markondeya Raj, and Rao Tummala – Georgia Institute of Technology

Dave Thomas, Keith Buchanan, Hefin Griffiths, Kath Crook, Mark Carruthers, Oliver Ansell, and Dan Archard – SPTS Technologies

Michael Toepper, Martin Wilke, Julia Röder, and Christina Lopper – Fraunhofer IZM; Markus Wöhrmann – TU Berlin

Liang Wu, Sarkis Babikian, and Mark Bachman – University of California, Irvine

Sheng-Tsai Wu, John H. Lau, Heng-Chieh Chien, and Ra-Min Tain – Industrial Technology Research Institute

Michael Zervas, Yuksel Temiz, and Yusuf Leblebici – EPFL

Chau-Jie Zhan, Yu-Min Lin, Yu-Wei Huang, Shin-Yi Huang, Kuo-Shu Kao, Chia-Wen Fan, Su-Ching Chung, Jing-Yao Chang, Tsung-Fu Yang, and Tai-Hung Chen – Industrial Technology Research Institute

Yue Zhang and Muhannad Bakir – Georgia Institute of Technology

Committee: Interactive PresentationsSession Co-Chairs:Swapan Bhattacharya – Georgia Institute of TechnologyTel: +1-404-385-3173Email: [email protected]

Rao Bonda – Amkor TechnologyTel: +1-480-786-7749Email: [email protected]

Masazumi Amagai and Jang Seungmin – Texas Instruments, Japan

Bin Cao, Shan Yu, Huai Zheng, and Sheng Liu – Huazhong University of Science & Technology

Eerik Halonen, Tapio Karinsalo, Pekka Iso-Ketola, and Matti Mäntysalo – Tampere University of Technology

Jui-Feng Hung, Peng-Shu Chen, John H. Lau, Shih-Hsien Wu, Shinn-Juh Lai, Ming-Lin Li, Shyh-Shyuan Sheu, Zhe-Hui Lin, Tzu-Kun Ku, Wei-Chung Lo, and Ming-Jer Kao – Industrial Technology Research Institute

Seung-Ho Kim and Kyung-Wook Paik – KAIST; Young-Jae Kim and Ho Joon Park – Samsung Electro-Mechanics Company, Limited

Daeil Kwon and Alan E. Lucero – Intel Corporation


Ricky Lee, Kun Tang, and Fubin Song – Hong Kong University of Science & Technology

Electronic PackagingZhuo Li, Yi Gao, Kyoung-Sik Moon, and Allen Tannenbaum – Georgia Institute of Technology; C. P. Wong – The Chinese University of Hong Kong

Young-Bae Park and Jae-Myeong Kim – Andong National University; Sehoon Yoo – Korea Institute of Industrial Technology

Xian Qin, Nitesh Kumbhat, Venky Sundaram, and Rao Tummala – Georgia Institute of Technology

Hong Bin Shi, Tong Yan Tee, and Toshitsugu Ueda – Waseda University; Fa Xing Che and Shan Gao – Institute of Microelectronics; Hun Shen Ng – SMARTS Technology, LLP

Inderjit Singh and Shin Low – Xilinx, Inc.; Takeshi Mori – Sumitomo

Young Song – Qualcomm, Inc.; Chu Hsuan Sha and Chin C. Lee – University of California, Irvine

Ahmer Syed – Amkor Technology, Inc.; WonJoon Kang and TaeKyeong Hwang – Amkor Technology, Korea

Jiaqi Tang, Ben Schelen, and Kees Beenakker – Delft University of Technology

Pei-Jer Tzeng, John H. Lau, Ming-Ji Dai, Chien-Chou Chen, Shang-Chun Chen, Chien-Ying Wu, Jui-Chin Chen, Yi-Feng Hsu, Tzu-Kun Ku, Ra-Min Tain, and Ming-Jer Kao – Industrial Technology Research Institute

Naoya Watanabe and Masahiro Aoyagi – AIST; Takumi Miyazaki and Kazuhiro Yoshikawa – PRE-TECH CO., Ltd.

Wen Yin, Daquan Yu, Fengwei Dai, and Lixi Wan – Institute of Microelectronics Chinese Academy of Sciences; Han Yu – Shanghai Sinyang Semiconductor Materials Co., Ltd; Jiangyan Sun – Shanghai Sinyang Semiconductor Materials Co., Ltd.

Chau-Jie Zhan, Shin-Yi Huang, Yu-Wei Huang, Yu-Min Lin, Kuo-Shu Kao, Chia-Wen Fan, Su-Ching Chung, Jing-Yao Chang, Tsung-Fu Yang, and Tai-Hung Chen – Industrial Technology Research Institute

X. J. Zhao, J.F.J.M. Caers, and Sander Noijen – Philips Research Netherlands; Marcel De jong – Philips Lightings Netherlands; Harry Gijsbersc, Gorden Elgerc, and Harald Willwohl – Philips Technologie GmbH

26

Committee: Interactive PresentationsSession Co-Chairs:Ibrahim Guven – University of ArizonaTel: 520-626-5225Email: [email protected]

Nam Pham – IBM CorporationTel: +1-512-286-8011Email: [email protected]

Cheng-fu Chen – University of Alaska, Fairbanks

Heng-Chieh Chien, John H. Lau, Ra-Min Tain, and Yu-Lin Chao – Industrial Technology Research Institute; Ming-Ji Dai – EOL/Industrial Technology Research Institute; L. Li, P. Su, J. Xue, and M. Brillhart – Cisco Systems, Inc.

Ludovic Fourneaud, Thierry Lacrevaz, Cedric Bermond, Yann Gaeremynck, and Bernard Flechet – IMEP LAHC; Jean Charbonnier and Christine Fuchs – CEA-LETI-MINATEC; Alexis Farcy – STMicroelectronics

Peter Gadfort and Paul Franzon – North Carolina State University

Xiaoxiong Gu, Ki Jin Han, and Michael Cracraft – IBM Corporation

Kyu Han, Madhavan Swaminathan, Pulugurtha Raj, Himani Sharma, and Rao Tummala – Georgia Institute of Technology; Vijay Nair – Intel Corporation

Nancy Iwamoto – Honeywell International, Inc.

Nam Hoon Kim, Daniel Wu, Jack Carrel, Joong-ho Kim, Paul Wu, and Suresh Ramalingam – Xilinx, Inc.

Cheolbok Kim, Kyoung Tae Kim, and Yong-Kyu Yoon – University of Florida; Kyung-Hoon Lee – ETRI; Sangrok Lee – ShinHeung College

Kai Liu, YongTaek Lee, HyunTai Kim, and MaPhooPwint Hlaing – STATS ChipPAC, Inc.; Robert Frye – RF Design Consulting

Power Electronic PackagingYong Liu and Yumin Liu – Fairchild Semiconductor Corporation

Jeffery Lo, Jeffery Lo, and Rong Zhang – Hong Kong University of Science & Technology

PackageXiaobing Luo, Run Hu, Huai Zheng, Quan Chen, and Sheng Liu – Huazhong University of Science & Technology

Om P. Mandhana – Sigrity, Inc.

Wesley Martin, Matt Doyle, Richard Ericson, Jerry Bartley, and George Zettles – IBM Corporation

Kyoung Youl Park, Collin S Meierbachtol, Nophadon Wiwatcharagoses, and Premjeet Chahal – Michigan State University

Vesa Pynttari, Eerik Halonen, Matti Mantysalo, and Riku Makinen – Tampere University of Technology

Alexander Sahm, Christian Fiebig, Stefan Spießberger, Erdenetsetseg Luvsandamdin, Katrin Paschke, Götz Erbert, and Günther Tränkle – Ferdinand Braun Institut

Jaemin Shin and Timothy Michalka – Qualcomm, Inc.

Alan Ugolini, Eric Childers, DJ Hastings, Dirk Schoellner, and Jillcha Wakjira – US Conec, Ltd.

Shogo Ura, Tatsuya Majima, Koji Hatanaka, Junichi Inoue, Kenzo Nishio, and Yasuhiro Awatsuji – Kyoto Institute of Technology; Kenji Kintaka – National Institute of Advanced Industrial Science and Technology

Zheng Xu and James J.-Q. Lu – Rensselaer Polytechnic Institute; Xiaoxiong Gu, Michael Scheuermann, Bucknell Webb, and John Knickerbocker – IBM T.J. Watson Research Center

Hong Bin Shi, Tong Yan Tee, and Toshitsugu Ueda – Waseda University; Hun Shen Ng – SMARTS Technology, LLP; Fa Xing Che and Shan Gao – Institute of Microelectronics

Committee: Interactive PresentationsSession Co-Chairs:Rao Bonda – Amkor TechnologyTel: +1-480-786-7749Email: [email protected]

Patrick Thompson – Texas Instruments, Inc.Tel: +1-972-995-7660Email: [email protected]

Flynn Carson, Kenny Lee, JH Yee, CK Chin, Edward Fontanilla, and Jeffrey Punzalan – STATS ChipPAC, Inc.

Yu-Jen Chang, Tai-Yu Zheng, Hao-Hsiang Chuang, Chuen-De Wang, Yih-Peng Chiou, and Tzong-Lin Wu – National Taiwan University; Peng-Shu Chen and Shih-Hsien Wu – Industrial Technology Research Institute

Kwang-Seong Choi, Ho-Eun Bae, Su-Jeong Jeon, Hyun-Cheol Bae, and Yong-Sung Eom – ETRI

Dahwey Chu and Lauren Rohwer – Sandia National Laboratories

Hsing-Chou Hsu and Kai Xiao – Intel Corporation

Su-Heon Jeong, Sung-Ki Nam, and Sun-Kyu Lee – GIST; Wataru Nakayama – Thermtech International

Sae-Kyoung Kang, Joon Ki Lee, Jyung Chan Lee, Joon Young Huh, and Kwangjoon Kim – Electronics and Telecommunications Research Institute

Sukeshwar Kannan and Bruce Kim – University of Alabama; Suresh Sitaraman – Georgia Institute of Technology; Li Li – Cisco Systems, Inc.

Dayoung Kim, Joohee Kim, Junso Pak, and Joungho Kim – KAIST

Il Kim, Seung-Ho Kim, Inseong You, Haeshin Lee, and Kyung-Wook Paik – KAIST

Jamin Ling, Tao Xu, Christoph Luechinger, Raymond Chen, and Orlando Valentin – Kulicke and Soffa, Inc.

Shenglin Ma, Xin Sun, Yunhui Zhu, Zhiyuan Zhu, Qinghu Cui, Wengao Lu, Jing Chen, Min Miao, and Yufeng Jin – Peking University

Venkata Mokkapati – Austrian Institute of Technology; Ole Bethge, Rainer Hainberger, and Hubert Bruckl – Auburn University

ApplicationsPaolo Nenzi, Rocco Crescenzi, and Marco Balucani – University of Rome; Alexander Dolgyi, Alexy Klysko, and Vitaly Bondarenko – BSUIR

Chet Palesko – SavanSys Solutions LLC; E. Jan Vardaman – TechSearch International, Inc.

Loïc Sanchez, Laurent Bally, Brigitte Montmayeul, Franck Fournel, Jeremy Da Fonseca, Léa Di Cioccio, Emmanuel Augendre, and Veronique Carron – CEA-LETI-MINATEC; Rachid Taibi – STMicroelectronics; Gilbert Lecarpentier – SET

Eric F. Schulte, Keith C. Cooper, and Mathew Phillips – SET North America; Subhash L. Shinde – Sandia National Laboratories

Rohit Sharma, Vachan Kumar, Azad Naeemi, and Paul Kohl – Georgia Institute of Technology; Rizwan Bashirullah – University of Florida

Maaike Margrete Visser Taklo, Andreas Larsson, and Astrid-Sofie Vardøy – SINTEF ICT; Helge Kristiansen – Conpart AS; Lars Hoff – HiVe-Vestfold University College; Knut Waaler – WesternGeco AS

Chien-Chin Wang, Chih-Ying Lin, Jin-Fa Chang, and Yo-Sheng Lin – National Chi Nan University

Sha Xu and Yan-Cheong Chan – City University of Hong Kong; Xiaoxin Zhu, Hua Lu, and Chris Bailey – University of Greenwich; Hiren Kotadia and Samjid H.Mannan – King’s College

Weiwei Zhao, Patrick Webb, and Changqing Liu – Loughborough University; Tommaso Santaniello and Christina Lenardi – The University of Milan

27

Committee: Interactive PresentationsSession Co-Chairs:Mark Eblen – KyoceraTel: +1-858-614-2537Email: [email protected]

Patrick Thompson – Texas Instruments, Inc.Tel: +1-972-995-7660Email: [email protected]

CapacitorsWarda Benhadjala, Laurent Béchou, Isabelle Bord, and Yves Ousten – Laboratoire IMS; Matthieu Buet and Fabien Rougé – Polyrise SAS

Anirudh Bhat and Suresh Sitaraman – Georgia Institute of Technology

Fei Chen, Mengxiong Zhao, and Sheng Liu – Huazhong University of Science and Technology

Xing Chen, Simin Wang, Zhang Luo, Shengzhi Zhang, Zhicheng Lv, Hao Jiang, and Sheng Liu – Huazhong University of Science & Technology

Xiaoyu Cheng, David Senior, and Yong-Kyu Yoon – University of Florida

Andreas Hardock, Heinz-Dietrich Brüns, and Christian Schuster – TUHH, Institut für Theoretische Elektrotechnik

Pit Fee Jao, David E. Senior, Kyong-Tae Kim, and Yong-Kyu Yoon – University of Florida

Wen P. Lin, Chu-Hsuan Sha, and Chin C. Lee – University of California, Irvine

Yan Liu, Ziyin Lin, Xueying Zhao, Kyoungsik Moon, and C. P. Wong – Georgia Institute of Technology; Sehoon Yoo – Korea Institute of Industrial Technology (KITECH)

MicroelectronicsYan Liu, Ziyin Lin, Kyoungsik Moon, and C. P. Wong – Georgia Institute of Technology

Milad Mostofizadeh, Kati Kokko, and Laura Frisk – Tampere University of Technology

Paolo Nenzi, Francesco Tripaldi, Frank Silvio Marzano, Fabrizio Palma, and Marco Balucani – University of Rome

Yong-Sung Park, Ji-Won Shin, Yong-Won Choi, and Kyung-Wook Paik – KAIST

in Pd Coated Cu and Bare Cu Wire BondingAlireza Rezvanigilkolaee and Ivy Qin – Kulicke and Soffa, Inc.; Michael Mayer – University of Waterloo

David Senior, Xiaoyu Cheng, and Yong Kyu Yoon – University of Florida



Yun Shuai, Nguyen T. Tran, Jiun Pyng You, and Frank G. Shi – University of California, Irvine

Wireless ApplicationsPouya Talebbeydokhti, Mohamed Megahed, and Itsik Refaeli – Intel Corporation

Jiajie Tang, Xiao Chen, Xiaoyun Ding, and Le Luo – Shanghai Institute of Microsystem and Information Technology

Minfeng Wang, Yang Zhang, Guann-Pyng Li, and Mark Bachman – University of California, Irvine

Qidong Wang and Lixi Wan – IMECAS, China; Daniel Guidotti – Georgia Institute of Technology; Fujiang Lin – University of Science and Technology of China

Nophadon Wiwatcharagoses, Kyoung Youl Park, and Premjeet Chahal – Michigan State University

Nophadon Wiwatcharagoses, Kyoung Youl Park, and Premjeet Chahal – Michigan State University

Hyung Suk Yang – Georgia Institute of Technology; Hiren Thacker, Ivan Shubin, John Cunningham, and James Mitchell – Oracle

Liang Yang, Lv Zhicheng, Mingxiang Chen, and Sheng Liu – Wuhan National Laboratory for Optoelectronics

Xianbo Yang and Premjeet Chahal – Michigan State University

Jiun Pyng You, Yu-Chou Shih, Yeong-Her Lin, and Frank G. Shi – University of California, Irvine

Lai Yuneng, Huang Yuanhao, Chen Zunmiao, and Zhang Jianhua – Shanghai University

Jiawei Zhang, Vijayakumar Pankaj, John Evans, Michael Bozack, Yifei Zhang, and Jeffrey Suhling – Auburn University

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By Internet: Submit your registration electronically via www.ectc.net. Your registration must be received by the cutoff date, May 12, 2012, to qualify for the early registration discounts.

You may call +1-940-383-3059 for additional information. Payment can be made by company check, money order or credit card. Your registration must be received by the cutoff date to qualify for the early registration

discounts.

Hotel Reservations

Sheraton San Diego Hotel and Marina

OR

Companies are being selective in choosing the conferences and trade shows where they exhibit their products and services. Each year, more companies have determined that ECTC provides them the opportunity to identify superior prospects. The primary reason is that the engineers and managers who attend ECTC hold decision-making positions at the world’s leading electronics equipment and component manufacturers. The attendees are attracted by ECTC’s strong technical program. Authors in the field believe that ECTC offers the best forum for presenting their work.

Exhibit hours will be from 9:00 AM to Noon and 1:30 to 6:30 PM on Wednesday, May 30, and 9:00 AM to Noon and 1:30 to 4:00 PM on Thursday, May 31. A few exhibit spaces are still available. Following is a list of exhibitors as of Feb. 1, 2012. The exhibit brochure, a current exhibitor list and a booth layout showing the available booths can be found on the ECTC web site at www.ectc.net under Technology Corner Exhibits.

If you need additional information or have questions, call Bill Moody at +1-302-478-4143 or email [email protected].

3D Systems Packaging Research Center

AI Technology, Inc.

ALLVIA, Inc.

Alpha Novatech, Inc.

Amkor Technology, Inc.

ANSYS, Inc.

ASE Group

Bergquist Company (The)

Chip Scale Review

Corwil Technology Corp.

CPS Technologies Corp.

CST of America, Inc.

Dow Electronic Materials

DuPont Wafer Level Packaging Solutions

Electronics Cooling

Enzo Technology

EV Group

ficonTEC (USA) Corp.

Finetech Inc.

Fraunhofer Institute for Mechanics of Materials IWM

Fraunhofer Institute for Reliability and Microintegration

FRT of America LLC

Fujipoly America Corp.

Heraeus Materials Technology GmbH & Co. KG

High Connection Density

Huntsman Advanced Materials

IBM Advanced Packaging

Industrial Technology Research Institute

Interconnect Systems Inc.

JSR Micro, Inc.

Kyocera America, Inc.

MI-Seojin, Inc.

Mini-Systems, Inc.

MJS Designs, Inc.

Moldex 3D (Coretech System Co., Ltd.)

Momentive Performance Materials

Nagase & Co., Ltd.

NAMICS Technologies, Inc.

Nanium

Newport Corp.

Nikon Metrology, Inc.

Nordson DAGE

PAC TECH USA

Palomar Technologies

PURE TECHNOLOGIES, Inc.

QualiTau

Quik-Pak

RTI International – Center for Materials & Electronics

Semiconductor Equipment Corp.

SET-Smart Equipment Technology

Shin-Etsu MicroSi

Shinko Electric America

SIGRITY, Inc.

SIMULIA

Smoltek

Sonnet Software

Souriau PA&E

SPTS Technologies

STATS ChipPAC

SUSS MicroTec

Tamarack Sicentific Co., Inc.

TechSearch International, Inc.

Tokyo Ohka Kogyo Co., Ltd.

Toray Engineering Co., Ltd.

Torrey Hills Technologies, LLC

USHIO

XYZTEC

Yield Engineering Systems, Inc.

YOLE DEVELOPPEMENT

ZEON CORP./Zeon Chemicals L.P.

Zymet, Inc.

30

62nd Electronic Components & Technology Conference

2012 ECTC Conference Registration Information

Conference Registration Advance Registration Door Registration

IEEE Member Attendee (full conference) $625 $725

Speaker or Chair (full conference) $525 $625

One-Day Registration $475 $475

Speaker One-Day Registration $350 $350

non-IEEE member Attendee (full conference) $755 $870

Speaker or Chair (full conference) $525 $625

One-Day Registration $475 $475

Speaker One-Day $350 $350

Student Attendee or Speaker (full conference) $250 $250

Joint ECTC/ITHERM Attendee $900 $1,000

Exhibits Only not attending conference $20 $20

Professional Development Courses (PDC)Note: all PDC Courses include a luncheon

IEEE Member Full PDC (AM and PM) $575 $675

One PDC course (AM or PM) $400 $475

non-IEEE member PDC Full (Both AM and PM) $625 $675

PDC Single (AM OR PM) $450 $475

Student PDC Full (Both AM and PM) $125 $125

Other Registration Options

Extra Proceedings $100 $100

Extra Luncheon Tickets $50 $50

Cancellation Fee $50 $50

Please log onto: www.ectc.net/registration to register for the 2012 ECTCJoin IEEE and Save over $100 on ECTC Registration –

and Receive Free CPMT membership!Details on IEEE/CPMT membership can be found at www.ectc.net/registration

There will be no refunds or cancellations after May 12, 2012. Please note that a $50 cancellation fee will be in effect for all cancellations made on or prior to May 12, 2012. Substitutions can be made at any time.

For additional information about registration or ECTC please contact us at:Renzi & Company, Inc.

c/o 2012 ECTC3508 Villanova DriveDenton, TX 76210

(direct line): +1-940-383-3059email: [email protected]

31

Morning Professional

1. Lead-Free Solder Joint Reliability - Material Consideration

2. Multi-Physics Modeling in IC Packaging and Microsystems

3. Wafer Level Chip Scale Packaging (WLCSP)

4. 3D Integration: Alternative to Continued Scaling

5. Polymers/Nano-Composites – Electronic & Photonic Packaging Recent Advances

6. Analog and Power Electronics Packaging

7. Fundamental Concepts of Reliability & Mechanics Electronic Packaging

8. Methods for Efficient High- Frequency Modeling Optimization of Interconnection in Electronics Packaging

9. Package Failure Analysis - Failure Analysis and Analytical Tools

10. Near Junction Remediation of On-Chip Hot Spots

11. Technology Advances in 3D-TSV Integration and Packaging of Micro-Nano- Systems

12. 3D IC Packaging & Integration, and 3D Si Integration

13. Polymers in Electronic Packaging

14. Flip Chip Technology

15. Design for Package Reliability

16. IC Package Design Signal & Power Integrity & EMC

Next Generation Packaging and Integration

Special Session

Technical Sessions

1 3D Interconnect: Bonding and Assembly2 Next Generation Packaging Reliability3 MEMS Integration and Processing4 Signal and Power Analysis5 LEDs and Emerging Optoelectronics Integration6 Novel Interconnections

Technical Sessions

7 Interposer Technology8 3D Reliability9 Sensors and MEMS10 Conductive and Non- conductive Adhesives11 Advanced Flip Chip Underfill Assembly12 Solder and Material Characterization

Interactive Presentation

Technology Corner Exhibits

Plenary Session

Technical Sessions

13 3D TSV Manufacturing14 Flip Chip Interconnect and Electromigration15 Innovative Processes and Techniques16 3D Electrical Analysis17 Lead Free Solders18 Innovative Test Methods

Technology Corner Exhibits

Noon

Interactive Presentation

Sessions

Technical Sessions

19 Thru Via Technologies20 Co-Design for the 3D Ecosystem21 Flip Chip Technologies22 Precision Components, Sensors and RF Packaging23 Assembly Challenges of Area Array Packages24 Inkjet Technology and Embedded Devices

CPMT Seminar

Technical Sessions

25 3D Integration26 Advanced Wirebonding27 Bonding Materials and Processes28 New Trends in Mechanical Modeling and Characterization

29 Novel Approaches in Wafer Level Manufacturing30 Interconnect Reliability

Technical Sessions

31 Applications with 3D Technologies32 Advanced Substrate and Wafer Level Packaging33 Substrates and Thermal Interface Materials34 3D Systems and Emerging Packages-Thermal and Thermo-Mechanical Studies35 Optical Interconnects36 Integrated Microfluidics

S1, S7, S8, S13, S16, S19, S20, S25, S31

S7, S9, S19, S21, S25, S32

S2, S8, S12, S18, S30

TechnologyS11, S13, S23, S29

S3, S22, S24

Emerging TechnologiesS3, S24, S31, S36

InterconnectionsS1, S6, S14, S20, S26, S31

Materials & ProcessingS10, S15, S17, S27, S33

S4, S16, S28, S34

OptoelectronicsS5, S35

Interactive PresentationsS37, S38, S39, S40, S41

IEEE CPMT445 Hoes Lane

Piscataway, NJ 08854-4141 USA

FIRST CLASSU.S. POSTAGE

RALEIGH, NCPERMIT NO. 2172

Official Media Sponsor:

Media Sponsors:

Mailroom:If the person on this label is no longer employed at your company, please route this information brochure to his/her replacement or department manager.

Route to:_______________________________________ _______________________________________ Attn: Engineers, scientists and technical managers

Sponsored by: Supported by:

62nd ECTC Advance Program

Documents

Transcript of 62nd ECTC Advance Program