16 October, 2009ASET talk - S.S.Upadhya Electronics and DAQ system for INO-ICAL prototype detector...

16 October, 2009 ASET talk - S.S.Upadhya

Electronics and DAQ system for INO-ICAL prototype detector

(Presented by S.S.Upadhya, TIFR on behalf of INO collaboration)

OBJECTIVE: Feasibility study of INO prototype detector of dimension 1m3 ( glass RPC )

Which demanded Fast implementation of electronics to study its performance

Outline of Talk: Introduction Electronics set up Main Sections

Front End Electronics Trigger logic Back end Processing

Typical configuration & Modules developed DAq. Software Performance and results VME transformation of DAQ

16 October, 2009 ASET talk - S.S.Upadhya 2

Introduction to Glass Resistive Plate Chamber (RPC)

• Glass RPC is a gaseous detector- gas mixture flown at the atmospheric pressure -Electric field is applied across the glass electrodes. • An ionizing charged particle traversing the gap initiates a streamer in the gas volume that results in a local discharge( limited to 0.1cm2) of the electrodes. •The discharge induces an electrical signal on external pickup strips on both sides, orthogonal to each other, which can be used to record the location and time of ionization. • The RPC can be operated in either in streamer mode or avalanche mode. Typical signal amplitude is about 100-200mV in streamer mode where as few mV in avalanche mode and its rise time is less than a nano Second. • Signal is derived from a pick strip and common ground plane onto a twisted pair line of 100 ohm impedance.


3

Construction of RPCConstruction of RPC

Pickup stripsPickup strips30mm30mm

2 mm thick spacer2 mm thick spacer

Glass platesGlass plates

Resistive coating on the outer surfaces of glassResistive coating on the outer surfaces of glass

Two 2 mm thick float GlassTwo 2 mm thick float GlassSeparated by 2 mm spacerSeparated by 2 mm spacer

2 mm Gas chamber2 mm Gas chamber


Prototype Detector and Electronics

Informations to be recorded on every valid trigger : (Few per min)

Event time up to micro secs (RTC) Particle interaction tracks (boolean status of X-Y pick-up signal in each layer) 768 bits relative time of interaction along the layers(X-Y planes) of RPCs (24 TDCstops)

Detector Specifications:

• 12 layers of RPCs• RPC has X & Y-planes (orthogonal strips)• Each plane gives 32 pick up signals• Total no. of channels = 12x2x32

= 768X=1m

Y=1m

Z=1m

RTC

Final Trigger

INO controller

TDCReadout Mod.

Monitor Scaler

CAMAC Controller

CAMACback end

Front end Electronics

DETECTOR

RPC

60mm iron

Design Considerations:• Flexibility and scalability• Fast implementation using available resources and expertise• Custom design standard at front end and CAMAC standard at back end with a serial transfer of data


Electronics Set up

User configurable Daisy chain : an interface between Front end and Back end electronics for control, data transfer and monitoring• Event daisy chain : 1 each for X & Y planes of 12 layers [T,E/-M,Ad(4),SD,Clk]•Monitor daisy chain: 12 no.s ( 1each for 2 consecutive layers in X & Y planes )[M,R,Clk]

Note: MAX length of a daisy chain can be 16 modules due to 4 bit address

CAMAC system

SIGNAL ROUTERS

Trigger & TDC

Control – Data

Monitoring

TR

IGG

ER

Co

ntr

olle

r

Re

ad

ou

t

TD

C

RT

C

Eve

S

cale

rs

Mo

n

Sca

lers

CA

MA

CC

ontr

olle

r

Amplifier and Discriminator

Processing and Monitoring

Layer 1 (X) [EveID,MonID]



Layer 12 (X)

Front End

Back End



Layer 1 (Y)



Layer 12 (Y)


Main Sections of Electronics

Front End Electronics Amplifier & Discriminator Processing and Monitoring Signal Routers

Trigger logic Front end (Tigger-0 & 1) Back end (Final Trigger)

Back end Processing Event process Monitor process


Front end: Amplifier & Discriminators

8 channel Amplifier : RPCs in avalanche mode gives very small pulses of few mV and hence signal is amplified Specifications :• placed close to pick-up strips• a gain of 80• rise time of 2 ns

Front End Discriminator: Converts the pickup signals over set threshold to digital signals (Diff ECL)Specifications:• 16 channels per module• common threshold variable from 2 to 500mV• houses Trigger-0 logic also

1595+1513

1597+1513

AD96687

Amplifier output



Front End: Processing & Monitoring

Translator and wave shaper(TTL & 400ns width)

48_bit Parallel to Bit Serial Event Register

2:

1 M

UX

M fold coincidence (Trigger-1 logic )

CPLD

Discriminator signals ( 32 Diff. ECL ) T0 signals from Discriminator

T1 signals

Board ID[8 bit]

40

:1 M

UX

Eve & Mon Decoder 6_bit Counter

(Mon Chnl Addr)

2:

1 M

UX

Translator(LVDS to TTL)

EveCom MonInterface signals

MClk

MR

MonEn

EveEn

Eve

IDM

on

ID

EveClk

SISO

clk

Eve

SI

Mo

n S

I

Eve SO

Mon SO

Cal Freqs

T

load

CPLD

Translator(TTL to LVDS)

EveCom MonInterface signals

INTERFACE SIGNALSEveCom (event daisy chain) OUT : EveSO, EveClk, Addr(4), E/ nM ,T IN : EveSI, EveClk, Addr(4), E/ nM ,T

Mon :: (Monitor daisy chain)OUT : MonSO , MClk, MR IN : MonSI , MClk, MR

• 0ne per plane of RPC

• Registering track data and transfer serially

• Select a pick up signal for monitoring


Sequence of Signals in Event and Monitoring process

E / M

First pulse after address enables the board for monitor

Next channel selection

EVENT READ OUT CYCLE:

ADDR(4)

Clk

SO

Monitor cycle

ADDR(4)

Board 0 Board 1

Board 0

MR

Mclk

MO

E/ M

Captured Event data transfer of Layer 0


Bd ID

Captured event data transfer of layer 11



Processing & Monitoring module

Processing and Monitoring module:• Latches Boolean status of 32 pick up signals and board ID, on a final trigger• Transfers latched data over event daisy chain• Select the channels for monitoring • Generates M fold trigger –T1 per plane • Board has board-ID, event-ID, monitoring-ID• one per plane ie total of 24 modules

XC 9536Trigger-1

XC 95288Processing &

Monitoring

Event (48 bit)=BdID(6)+F(4)+MCh(6)+Pickup(32)


Front End:: Signal Routers

Routing of like signals between Front end and Back end Trigger & TDC Router:

Routes primitive Trigger signals and TDC stop signals from each front end Processing boards of RPC planes to Final TRIGGER module and TDC module at back end CAMAC

Control & Data Router: Caters the control signals from INO controller at back end to all

the front end Processor modules via daisy chains Routes serial event data and selected pick signals for monitoring

from front end boards via respective daisy chains to Read out board and Monitor Scalers at back end.


Trigger Logic (MxN fold)For X-planes in Front End Discriminator (FED) module [ TRIGGER 0 LOGIC - T0

trigger] Pickup signals crossing set threshold converted to DIGITAL (diff ECL) ;

typical rate ~200Hz Every 8th pickup signals in a plane are logically ORed to get T0 signals (S0 to S7) Sn

rate is 4x200= 800Hz In Processing and Monitoring module [ TRIGGER 1 LOGIC - T1

trigger] M fold coincidence of S1 to S8 signals (equivalent to M fold coincidence of

consecutive pickup signals in a plane)- 1F,2F,3F,4F Final Trigger Module ( CAMAC std. ) [ TRIGGER 2 LOGIC - T2 trigger ]

M fold signals(1F,2F,3F,4F) from all the X-planes are the inputs (diff LVDS) MxN fold trigger is generated ie N fold coincidence of M fold (T1) triggers from

consecutive planes

typical MxN folds implemented are 1x5, 2x4, 3x3, 4x2

For Y-planes Similarly MxN fold for Y-plane is generated

Final Trigger is logical OR of MxN fold trigger from X and Y-planes

• Final Trigger invokes DAq system via LAM to record the event information.

BACK

Eg: M = 1F :: S0+S1+….+S7 M = 2F :: S0.S1+S1.S2 + S2.S3 + S3.S4 + ….. + S7.S0 M = 3F :: S0.S1.S2+S1.S2.S3 + S2.S3.S4 + S3.S4.S5 + ….. + S7.S0.S1 M = 4F :: S0.S1.S2.S3+S1.S2.S3.S4 + S2.S3.S4.S5 + ….. + S7.S0.S1.S2


Final Trigger Module

Final Trigger Module: • M folds of all X & Y planes are inputs • Generates MxN folds - final trigger• Final trigger invokes LAM• Inputs and MxN outputs of trigger logic are individually mask-able.• Counting of all triggers by built-in scalers• Boolean status of M fold signals are latched on final trigger for later reading• design is FPGA based


Back end Processing:: Event and Monitor process

Final Trigger

Event Process

Invokes LAM for Event process

SW via INO controller initiates track data transfer serially to Read-out module

Registers Track data in front end

Event time,TDC data and Trigger rates at back end

Registered Data is ready for reading into PC via CAMAC

bus

Monitor Process

Periodic 1Hz Trigger from INO controller

Register the counting rate of selected pick-up signal

in Mon-Scaler

Registered Data is ready for reading into PC via CAMAC

bus


INO Controller

% n Mon LAM Mon

MOSW

MClk

MR

10MHz

% n

Event Bit counter

%48

Test Pattern(8)

Module AddressCounter(4)

Eve C

om10MHz

Event

SW

SO

Clk

T

E/M

Event process

Monitor process


INO Controller

INO Controller:• In Event process, SW initiates the Controller to flush data serially

from all processing modules over event daisy chains. • In Monitoring process, It selects the channels to be monitored.• Event and monitoring parameters like event data transfer speed,

data size, monitoring period etc. are user programmable via CAMAC interface

• SW controlled Diagnostic features for DAq. is supported.


INO Controller

Fig.6 INO Controller


INO Readout Module

EveCom and Mon interface signals

Serial In Parallel Out Shift REG(16)

clk

Serial In Parallel Out Shift REG(16)

clk

TranslatorLVDS to diff ECL

FIFO Buffer(16)

FIFO Buffer(16)

Eve

Clk

Mon MO (1 to 8)

To Monitor Scalers

CAMAC Function & Address

Decoder

CAMAC bus

OF OF

Eve

nt

Eve

SO

Eve

Clk

Eve

nt

Eve

SO

W W


INO Readout Module

Read-out Module:

•Receives Event data over 2 serial connections and 8 pick-up signals for monitoring from 8 monitor daisy chains.

•Serial Data converted into 16bit parallel data and stored temporarily in FIFOs buffer.

•program reads FIFO data via CAMAC interface

• 8 pickup signals are converted from LVDS to ECL for Scaler compaibility


Typical configuration of Electronics Setup and DAq. System

16 Chnl DISC

16 Chnl DISC32 Chnl FEP

EveCom

EveCom

Mon

Mon

32 Chnl FEP

EveCom

EveCom

Mon

Mon

16 Chnl DISC

16 Chnl DISC

16 Chnl DISC


EveCom

EveCom

Mon

Mon

16 Chnl DISC


EveCom

EveCom

Mon

Mon

16 Chnl DISC


EveCom

EveCom

Mon

Mon

Layer 1 signals

32 Chnl FEP

EveCom

EveCom

Mon

Mon

16 Chnl DISC

16 Chnl DISC

32 Chnl FEP

EveCom

EveCom

Mon

Mon

16 Chnl DISC

16 Chnl DISC

32 Chnl FEP

EveCom

EveCom

Mon

Mon

16 Chnl DISC

16 Chnl DISC

Layer 2 signals

Layer 3 signals

Layer 4 signals

Layer 1 signals

Layer 2 signals

Layer 3 signals

Layer 4 signals

Control and Data Router

(CDR)

INO Controller

INO Readout Module

X plane Y plane(** Connections CDR & TTR are similar to X plane)

Trigger and

TDC Router(TTR)

Final TriggerModule

TDCCAMAC Controller

RTC

Monitor Scaler

CAMAC bus

CAMAC bus

Chain 1Chain 1

Chain 2

Chain 3

Chain 2

Chain 3

Layer 5 to 8

Layer 9 to 12

Layer 5 to 8

Layer 9 to 12

FTO

FTO

16 Chnl DISC


EveCom

EveCom

Mon

Mon

32 Chnl FEP

EveCom

EveCom

Mon

Mon

16 Chnl DISC

16 Chnl DISC

16 Chnl DISC


EveCom

EveCom

Mon

Mon

16 Chnl DISC


EveCom

EveCom

Mon

Mon

16 Chnl DISC


EveCom

EveCom

Mon

Mon

Layer 1 signals

32 Chnl FEP

EveCom

EveCom

Mon

Mon

16 Chnl DISC

16 Chnl DISC

32 Chnl FEP

EveCom

EveCom

Mon

Mon

16 Chnl DISC

16 Chnl DISC

32 Chnl FEP

EveCom

EveCom

Mon

Mon

16 Chnl DISC

16 Chnl DISC

Layer 2 signals

Layer 3 signals

Layer 4 signals

Layer 1 signals

Layer 2 signals

Layer 3 signals

Layer 4 signals

Control and Data Router

(CDR)

INO Controller

INO Readout Module

X plane Y plane(** Connections CDR & TTR are similar to X plane)

Trigger and

TDC Router(TTR)

Final TriggerModule

TDCCAMAC Controller

RTC

Monitor Scaler

CAMAC bus

CAMAC bus

Chain 1Chain 1

Chain 2

Chain 3

Chain 2

Chain 3

Layer 5 to 8

Layer 9 to 12

Layer 5 to 8

Layer 9 to 12

FTO

FTO


Scalability on demand (Eg. 1m to 4m RPC) X-plane

Processing & Monitoing(48)

Eve-Mon :: 00-03

Processing & Monitoing (48)

Eve-Mon :: 01-07


Eve-Mon :: 02-03


Eve-Mon :: 10-03


Eve-Mon :: 11-07


Eve-Mon :: 00-02


Eve-Mon :: 01-06


Eve-Mon :: 02-02


Eve-Mon :: 10-02


Eve-Mon :: 11-06


Eve-Mon :: 00-01


Eve-Mon :: 01-05


Eve-Mon :: 02-01


Eve-Mon :: 10-01


Eve-Mon :: 11-05


Eve-Mon :: 00-00


Eve-Mon :: 01-01


Eve-Mon :: 02-00


Eve-Mon :: 10-00


Eve-Mon :: 11-01

Event chain

Event chain

Event chain

Mon chain

Mon chain

Event data transfer for all 12 layers



EVENT RECORDING

On a Event process, program records

Event time up to microsecond

24 TDC readings

Boolean status of all pickup signals

Useful Trigger rates MONITORING

On a periodic Monitoring trigger ( 1Hz)

Monitor time recorded up to microsecond

Rates of selected set of channels are recorded

Next set of channels are selected for monitoring

DAq. Software• DAq. Program has been developed in C under Linux

• Main program displays Event data, Monitor Data as well it responds to user Key hit services

16 October, 2009 ASET talk - S.S.Upadhya 27BACK

DAq. Software

SW & HW initializationEnable LAM Handler

Any Key

Key Hit Services

Execute Services

Quit

Y

N

N

Y

STOP

Main program

Display Event and Monitor Data

RETURN

Read LAM Register

Event Flag

. Initiate data transfer from front end to Read-out module. Record RTC time, TDC, Event Scaler . Record Read-out module data. Write data to file

Monitor Flag

. Record RTC time

. Record Monitor scalers

. Select next set of channels

. Clear Monitor scalers

N

N

Y

Y

LAM Handler

Pro

gram

con

trol

On

LAM


Home made Modules population in the setup

RPC Y plane

RPC X plane

RPC X plane

RPC X plane

RPC Y plane

RPC Y plane

INO CONTROLLER INO READOUT

TRIGGER

C&D ROUTER T&T ROUTER

48 482424

12 12TOTAL=173 modules


Electronics and DAq. System

RPC Detector

Back end Electronics

Front End Electronics

BACK


35

Some interesting cosmic ray tracksSome interesting cosmic ray tracks


Discriminator performance – RPC pulse profile


Histogram of Noise rate of pickup Chnl, Cal & Fold


Avg Noise rate Monitor plot over days

AB01(Y-Plane)

0

10

20

30

40

50

60

70

80

529530532533534535539541543546547552553554556561568569571572578584586587588589591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630635636637638639640643645646647648649650651652654655656657658659660661662663664665666

No

ise

Ra

te(H

z)S#00 S#01 S#02 S#03 S#04 S#05 S#06 S#07

AB01(Y-Plane)

0

100

200

300

400

500

600

529530532533534535539541543546547552553554556561568569571572578584586587588589591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630635636637638639640643645646647648649650651652654655656657658659660661662663664665666

No

ise

Ra

te(H

z)

Cal0 Cal1 Cal2 Cal3

AB01(Y-Plane)

0

100

200

300

400

500

600

700

800

529530532533534535539541543546547552553554556561568569571572578584586587588589591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630635636637638639640643645646647648649650651652654655656657658659660661662663664665666

No

ise

Ra

te(H

z)

1Fold 2Fold 3Fold 4Fold


Histogram of Avg Noise rate over days


Typical TDC distribution of a pickup plane


Width matches with pick-up strip width of 28mm


Change over of back end Electronics ( CAMAC to VME )

NECESSITY TO CHANGEOVER: Demerits of CAMAC:

Low bus speed of 3MBps as well as large deadtime leading to few Hz trigger rate capability

Limitations of scalability to large number of channels and synchronous bus cycles

As a road map to support millions of channels of information in upcoming INO-ICAL experiment, it has been decided to convert Back-end to VME based DAQ.

Building of VME Hardware expertise in house Picked up commercial modules wherever possible Development of customized modules equivalent to the in-house

developed modules in CAMAC system, using VME based general purpose FPGA modules

Development of user friendly DAQ programs and Analysis tools to groom Software expertise to with stand SW challenges ahead in the INO experiment


Introduction to VME (VERSA-Module Eurocard)

Architecture Master/Slave

Data Transfer Asynchronous bus with handshake

Multimaster capability

1-21 Processors

Address range 16, 24, 32, 40,

64 bit (address/data multiplexing)

Data width 8,16,32,

64 bit (address/data multiplexing)

Data transfer rate Up to 320 Mbyte/s (VME2eSST)

Interrupts 7 level priority interrupt system

I/O lines 64 user defined

Mechanical standard EUROCARD 3U, 6U, 9U

Crate slot 21 (Max)

Rear transition modules available

Live insertion capability

Geographical addressing


VME BASED DAQ SETUP

X strip signals

Y strip signals

Timing info

DigitalFront End

AnalogFront End

TriggerModule

Event Trigger

Event/Monitor Data

VME CRATE Scaler TD

C

Controller & Readout Module

Linux based DAQ software (C++, Qt, ROOT)Interrupt BasedMulti-ThreadedGraphical User Interface

Online 2D/3D Event DisplayRPC Strip MonitoringOnline Error Reporting

RPC Stack

Fin

al

T

rig

ger


VME at a glance

VME crate (chassis)

smart fan units

VME master VME slavespower supply

backplane• Scaler• TDC • Latch• Front End Controller & Readout• Trigger generator


The standards: summary

Year Protocol Band (MB/s)

P1/P2 PAUX P0 Power Supplies

VME

1981 BLT 40 3 x 32 - - +5, 12

VME64 1989 MBLT 80 3 x 32 - - +5, 12

VME/V430 1990 MBLT 80 3 x 32 3 x 10 - +5, 12,

-5, -2, 15

VME64x

1996 2eVME 160 5 x 32 - 5 x 19 +5, 12, +3.3,

+48, ud

VME64xP

1996 2eVME 160 5 x 32 - 5 x 19 +5, 12, +3.3, +48, -5, -2, ud

VME2SST

1997 2eSST 320 5 x 32 - 5 x 19 +5, 12, +3.3,

+48, ud


51

INO team at RPC labINO team at RPC lab

Thank youThank you

16 October, 2009ASET talk - S.S.Upadhya Electronics and DAQ system for INO-ICAL prototype detector...

Documents

Transcript of 16 October, 2009ASET talk - S.S.Upadhya Electronics and DAQ system for INO-ICAL prototype detector...