101_ASP Rev 1.01
Transcript of 101_ASP Rev 1.01
© 2005 Microchip Technology Incorporated. All Rights Reserved. Slide 1
101 ASPGetting Started with PICmicro® Mid-Range
Architecture, Instruction Set and Assembly Language Programming
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 2
Class Objective
When you finish this class you will: Understand the basics of the inner
workings of a PIC16 Understand most instructions Understand memory organization Understand how to write simple
programs
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 3
Agenda
Architecture Basics Instruction Set Overview Memory Organization and
Addressing Modes Special Features Hands-on Exercises
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 4
Architecture The high performance of the PICmicro®
microcontroller can be attributed to the following architectural features: Harvard Architecture
Instruction Pipelining
Large Register File
Single Cycle Instructions
Single Word Instructions
Long Word Instructions
Reduced Instruction Set
Orthogonal Instruction Set
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 5
Harvard Architecture
Von Neumann Architecture: Fetches instructions and
data from a single memory space
Limits operating bandwidth
Harvard Architecture: Uses two separate memory
spaces for program instructions and data
Improved operating bandwidth
Allows for different bus widths
Von Neumann Architecture
8-bit Bus
CPU
Program & Data Memory
CPU
Harvard Architecture
Data Memory
Program Memory
8-bit Bus
14-bit Bus
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 7
Instruction Pipelining
call SUB1
addwf REG2
movf PORTB,w
return
movf PORTC,w
return
SUB1
SUB2
movlw 0x05MAIN
movwf REG1
1
2
3
4
51
52
53
54
Example ProgramFetch
T0
Instruction Cycles
movlw 0x05 -
Pre-Fetched Instruction Executing Instruction
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 8
Instruction Pipelining
call SUB1
addwf REG2
movf PORTB,w
return
movf PORTC,w
return
SUB1
SUB2
movlw 0x05MAIN
movwf REG1
1
2
3
4
51
52
53
54
Example ProgramFetch Execute
T0 T1
Instruction Cycles
Fetch
movwf REG1 movlw 0x05
Pre-Fetched Instruction Executing Instruction
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 9
Instruction Pipelining
call SUB1
addwf REG2
movf PORTB,w
return
movf PORTC,w
return
SUB1
SUB2
movlw 0x05MAIN
movwf REG1
1
2
3
4
51
52
53
54
Example ProgramFetch Execute
T0 T1 T2
Instruction Cycles
Fetch Execute
Fetch
call SUB1 movwf REG1
Pre-Fetched Instruction Executing Instruction
Time to execute normal instruction
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 10
Instruction Pipelining
call SUB1
addwf REG2
movf PORTB,w
return
movf PORTC,w
return
SUB1
SUB2
movlw 0x05MAIN
movwf REG1
1
2
3
4
51
52
53
54
Example ProgramFetch Execute
T0 T1 T2 T3
Instruction Cycles
Fetch Execute
Fetch Execute
Fetch
addwf REG2 call SUB1
Pre-Fetched Instruction Executing Instruction
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 11
Instruction Pipelining
call SUB1
addwf REG2
movf PORTB,w
return
movf PORTC,w
return
SUB1
SUB2
movlw 0x05MAIN
movwf REG1
1
2
3
4
51
52
53
54
Example ProgramFetch Execute
T0
Flush
T1 T2 T3 T4
Instruction Cycles
Fetch Execute
Fetch Execute
Fetch
Fetch
movf PORTB,w call SUB1
Pre-Fetched Instruction Executing Instruction
Time to execute call instruction includes pipeline flush
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 12
Instruction Pipelining
call SUB1
addwf REG2
movf PORTB,w
return
movf PORTC,w
return
SUB1
SUB2
movlw 0x05MAIN
movwf REG1
1
2
3
4
51
52
53
54
Example ProgramFetch Execute
T0
Flush
T1 T2 T3 T4 T5
Instruction Cycles
Fetch Execute
Fetch Execute
Fetch
Fetch Execute
Fetch
return movf PORTB,w
Pre-Fetched Instruction Executing Instruction
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 13
Instruction Pipelining
call SUB1
addwf REG2
movf PORTB,w
return
movf PORTC,w
return
SUB1
SUB2
movlw 0x05MAIN
movwf REG1
1
2
3
4
51
52
53
54
Example ProgramFetch Execute
T0
Flush
T1 T2 T3 T4 T5
Instruction Cycles
T6
Fetch Execute
Fetch Execute
Fetch
Fetch Execute
Fetch Execute
Fetch
movf PORTC,w return
Pre-Fetched Instruction Executing Instruction
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 14
Instruction Pipelining
call SUB1
addwf REG2
movf PORTB,w
return
movf PORTC,w
return
SUB1
SUB2
movlw 0x05MAIN
movwf REG1
1
2
3
4
51
52
53
54
Example ProgramFetch Execute
T0
Flush
T1 T2 T3 T4 T5
Instruction Cycles
T6
Fetch Execute
Fetch Execute
Fetch
Fetch Execute
Fetch Execute
Fetch Flush
Fetch
T7
addwf REG2 return
Pre-Fetched Instruction Executing Instruction
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 15
Long Word Instruction8-bit Program Memory
14-bit Program Memory
11 00 00 00 00 11 11 00
kk kk kk kk kk kk kk kk
11 11 00 00 00 00 kk kk kk kk kk kk kk kk
8-bit Instruction on typical 8-bit MCU
Example: Freescale ‘Load Accumulator A’:• 2 Program Memory Locations• 2 Instruction Cycles to Execute
14-bit Instruction on PIC16 8-bit MCU
Example: ‘Move Literal to Working Register’• 1 Program Memory Location• 1 Instruction Cycle to Execute
Limits Bandwidth Increases Memory
Size Requirements
Separate busses allow different widths 2k x 14 is roughly equivalent to 4k x 8
ldaa #k
movlw k
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 16
Register File Concept
Data
Bus
Data
Bus
d
OpcodeOpcode dd AddressAddressDecoded Instruction
from Program Memory:
Arithmetic/Logic Function to be Performed Result
Destination
Address of Second Source Operand
Register File Concept: All of data memory is part of the register file, so any location in data memory may be operated on directly
All peripherals are mapped into data memory as a series of registers
Orthogonal Instruction Set: ALL instructions can operate on ANY data memory location
The Long Word Instruction format allows a directly addressable register file
w f
w f
ALU
WW
Data Memory(Register File)
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 17
Instruction Set Overview
f f f f f f fdOpcode
067813
f f f f f f fOpcode
File Register Address
Destination (W or F)
Byte Oriented Operations
ADDWF 0x25, W
DestinationFile Register Address
f f f f f f fdOpcode
067813
f f f f f f fOpcode
File Register Address
Destination (W or F)
Byte Oriented Operations
ADDWF 0x25, W
DestinationFile Register Address
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 18
Instruction Set Overview
f f f f f f fbb bOpcode
067913
File Register Address
Bit Position (0-7)
Bit Oriented Operations
BSF 0x25, 3
Bit PositionFile Register Address
10
f f f f f f fbb bOpcode
067913
File Register Address
Bit Position (0-7)
Bit Oriented Operations
BSF 0x25, 3
Bit PositionFile Register Address
10
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 19
Instruction Set Overview
k k k k k k kkk k kOpcode
010 7813
k k k k k k kOpcode k
Literal Value
Literal and Control Operations
MOVLW 0x55
Literal Value
Opcode
k k k k k k kkk k kOpcode
010 7813
k k k k k k kOpcode k
Literal Value
Literal and Control Operations
MOVLW 0x55
Literal Value
Opcode
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 20
PIC16 Instruction SetByte Oriented OperationsByte Oriented Operations Bit Oriented OperationsBit Oriented Operations
addwf f,daddwf f,d
andwf f,dandwf f,d
clrf fclrf f
clrw -clrw -
comf f,dcomf f,d
decf f,ddecf f,d
decfsz f,ddecfsz f,d
incf f,dincf f,d
incfsz f,dincfsz f,d
iorwf f,diorwf f,d
movf f,dmovf f,d
movwf fmovwf f
nop -nop -
rlf f,drlf f,d
rrf f,drrf f,d
subwf f,dsubwf f,d
swapf f,dswapf f,d
xorwf f,dxorwf f,d
Add W and fAdd W and f
AND W with fAND W with f
Clear fClear f
Clear WClear W
Complement fComplement f
Decrement fDecrement f
Decrement f, Skip if 0Decrement f, Skip if 0
Increment fIncrement f
Increment f, Skip if 0Increment f, Skip if 0
Inclusive OR W with fInclusive OR W with f
Move fMove f
Move W to fMove W to f
No OperationNo Operation
Rotate Left f through CarryRotate Left f through Carry
Rotate Right f through CarryRotate Right f through Carry
Subtract W from fSubtract W from f
Swap nibbles in fSwap nibbles in f
Exclusive OR W with fExclusive OR W with f
bcf f,bbcf f,b
bsf f,bbsf f,b
btfsc f,bbtfsc f,b
btfss f,bbtfss f,b
Bit Clear fBit Clear f
Bit Set fBit Set f
Bit Test f, Skip if ClearBit Test f, Skip if Clear
Bit Test f, Skip if SetBit Test f, Skip if Set
Literal and Control OperationsLiteral and Control Operations
addlw kaddlw k
andlw kandlw k
call kcall k
clrwdt -clrwdt -
goto kgoto k
iorlw kiorlw k
movlw kmovlw k
retfie -retfie -
retlw kretlw k
return -return -
sleep -sleep -
sublw ksublw k
xorlw kxorlw k
Add literal and WAdd literal and W
AND literal with WAND literal with W
Call subroutineCall subroutine
Clear Watchdog TimerClear Watchdog Timer
Go to addressGo to address
Inclusive OR literal with WInclusive OR literal with W
Move literal to WMove literal to W
Return from interruptReturn from interrupt
Return with literal in WReturn with literal in W
Return from SubroutineReturn from Subroutine
Go into standby modeGo into standby mode
Subtract W from literalSubtract W from literal
Exclusive OR literal with WExclusive OR literal with W
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 21
PIC16 Visual Interpreter
Register File Address
d
FFFFFFFFW Register
FFFFFFFFFFFFFFFFFFFFFFFF18181818FFFFFFFFFFFFFFFF
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
w f
w fALU
1111 00 0000Z DC C
STATUS
DataBus
Literal Data from Instruction Word
012
Execute Reset
Hex
Dec
Bin
,
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 22
Data Memory Organization
Accesses70h – 7FhAccesses70h – 7Fh
Accesses70h – 7FhAccesses70h – 7Fh
Accesses70h – 7FhAccesses70h – 7Fh
Bank 0 Bank 1 Bank 2 Bank 3
PIC16F876/877 Register File Map368 Bytes of General Purpose RAM Plus Special Function Registers
000h
01Fh
020h
07Fh
080h
09Fh
0A0h
0FFh
100h
110h
17Fh
180h
190h
1FFh
0EFh 16Fh 1EFh
10Fh 18Fh
128 Bytes
SFR SFR SFR SFR
GPR96 Bytes
GPR80 Bytes
GPR96 Bytes
GPR96 Bytes
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 23
Data Memory OrganizationINDFINDF
TMR0TMR0
PCLPCL
STATUSSTATUS
FSRFSR
PORTAPORTA
PORTBPORTB
PORTCPORTC
PORTDPORTD
PORTEPORTE
PCLATHPCLATH
INTCONINTCON
INDFINDF
OPTION_REGOPTION_REG
PCLPCL
STATUSSTATUS
FSRFSR
TRISATRISA
TRISBTRISB
TRISCTRISC
TRISDTRISD
TRISETRISE
PCLATHPCLATH
INTCONINTCON
INDFINDF
TMR0TMR0
PCLPCL
STATUSSTATUS
FSRFSR
PORTBPORTB
PCLATHPCLATH
INTCONINTCON
INDFINDF
OPTION_REGOPTION_REG
PCLPCL
STATUSSTATUS
FSRFSR
TRISBTRISB
PCLATHPCLATH
INTCONINTCON
PIR1PIR1 PIE1PIE1 EEDATAEEDATA EECON1EECON1
PIR2PIR2 PIE2PIE2 EEADREEADR EECON2EECON2
Bank 0 Bank 1 Bank 2 Bank 3
000
001
002
003
004
005
006
007
008
009
00A
00B
00C
00D
080
081
082
083
084
085
086
087
088
089
08A
08B
08C
08D
100
101
102
103
104
105
106
107
108
109
10A
10B
10C
10D
180
181
182
183
184
185
186
187
188
189
18A
18B
18C
18D
Device Specific Registers
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 24
STATUS Register
IRPIRP RP1RP1 RP0RP0 TOTO PDPD ZZ DCDC CC
bit 7 bit 0
IRP: Register Bank Select (used for Indirect addressing)0 = Bank 0, 1 1 = Bank 2, 3
RP1:RP0: Register Bank Select Bits (used for direct addressing)00 = Bank 0, 01 = Bank 1, 10 = Bank 2, 11 = Bank 3
TO: Time-out bit0 = A WDT time-out occurred
PD: Power-down bit0 = SLEEP instruction executed
Z: Zero bit1 = Result of arithmetic operation is zero
DC: Digit cary / borrow bit1 = Carry out of 4th low order bit occurred / No borrow occurred
C: Carry / borrow bit1 = Carry out of MSb occurred / No borrow occurred
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 25
PIC16 Addressing Modes
Data Memory Access:
Direct addwf
<data_address>, <d>
Indirect addwf INDF, <d>
Immediate (Literal) movlw <constant>
Program Memory Access:
Absolute goto <program_address>
Relative addwf PCL,f
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 26
Register Direct Addressing
FFFFFFFFFFFF1818FFFFFFFF
FFFFFFFFFFFF1C1CFFFFFFFF
00h01h02h03h04h05h
7Ah7Bh7Ch7Dh7Eh7Fh
RP1
Bank 1 Bank 2 Bank 3
00 00 0x1830x18300
2-bits from STATUS Register 7-bits Encoded in Instruction
9-bit Effective Address(Use this when coding)
Bank 0
RP0 ‘f’ Operand
FFFFFFFFFFFF
FFFFFFFFFFFFFFFFFFFFFFFF
FFFFFFFFFFFFFFFFFFFFFFFF
FFFFFFFFFFFFFFFFFFFFFFFF
00 00 00 00 00 00
Register File Address Bus
Ad
dre
ss
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 27
FFFFFFFF
FFFFFFFF
FFFFFFFF
38383838
FFFFFFFF
FFFFFFFF
FFFFFFFF
FFFFFFFF
FFFFFFFF
FFFFFFFF
FFFFFFFF
FFFFFFFF
Register Direct Addressing
80h : INDF
81h : OPTION
82h : PCL
83h : STATUS
Bank 1
FFFFFFFF
FFFFFFFF
FFFFFFFF
38383838
Address
FFFFFFFF
FFFFFFFF
FFFFFFFF
FFFFFFFF
FFFFFFFF
FFFFFFFF
FFFFFFFF
FFFFFFFF
84h : FSR
85h : TRISA
86h : TRISB
87h : TRISC
Bank 0
INDF: 00h
TMR0: 01h
PCL : 02h
STATUS: 03h
Address
FSR: 04h
PORTA: 05h
PORTB: 06h
PORTC: 07h
20h
22h
21h
23h
A0h
A2h
A1h
A3h
Register File
bsf STATUS,RP0movlw b’11110000’movwf TRISBbcf STATUS,RP0clrf PORTB
0000 1111 0000 0000 0000 0000 0000 0000 0000
9-Bit Effective Address:
7-bits from InstructionRP0RP1
Example: Initialize bits 0-3 of PORTB as outputs
F0F0F0F0
W Register:
Bin Dec Hex
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 28
0000
Register Indirect Addressing
FFFF
FFFF
FFFF
FFFF
1C1C
FFFF
FFFF
000h001h002h003h004h005h
0FAh0FBh0FCh0FDh0FEh0FFh
IRP
Bank 2,3
0000 0000 0x1FC0x1FC0x1FC0x1FC
1-bit from STATUS Register 8-bits from FSR Register
9-bit Effective Address(Use this when coding)
Bank 0,1
FSR
FFFF
FFFF
FFFF
FFFF
FFFF
FFFF
FFFF
FFFF
FFFF
FFFF
FFFF
FFFF
0000 0000 0000 0000 0000 0000
Register File Address Bus
100h101h102h103h104h105h
1FAh1FBh1FCh1FDh1FEh1FFh
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 29
0000
FFFF
Register Indirect Addressing00h : INDF
02h : PCL
03h : STATUS
04h : FSR
20h
21h
22h
23h
80h
7Fh
7Eh
7Dh
Register File
LOOP
movlw 0x20movwf FSRclrf INDFincf FSR,fbtfss FSR,7goto LOOP<next instruction>
FFFF
1818
8080
Address
0000
0000
0000
0000
0000
0000
0000
FFFF
01h : TMR0
Example: Clear all RAM locations from 20h to 7Fh
bcf STATUS,IRP
00 00 00 00 00 00 00 00 00
9-Bit Effective Address:
FSRIRP
2020
W Register:
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 30
Program Memory Organization
Program memory is divided into four 2k×14 pages
Required to maintain single word/single cycle execution
Paging is only a concern when using the call or goto instructions, or when directly modifying the program counter
Reset VectorReset Vector
Interrupt VectorInterrupt Vector
Page 0PCH = 00hPage 0PCH = 00h
Page 1PCH = 08hPage 1PCH = 08h
Page 2PCH = 10hPage 2PCH = 10h
Page 3PCH = 18hPage 3PCH = 18h
0000h
0004h
0800h
1000h
1800h
1FFFh
2k
2k
2k
2k
14-bits
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 31
Program Counter
00 00 00 00 00
0123456789101112
PCLPCH
00 00 00 00 00 00 00 00Program Counter
13-bit PC can access up to 213 = 8192 words Contains address of NEXT instruction (pipelining) Lower byte accessible in data memory as PCL Upper byte indirectly accessible via PCLATH Runs freely across page boundaries Events that modify PC out of sequence:
Interrupts
Instructions: CALL, GOTO, RETURN, RETLW, RETFIE
Any instruction that uses the PCL register as an operand
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 32
PC Absolute Addressing
0123456789101112
OpcodeOpcode 00 00 00 00 00
CALL and GOTO Instructions:13
00 00 00 00 00 00
PC Absolute Addressing (Program Memory) Jump to another program memory location out of PC sequence
Call a subroutine
Used by the CALL and GOTO instructions 11-bits of the required 13 address bits are encoded in the
instruction
2 additional bits will come from the PCLATH register
Used when performing Computed Goto operation Address to jump to is calculated by the program
Computed address is written directly into the Program Counter
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 33
00 00
1112
PC Absolute Addressing
0123456789101112
OpcodeOpcode 00 00 00 00 00
13
00 00 00 00 00 00
-- -- -- 00 00 00 00 00
01234567
PCLATH Register in Data Memory
14-Bit CALL or GOTO Instruction in Program Memory
012345678910
00 00 00 00 00 00 00 00 00 00 00
13-Bit Program Counter
2-Bits From PCLATH11-Bits From Instruction
PCHPCHPCHPCH PCLPCLPCLPCL
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 34
-- 00 00
PC Absolute Addressing
MySubroutine
movlw HIGH MySubroutinemovwf PCLATHcall MySubroutine…org 0x1250<do something useful>…return
Example: Jumping to code located in a different program memory page.
-- -- -- 00 00 00 00 00
01234567
PCLATH Register0123456789101112
OpcodeOpcode 00 00 00 00 00
13
00 00 00 00 00 00
CALL Instruction in Program Memory
FFFF
W Register Program Counter - PCH:PCL
00 00 00 00 00 00 00 00 00 00 00
org 0x0020
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 35
00200020
CALL / RETURN Stack13-bit Program Counter
13-bit x 8-LevelReturn Address Stack
movlw HIGH MySub1movwf PCLATHcall MySub1call MySub4
…bsf PORTB,0call MySub2returnbsf PORTB,1call MySub3returnbsf PORTB,2returnbsf PORTB,3call MySub2return
bsf PORTB,7
MySub1
100210011000…
00240023002200210020
1009100810071006100510041003
100A
MySub2
MySub3
MySub4
0
1
2
3
4
5
6
7
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 36
8-bit Data Bus
PC Relative Addressing
FFFFFFFF
FFFFFFFF FFFFFFFF
To write to PC:
Write high byte to PCLATH
Write low byte to PCL(PCH will be loaded with value from PCLATH)
PCLATH
PCH PCL
movlw HIGH 0x1250movwf PCLATHmovlw LOW 0x1250movwf PCL
FFFFFFFFW Register
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 37
PC Relative Addressing: Lookup Table
PIC
® M
CU
Example: Use a lookup table with relative addressing to retrieve the bit pattern to display a digit on a 7-segment LED
ORG 0x0020 ;Page 0movlw HIGH SevenSegDecodemovwf PCLATHmovlw .5call SevenSegDecodemovwf PORTB
…
ORG 0x1800 ;Page 3SevenSegDecode:
addwf PCL,fretlw b’11000000’ ;0 = C0retlw b’11111001’ ;1 = F9retlw b’10100100’ ;2 = A4retlw b’10110000’ ;3 = B0retlw b’10011001’ ;4 = 99retlw b’10010010’ ;5 = 92retlw b’10000010’ ;6 = 82retlw b’11111000’ ;7 = F8retlw b’10000000’ ;8 = 80retlw b’10010000’ ;9 = 90
© 2005 Microchip Technology Incorporated. All Rights Reserved. Slide 38
Special Features Overview
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 39
Configuration WordCPCP -- DEBUGDEBUG WRT1WRT1 WRT0WRT0 CPDCPD LVPLVP BORENBOREN -- -- PWRTENPWRTEN WDTENWDTEN FOSC1FOSC1 FOSC0FOSC0
bit 0bit 1
Located in program memory space, outside the reach of the program counter
Used to setup device options: Code Protection
Oscillator Mode
Watchdog Timer
Power Up Timer
Brown Out Reset
Low Voltage Programming
Flash Program Memory Write
Only readable at program time on most PIC16 devices
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 40
PIC16 Oscillator OptionsXTXTXTXT
HSHSHSHS
LPLPLPLP
RCRCRCRC
INTRCINTRCINTRCINTRC
Standard frequency crystal oscillatorStandard frequency crystal oscillatorStandard frequency crystal oscillatorStandard frequency crystal oscillator
High frequency crystal oscillatorHigh frequency crystal oscillatorHigh frequency crystal oscillatorHigh frequency crystal oscillator
Low frequency crystal oscillatorLow frequency crystal oscillatorLow frequency crystal oscillatorLow frequency crystal oscillator
External RC oscillatorExternal RC oscillatorExternal RC oscillatorExternal RC oscillator
Internal RC oscillatorInternal RC oscillatorInternal RC oscillatorInternal RC oscillator
100kHz - 4MHz100kHz - 4MHz100kHz - 4MHz100kHz - 4MHz
4MHz - 20MHz4MHz - 20MHz4MHz - 20MHz4MHz - 20MHz
5kHz - 200kHz5kHz - 200kHz5kHz - 200kHz5kHz - 200kHz
DC - 4MHzDC - 4MHzDC - 4MHzDC - 4MHz
4 or 8 MHz 4 or 8 MHz 2% 2%4 or 8 MHz 4 or 8 MHz 2% 2%
Selectable clock options provide greater flexibility for the designer: LP Oscillator designed to draw least amount of current
RC or INTRC provide ultra low cost oscillator solution
XT optimized for most commonly used oscillator frequencies
HS optimized to drive high frequency crystals or resonators
Speed ranges are guidelines only
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 41
POR, OST, PWRT POR: Power On Reset
With MCLR tied to VDD, a reset pulse is generated when VDD rise is detected
PWRT: Power Up Timer Device is held in reset for 72ms
(nominal) to allow VDD to rise to an acceptable level (after POR only)
OST: Oscillator Start-up Timer Holds device in reset for 1024
cycles to allow crystal or resonator to stabilize in frequency and amplitude; not active in RC modes; used only after POR or Wake Up from SLEEP
TPWRT
TOST
Reset Execution
VDD
MCLR
PWRT
OST
TPWRT
TOST
Reset Execution
VDD
MCLR
PWRT
OST
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 42
Events that wake processor from sleepEvents that wake processor from sleepMCLRMCLR
WDTWDT
INTINT
TMR1TMR1
ADCADC
CMPCMP
CCPCCP
PORTBPORTB
SSPSSP
PSPPSP
Sleep Mode The processor can be put into a power-down
mode by executing the SLEEP instruction System oscillator is stopped Processor status is maintained (static design) Watchdog timer continues to run, if enabled Minimal supply current is drawn - mostly due to leakage (0.1 - 2.0A
typical)
Master Clear Pin Asserted (pulled low)Master Clear Pin Asserted (pulled low)
Watchdog Timer TimeoutWatchdog Timer Timeout
INT Pin InterruptINT Pin Interrupt
Timer 1 Interrupt (or also TMR3 on PIC18)Timer 1 Interrupt (or also TMR3 on PIC18)
A/D Conversion Complete InterruptA/D Conversion Complete Interrupt
Comparator Output Change InterruptComparator Output Change Interrupt
Input Capture EventInput Capture Event
PORTB Interrupt on ChangePORTB Interrupt on Change
Synchronous Serial Port (I2C Mode) Start / Stop Bit Detect InterruptSynchronous Serial Port (I2C Mode) Start / Stop Bit Detect Interrupt
Parallel Slave Port Read or WriteParallel Slave Port Read or Write
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 43
Watchdog Timer Helps recover from software malfunction Uses its own free-running on-chip RC oscillator WDT is cleared by CLRWDT instruction Enabled WDT cannot be disabled by software WDT overflow resets the chip Programmable timeout period: 18ms to 3.0s typical Operates in SLEEP; on time out, wakes up CPU
WDT Ripple Counter
Postscaler
8:1 Mux
WDT Timeout
WDTENConfiguration Bit
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 44
BOR –Brown Out Reset
When voltage drops below a
particular threshold, the device is
held in reset
Prevents erratic or unexpected
operation
Eliminates need for external BOR
circuitry
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 45
PBOR – Programmable Brown Out Reset
Configuration Option (set at program time)
Cannot be enabled / disabled in software
Four selectable BVDD trip points:
2.5V – Minimum VDD for OTP PICmicro® MCUs
2.7V
4.2V
4.5V For other thresholds, use an external supervisor
(MCP1xx, MCP8xx/TCM8xx, or TC12xx)
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 46
(P)BOR – Brown Out Reset Holds PICmicro® MCU in reset until ~72ms after VDD rises back above
threshold
72ms
BVDD
VDD
VDDBVDD
72ms
72ms
BVDD
VDD
<72ms
InternalReset
InternalReset
InternalReset
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 47
PLVD – Programmable Low Voltage Detect
Early warning before brown out
16 selectable trip points: 1.8V up to 4.5V
in 0.1 to 0.2V steps
External analog input
Internal VREF
VDD LVDIN
LVDIN
LVDCON
VREF
LVDIF
16-bit M
ultip
lexer
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 48
In-Circuit Serial Programming™
Only two pins required for programming
Convenient for In-System Programming of Calibration Data Serialization Data
Supported by MPLAB® PM3 & ICD2
PinPinPinPin
VPPVPP
VDDVDD
VSSVSS
RB6RB6
RB7RB7
FunctionFunctionFunctionFunction
Programming Voltage = 13VProgramming Voltage = 13V
Supply VoltageSupply Voltage
GroundGround
Clock InputClock Input
Data I/O & Command InputData I/O & Command Input
MCLR/VPP
VDD
VSS
RB6
RB7
PIC
16F
xxx
To application circuit
VDD VDDApplication PCB
ICSP Connector
Isolation circuits
ICSP™ Connector
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 49
I/O Ports
High Drive Capability Can directly drive LEDs Direct, single cycle
bit manipulation Each pin has individual
direction control under software All pins have ESD protection diodes Pin RA4 is usually open drain All I/O pins default to inputs (high impedance) on startup All pins multiplexed with analog functions default to
analog inputs on startup
D Q
Q
D Q
Q
RESET
Read PORTx
Write PORTx
Write TRISx
Data Bus
I/O Pin
VDD
VSS
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 50
I/O Pin Conceptual Diagram
Bit 1 of TRISBRegister
PORTBBit 1Latch
RB1Bit 1 of
Data Bus
ReadOperation
WriteOperation
movwf PORTB
movf PORTB,w
1 = RB1 is input0 = RB1 is output
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 51
I/O Ports
In In In InOut Out Out Out
1 1 1 10 0 0 0TRISB
PORTB
I/O Pin Direction Control
Bit n in TRISx controls the data direction of Bit n in PORTx
1 = Input, 0 = Output
© 2005 Microchip Technology Incorporated. All Rights Reserved. Slide 52
Hands-on Exercises
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 53
MPLAB® ICD2
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 54
PICDEM™ 2 Plus Board
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 55
MPASM™ Assembler Template
If not using interrupts, lines 8 and 9 could be omitted The labels in the left column may be anything you
want; these are just examples
MPASM Program Template
12345678910111213
LIST p=16f877a ;Explicitly declare processor
#include <p16f877a.inc> ;Include register label definitions
org 0x0000 ;Put next line of code at address 0x0000RESET_V goto START ;Reset Vector
org 0x0004 ;Put next line of code at address 0x0004INT_V retfie ;Interrupt Vector
START {Begin your code here} ;Your code goes here
END ;Tell MPASM that this is the end
MPASM Program Template
12345678910111213
LIST p=16f877a ;Explicitly declare processor
#include <p16f877a.inc> ;Include register label definitions
org 0x0000 ;Put next line of code at address 0x0000RESET_V goto START ;Reset Vector
org 0x0004 ;Put next line of code at address 0x0004INT_V retfie ;Interrupt Vector
START {Begin your code here} ;Your code goes here
END ;Tell MPASM that this is the end
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 56
RadixRadix MPASM SyntaxMPASM Syntax
Specifying the Radix By default, MPASM™ assembler expects numbers in hexadecimal Default can be changed through IDE or by adding r=hex or r=dec
as a parameter to the LIST directive:
Good programming practice suggests that a number’s radix be specified explicitly:
LIST p=16f877a, r=decLIST p=16f877a, r=dec
BinaryBinary b’10101010’b’10101010’
DecimalDecimal d’25’ or .25d’25’ or .25
HexadecimalHexadecimal h’2A’ or 0x2Ah’2A’ or 0x2A
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 57
Lab 1: The Task
Turn on LED connected to bit 0 of PORTB (RB0)
PIC
16
F8
77
A
RB037
470
J6D2
R21
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 58
Lab 1: Program Structure
Loop Here Forever
Turn on LED on RB0 (PORTB,0)
Clear PORTB Output Latches
START
Make 4 low bits of PORTB outputs
1 Instruction
4 Instructions
1 Instruction
1 Instruction: goto $(Go to self)
Switch to Bank 1
Load number into W
Move value to TRISB
Switch to Bank 0
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 59
Lab 1: Template
Lab 1: “Hello, world!” for Microcontrollers
1234567891011121314151617
LIST p=16f877a
#include <p16f877a.inc>
org 0x0000RESET_V goto START ;Reset Vector
START {1st Instruction} ;Clear PORTB output latches{2nd Instruction} ;Switch to bank 1{3rd Instruction} ;Load value to make lower 4 bits outputs{4th Instruction} ;Move value to TRISB{5th Instruction} ;Switch to bank 0{6th Instruction} ;Turn on LED on RB0
goto $ ;Loop here forever
END
Lab 1: “Hello, world!” for Microcontrollers
1234567891011121314151617
LIST p=16f877a
#include <p16f877a.inc>
org 0x0000RESET_V goto START ;Reset Vector
START {1st Instruction} ;Clear PORTB output latches{2nd Instruction} ;Switch to bank 1{3rd Instruction} ;Load value to make lower 4 bits outputs{4th Instruction} ;Move value to TRISB{5th Instruction} ;Switch to bank 0{6th Instruction} ;Turn on LED on RB0
goto $ ;Loop here forever
END
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 60
Lab 1: Solution
Lab 1: “Hello, world!” for Microcontrollers
1234567891011121314151617
LIST p=16f877a
#include <p16f877a.inc>
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0bsf PORTB,0 ;Turn on LED on RB0
goto $ ;Loop here forever
END
Lab 1: “Hello, world!” for Microcontrollers
1234567891011121314151617
LIST p=16f877a
#include <p16f877a.inc>
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0bsf PORTB,0 ;Turn on LED on RB0
goto $ ;Loop here forever
END
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 61
Lab 1: Results
You have learned: How to program a device and run the
code using the MPLAB® ICD2 How to configure an I/O port How to manipulate I/O pins How to code an infinite loop (the
equivalent of while(1) in C)
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 62
Lab 2: The Task
Make the LED connected to bit 0 of PORTB (RB0) blink
PIC
16
F8
77
A
RB037
470
J6D2
R21
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 63
Lab 2: The Task
A delay is required to make the blinking slow enough for the human eye
At 4MHz, one instruction executes in 1s
A 16-bit software counter is sufficient to implement the delay
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 64
Naming Registers/Constants
Equate Method:MyReg0 equ 0x20 ;MyReg0 = 0x20 MyReg1 equ 0x21 ;MyReg1 = 0x21 MyReg2 equ 0x23 ;MyReg2 = 0x23
Constant Block Method:CBLOCK 0x20
MyReg0 ;MyReg0 = 0x20MyReg1: 2 ;MyReg1 = 0x21MyReg2 ;MyReg2 = 0x23
ENDC
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 65
Lab 2: Program Structure
Turn on LED on RB0
Setup PORTB
START
Delay
Turn off LED on RB0
Delay
Taken from Lab 1
1 Instruction
1 InstructionSubroutine Call
1 Instruction
1 InstructionSubroutine Call
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 66
Lab 2: Program StructureDelay
RETURN
START
Yes
Yes
No
No
COUNTERL--
COUNTERL= 0?
COUNTERH--
COUNTERH= 0?
1 Instruction
1 Instruction
1 Instruction
1 Instruction
1 Instruction
Delay Subroutine
Hint: Use decfsz
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 67
Lab 2: Template – Part 1Lab 2: Blinking LED
123456789
1011121314151617
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0
;CONTINUED ON NEXT SLIDE
Lab 2: Blinking LED
123456789
1011121314151617
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0
;CONTINUED ON NEXT SLIDE
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 68
Lab 2: Template – Part 2
Lab 2: Blinking LED - Continued
18192021222324252627282930
LOOP {1st Instruction} ;Turn on LED on RB0{2nd Instruction} ;Call delay routine{3rd Instruction} ;Turn off LED on RB0{4th Instruction} ;Call delay routine{5th Instruction} ;Repeat main loop
DELAY {6th Instruction} ;Decrement COUNTERL{7th Instruction} ;If not zero, keep decrementing COUNTERL{8th Instruction} ;Decrement COUNTERH{9th Instruction} ;If not zero, decrement COUNTERL again{10th Instruction} ;Return to main routine
END
Lab 2: Blinking LED - Continued
18192021222324252627282930
LOOP {1st Instruction} ;Turn on LED on RB0{2nd Instruction} ;Call delay routine{3rd Instruction} ;Turn off LED on RB0{4th Instruction} ;Call delay routine{5th Instruction} ;Repeat main loop
DELAY {6th Instruction} ;Decrement COUNTERL{7th Instruction} ;If not zero, keep decrementing COUNTERL{8th Instruction} ;Decrement COUNTERH{9th Instruction} ;If not zero, decrement COUNTERL again{10th Instruction} ;Return to main routine
END
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 69
Lab 2: Solution – Part 1Lab 2: Blinking LED
123456789
1011121314151617
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0
;CONTINUED ON NEXT SLIDE
Lab 2: Blinking LED
123456789
1011121314151617
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0
;CONTINUED ON NEXT SLIDE
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 70
Lab 2: Solution – Part 2
Lab 2: Blinking LED - Continued
18192021222324252627282930
LOOP bsf PORTB,0 ;Turn on LED on RB0call DELAY ;Call delay routinebcf PORTB,0 ;Turn off LED on RB0call DELAY ;Call delay routinegoto LOOP ;Repeat main loop
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn
END
Lab 2: Blinking LED - Continued
18192021222324252627282930
LOOP bsf PORTB,0 ;Turn on LED on RB0call DELAY ;Call delay routinebcf PORTB,0 ;Turn off LED on RB0call DELAY ;Call delay routinegoto LOOP ;Repeat main loop
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn
END
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 71
Lab 2: Results
You have learned: How to define register labels How to implement a loop How to implement software delays How to use a “skip” instruction How to call a subroutine
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 72
Lab 3: The Task
Using one of the rotate instructions, “move” the illuminated LED across the lower 4 bits of PORTB. When it reaches one side, send it back to the start.
RB0RB1RB2RB3
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 73
Lab 3: Program Structure
Set Carry Bit
Delay
Rotate Left PORTB
RB3 = 0?
Yes
No
Set Carry Bit
Setup PORTB
START
1 Instruction
1 Instruction
Same setup code from Lab 1
1 Instruction
1 Instruction
1 InstructionCall same subroutine from Lab 2
Rember: The rotate instructions operate on 9-bits, with the Carry bit in the STATUS register as the 9th bit
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 74
Lab 3: Template – Part 1Lab 3: Rotating LED
123456789
1011121314151617
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0
;CONTINUED ON NEXT SLIDE
Lab 3: Rotating LED
123456789
1011121314151617
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0
;CONTINUED ON NEXT SLIDE
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 75
Lab 3: Template – Part 2
Lab 3: Rotating LED - Continued
1819202122232425262728293031
{1st Instruction} ;Set carry bit for initial rotateLOOP {2nd Instruction} ;Rotate PORTB to left
{3rd Instruction} ;Call delay routine{4th Instruction} ;Is the LED on RB3 (PORTB,3) on?{5th Instruction} ;If yes, set the Carry bit{6th Instruction} ;Repeat main loop
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
END
Lab 3: Rotating LED - Continued
1819202122232425262728293031
{1st Instruction} ;Set carry bit for initial rotateLOOP {2nd Instruction} ;Rotate PORTB to left
{3rd Instruction} ;Call delay routine{4th Instruction} ;Is the LED on RB3 (PORTB,3) on?{5th Instruction} ;If yes, set the Carry bit{6th Instruction} ;Repeat main loop
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
END
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 76
Lab 3: Solution – Part 1Lab 3: Rotating LED
123456789
1011121314151617
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0
;CONTINUED ON NEXT SLIDE
Lab 3: Rotating LED
123456789
1011121314151617
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0
;CONTINUED ON NEXT SLIDE
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 77
Lab 3: Solution – Part 2
Lab 3: Rotating LED - Continued
1819202122232425262728293031
bsf STATUS,C ;Set carry bit for initial rotateLOOP rlf PORTB,f ;Rotate PORTB to left
call DELAY ;Call delay routinebtfsc PORTB,3 ;Is the LED on RB3 (PORTB,3) on?bsf STATUS,C ;If yes, set the Carry bitgoto LOOP ;Repeat main loop
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
END
Lab 3: Rotating LED - Continued
1819202122232425262728293031
bsf STATUS,C ;Set carry bit for initial rotateLOOP rlf PORTB,f ;Rotate PORTB to left
call DELAY ;Call delay routinebtfsc PORTB,3 ;Is the LED on RB3 (PORTB,3) on?bsf STATUS,C ;If yes, set the Carry bitgoto LOOP ;Repeat main loop
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
END
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 78
Lab 3: Results
You have learned: How to use the rotate instructions How to use the bit test & skip
instructions
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 79
Lab 4: The Task
Same as Lab 3, but this time make the direction of rotation change when the LED is rotated to either end
RB0RB1RB2RB3
Rotate Left
Rotate Right
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 80
Lab 4: Program Structure
Set Carry Bit
Delay
Rotate Left PORTB
RB3 = 1?
Yes
No
Setup PORTB
START
Rotate Right PORTB
Delay
RB0 = 1?No
Yes
bsf STATUS,C
Same setup code from Lab 1
1 Instruction
1 InstructionSubroutine Call
2 Instructions
1 Instruction
1 InstructionSubroutine Call
2 Instructions
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 81
Lab 4: Template
Setup is identical to Lab 3 up to the LOOPLab 3: Rotating LED - Continued
1819202122232425262728293031323334353637
bsf STATUS,C ;Set carry bit for initial rotate
LEFT {1st Instruction} ;Rotate PORTB to left{2nd Instruction} ;Call delay routine{3rd Instruction} ;Is the LED on RB3 (PORTB,3) on?{4th Instruction} ;if no, rotate left again
RIGHT {5th Instruction} ;Rotate PORTB to right{6th Instruction} ;Call delay routine{7th Instruction} ;Is the LED on RB0 (PORTB,0) on?{8th Instruction} ;if no, rotate right again{9th Instruction} ;if yes, rotate left
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
END
Lab 3: Rotating LED - Continued
1819202122232425262728293031323334353637
bsf STATUS,C ;Set carry bit for initial rotate
LEFT {1st Instruction} ;Rotate PORTB to left{2nd Instruction} ;Call delay routine{3rd Instruction} ;Is the LED on RB3 (PORTB,3) on?{4th Instruction} ;if no, rotate left again
RIGHT {5th Instruction} ;Rotate PORTB to right{6th Instruction} ;Call delay routine{7th Instruction} ;Is the LED on RB0 (PORTB,0) on?{8th Instruction} ;if no, rotate right again{9th Instruction} ;if yes, rotate left
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
END
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 82
Lab 4: Solution
Lab 3: Rotating LED - Continued
1819202122232425262728293031323334353637
bsf STATUS,C ;Set carry bit for initial rotate
LEFT rlf PORTB,f ;Rotate PORTB to leftcall DELAY ;Call delay routinebtfss PORTB,3 ;Is the LED on RB3 (PORTB,3) on?goto LEFT ;if no, rotate left again
RIGHT rrf PORTB,f ;Rotate PORTB to rightcall DELAY ;Call delay routinebtfss PORTB,0 ;Is the LED on RB0 (PORTB,0) on?goto RIGHT ;if no, rotate right againgoto LEFT ;if yes, rotate left
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
END
Lab 3: Rotating LED - Continued
1819202122232425262728293031323334353637
bsf STATUS,C ;Set carry bit for initial rotate
LEFT rlf PORTB,f ;Rotate PORTB to leftcall DELAY ;Call delay routinebtfss PORTB,3 ;Is the LED on RB3 (PORTB,3) on?goto LEFT ;if no, rotate left again
RIGHT rrf PORTB,f ;Rotate PORTB to rightcall DELAY ;Call delay routinebtfss PORTB,0 ;Is the LED on RB0 (PORTB,0) on?goto RIGHT ;if no, rotate right againgoto LEFT ;if yes, rotate left
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
END
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 83
Lab 4: Results
You have learned: How to make decisions in software
and take different courses of action
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 84
Lab 5: The Task
Use a lookup table to obtain the bit pattern to be displayed on PORTB
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 85
Lab 5: Program Structure
INDEX ++
Delay
Move INDEX to W Register
Setup PORTB
START
INDEX = 7?
Clear INDEX
Setup PCLATH
Call TABLE
Move W Reg to PORTB
Clear INDEX
No
Yes
Lab 1 Setup Code
1 Instruction
2 Instructions
1 Instruction
1 Instruction
1 Instruction
1 InstructionSubroutine Call
1 Instruction
3 Instructions
1 Instruction
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 86
Lab 5: Template – Part 1Lab 5: Lookup Table
1234567891011121314151617181920
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0{1st Instruction} ;Clear index into table{2nd Instruction} ;Load W with high byte of TABLE address{3rd Instruction} ;Move W to PCLATH
;CONTINUED ON NEXT SLIDE
Lab 5: Lookup Table
1234567891011121314151617181920
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0{1st Instruction} ;Clear index into table{2nd Instruction} ;Load W with high byte of TABLE address{3rd Instruction} ;Move W to PCLATH
;CONTINUED ON NEXT SLIDE
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 87
Lab 3: Lookup Table - Continued
2223242526272829303132333435363738
LOOP {4th Instruction} ;Move INDEX to W{5th Instruction} ;Call TABLE{6th Instruction} ;Move W to PORTB{7th Instruction} ;Call delay{8th Instruction} ;Increment INDEX{9th Instruction} ;Load W with 0x07{10th Instruction} ;Subtract W from INDEX, result in W{11th Instruction} ;Is Z bit in STATUS set?{12th Instruction} ;if yes, clear INDEX{13th Instruction} ;Repeat loop
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
;CONTINUED ON NEXT SLIDE
Lab 3: Lookup Table - Continued
2223242526272829303132333435363738
LOOP {4th Instruction} ;Move INDEX to W{5th Instruction} ;Call TABLE{6th Instruction} ;Move W to PORTB{7th Instruction} ;Call delay{8th Instruction} ;Increment INDEX{9th Instruction} ;Load W with 0x07{10th Instruction} ;Subtract W from INDEX, result in W{11th Instruction} ;Is Z bit in STATUS set?{12th Instruction} ;if yes, clear INDEX{13th Instruction} ;Repeat loop
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
;CONTINUED ON NEXT SLIDE
Lab 5: Template – Part 2
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 88
Lab 5: Template – Part 3
Lab 3: Lookup Table - Continued
39404142434445565859
TABLE addwf PCL,f ;Add offset to program counterretlw b’00000001' ;Table entry 0retlw b’00000011' ;Table entry 1retlw b’00000111' ;Table entry 2retlw b’00001111' ;Table entry 3retlw b’00001110' ;Table entry 4retlw b’00001100' ;Table entry 5retlw b’00001000' ;Table entry 6
END
Lab 3: Lookup Table - Continued
39404142434445565859
TABLE addwf PCL,f ;Add offset to program counterretlw b’00000001' ;Table entry 0retlw b’00000011' ;Table entry 1retlw b’00000111' ;Table entry 2retlw b’00001111' ;Table entry 3retlw b’00001110' ;Table entry 4retlw b’00001100' ;Table entry 5retlw b’00001000' ;Table entry 6
END
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 89
Lab 5: Solution – Part 1Lab 5: Lookup Table
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1011121314151617181920
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0clrf INDEX ;Clear index into tablemovlw HIGH TABLE ;Load W with high byte of TABLE addressmovwf PCLATH ;Move W to PCLATH
;CONTINUED ON NEXT SLIDE
Lab 5: Lookup Table
123456789
1011121314151617181920
LIST p=16f877a
#include <p16f877a.inc>
cblock 0x020 COUNTERL COUNTERHendc
org 0x0000RESET_V goto START ;Reset Vector
START clrf PORTB ;Clear PORTB output latchesbsf STATUS,RP0 ;Switch to bank 1movlw b’11110000' ;Load value to make lower 4 bits outputsmovwf TRISB ;Move value to TRISBbcf STATUS,RP0 ;Switch to bank 0clrf INDEX ;Clear index into tablemovlw HIGH TABLE ;Load W with high byte of TABLE addressmovwf PCLATH ;Move W to PCLATH
;CONTINUED ON NEXT SLIDE
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 90
Lab 5: Solution – Part 2
Lab 3: Lookup Table - Continued
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LOOP movf INDEX,w ;Move INDEX to Wcall TABLE ;Call TABLEmovwf PORTB ;Move W to PORTBcall DELAY ;Call delayincf INDEX,f ;Increment INDEXmovlw 0x07 ;Load W with 0x07subwf INDEX,w ;Subtract W from INDEX, result in Wbtfsc STATUS,Z ;Is Z bit in STATUS set?clrf INDEX ;if yes, clear INDEXgoto LOOP ;Repeat loop
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
;CONTINUED ON NEXT SLIDE
Lab 3: Lookup Table - Continued
2223242526272829303132333435363738
LOOP movf INDEX,w ;Move INDEX to Wcall TABLE ;Call TABLEmovwf PORTB ;Move W to PORTBcall DELAY ;Call delayincf INDEX,f ;Increment INDEXmovlw 0x07 ;Load W with 0x07subwf INDEX,w ;Subtract W from INDEX, result in Wbtfsc STATUS,Z ;Is Z bit in STATUS set?clrf INDEX ;if yes, clear INDEXgoto LOOP ;Repeat loop
DELAY decfsz COUNTERL ;Decrement COUNTERLgoto DELAY ;If not zero, keep decrementing COUNTERLdecfsz COUNTERH ;Decrement COUNTERHgoto DELAY ;If not zero, decrement COUNTERL againreturn ;Return to main subroutine
;CONTINUED ON NEXT SLIDE
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 91
Lab 5: Solution – Part 3
Lab 3: Lookup Table - Continued
39404142434445565859
TABLE addwf PCL,f ;Add offset to program counterretlw b’00000001' ;Table entry 0retlw b’00000011' ;Table entry 1retlw b’00000111' ;Table entry 2retlw b’00001111' ;Table entry 3retlw b’00001110' ;Table entry 4retlw b’00001100' ;Table entry 5retlw b’00001000' ;Table entry 6
END
Lab 3: Lookup Table - Continued
39404142434445565859
TABLE addwf PCL,f ;Add offset to program counterretlw b’00000001' ;Table entry 0retlw b’00000011' ;Table entry 1retlw b’00000111' ;Table entry 2retlw b’00001111' ;Table entry 3retlw b’00001110' ;Table entry 4retlw b’00001100' ;Table entry 5retlw b’00001000' ;Table entry 6
END
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 92
Lab 5: Results
You have learned: How to implement a lookup table How to retrieve data from a lookup
table How to call a subroutine on another
page How to perform a computed goto
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 93
Summary
PIC16 Architecture PIC16 Instruction Set PIC16 Memory Organization Simple Programming Techniques
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 94
References
PICmicro® MCU Mid-Range Family Reference Manual (DS33023A)Microchip Technology
Programming and Customizing PICmicro Microcontrollersby Myke Predko
Design with PIC® Microcontrollersby John B. Peatman
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 95
References
123 PIC® Microcontroller Experiments for the Evil Geniusby Myke Predko
© 2005 Microchip Technology Incorporated. All Rights Reserved. Slide 96
Thank You
© 2006 Microchip Technology Incorporated. All Rights Reserved. 101 ASP Slide 97
Trademarks
The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KeeLoq, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
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