1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to...
-
Upload
kerrie-ford -
Category
Documents
-
view
216 -
download
0
description
Transcript of 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to...
![Page 1: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/1.jpg)
1
Other Transistor Topologies30 March and 1 April 2015
• The two gate terminals are tied together to form single gate connection; the source terminal is grounded
• The flow of electric charge through a PN JFET is controlled by constricting the current-carrying channel; the width of the channel is controlled by the gate voltage through varying the depletion region at the PN junction at the interface between the gate and the channel
• The current also depends on the electric field between source and drain
JFETJunction Field Effect Transistor
![Page 2: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/2.jpg)
2
Structure of JFET
• a long channel of n-type (N-channel) or p-type (p-channel) semiconductor. Two ohmic contacts with each at one end of the channel: the source and the drain
• The gate (control) terminal has doping opposite to that of the channel, so there is a PN junction at the interface between the junction and the channel. The contact from gate to outside is also ohmic.
N-channel JFET
![Page 3: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/3.jpg)
3
![Page 4: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/4.jpg)
4
![Page 5: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/5.jpg)
5
I-V relationship of PN JFET
Nonsaturation region (linear region)
Saturation region
![Page 6: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/6.jpg)
6
Other Features of PN JFET
Symbols of JFET (arrow represents the polarity of the PN junction)
• JFET is unipolar device since only majority carriers transport in the channel
• The source and drain region are interchangeable
• N-channel devices have greater conductivity than p-channel types, since electrons have higher mobility than holes
• The gate current is approximately zero since the PN junction is reverse biased
![Page 7: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/7.jpg)
7
Comparisons of Transistors
BJT MOSFET JFET
StructureNPN: n++p+nPNP: p++n+p
n(p)-type inversion layer structure as channelfrom S to D
Inversed biased PN junction between the gate and channel from S to D
Current transport Diffusion Drift Drift
Carriers involved in
current transport
Bipolar: electrons and holes
UnipolarNMOS: electronsPMOS: holes
Unipolar:N-channel: electronsP-channel: holes
Current at terminals
IC=βIB= (1/α) IE
(Forward active mode)
IC=f(VBE, VBC)
IG=0
ID=f(VGS, VDS)IG≈0
ID=f(VGS, VDS)
![Page 8: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/8.jpg)
Comparisons of Transistors (Cont’d)
BJT MOSFET JFET
Symbols
Applications
• Current-controlled current amplifier• Switch for digital signal• Discrete circuits
• Voltage-controlled current amplifier• Switch for digital signal• IC circuits
• Voltage-controlled current amplifier• Switch for digital signal• IC circuits• MESFET can be used in higher-frequency than PN-JFET due to higher electron mobility in GaAs
NPN PNP NMOS PMOS N-channel P-channel
8
![Page 9: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/9.jpg)
9
![Page 10: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/10.jpg)
10
![Page 11: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/11.jpg)
11
![Page 12: 1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.](https://reader036.fdocuments.us/reader036/viewer/2022062523/5a4d1b0a7f8b9ab05998a342/html5/thumbnails/12.jpg)
12