1 J.M. Heuser − Status of the Silicon Tracking System Johann M. Heuser CBM Collaboration Meeting...

J.M. Heuser − Status of the Silicon Tracking System 1

Johann M. Heuser

CBM Collaboration Meeting GSI, 15 April 2010

Status of the Status of the

CBM Silicon Tracking System CBM Silicon Tracking System


13 contributions from STS team

covering

simulations, beam test, detector tests, radiation hardness, demonstrator module, ladder + station engineering, FEE


STS Workgroup STS Workgroup


STS stationsSTS stations

• area, 8 stations: 3.2 m2

• number of sensors: 1068188 sensors, 2 cm × 6 cm 166 sensors, 4 cm × 6 cm714 sensors, 6 cm × 6 cm

• number of sectors: 756• number of r/o channels: 1.5 106

• number of FE chips: 1.2 104


CBM-MPD STS Consortium

Y. Murin

Engineering of STS modules & stationsEngineering of STS modules & stations


Building on technology developed for the ALICE Strip Tracker

module

ALICE ITS carbon fiber structure

front view of a (half)-station

front top view of a station

STS STS – mechanical support– mechanical support

Consortium - S. Igolkin, StPbU


STS assembly details

attaching sensors to carbon fibre support


STS ladder assemblySTS ladder assembly


STS ladder mockupSTS ladder mockup


Front-end board

bump-bonded low-power FE chip on a high-density circuit

Readout cables

* 4-layer* Al-14 m on Kapton-10 m * Shield + spacer layer * 1024 lines, 100-120 µm pitch* up to 60 cm long

Microstrip sensors

double sided, CBM01/CBM03

tab-bonding of cables to detectors and front-end board

Development of tracking modulesDevelopment of tracking modules


Module demonstrators 1-b'Module demonstrators 1-b'


• we have:– work hypothesis of STS layout– emerging engineering solutions on ladder and

station construction– beginning prototype work

• we need: – to consolidate the concept– build proof-of-principle ladder in 2011-2012– matching components– timely availability of components for this work


Sensors: 6 cm wide; 2-6 cm high; 1024 strips per

sensor; 15° stereo angle; 60 µm strip pitch ;

14STS station layout and simulation of the STS station layout and simulation of the hit recognition performancehit recognition performance A. Kotynia


15

• Complete chain of physical processes caused by charged particle traversing the detector

• Magnetic field influences collection of the charge on the strips

|B| = 1THoles: = 1.5°x = 8m

Electrons = 7.5°x = 40m

Realistic Realistic STS DigitizerSTS Digitizer

• Particle position in the sensor is obtained by using Center Of Gravity algorithm:

n

ii

n

iii

S

xSx

1

1

• Random noise is added according to a Gaussian distribution with standard deviation as an equivalent noise charge of the detector system


STS Digitizer – collected charge per strip16


Hit Finding EfficiencyHit Finding Efficiency17

large incidence angle


Channel dead time simulations

For minimum bias Au+Au collision at 25AGeV channel

occcupancy:Station 1 2 3 4 5 6 7 8

min occ 0.1 0.1 0.1 0.3 0.2 0.1 0.1 0.1

max occ 4.7 4.2 3.6 3.0 2.4 2.0 1.3 1.2

Channel dead time

Channel occupancy

Hit finding efficiency

occ>3.0 %(<1% of all

chips)

1.0 %<occ>3.0

%(12% of all

chips)

occ<1.0 %(88% of all

chips)

Probability of channel inefficiency

100 ns >3 % 1-3% < 1% 89.94 %

500 ns >15 % 5-15 % < 5 % 83.37 %

1000 ns >30 % 10-30 % <10 % 78.25 %

0 ns 91.17 %


19

Parameters set in

simulation ke- per ADC

channel

Hit finding

efficiency

Th: 4ke-

Nof bits Step

4-bits 2.00 2.00 90.35%90.35%5-bits 1.50 1.50

6-bits 1.00 1.00 90.44%90.44%7-bits 0.50 0.50

8-bits 0.25 0.25 91.05%91.05%20-bits 0.01 0.01 91.17%

19ADC resolution


• we have:– realistic model of the STS– various varations to it– insight in effects on the hit finding efficiency

and creation of data volume

• we need: – to further optimize the overall system– station layout– use the reconstructed hits or hit channels

efficiently in the tracking – (interface optimization, new stations, ...)overall performance counts

J.M. Heuser − Status of the Silicon Tracking System 2115th CBM collaboration meeting, April 12th, 2010

Performance test of STS demonstratorsPerformance test of STS demonstrators

A. Lymanets


FEB rev. B:• Every second channel bondable.• Still good for lab tests for timing studies or ADC response (without clustering).FEB rev. C:• All channels are usable• But thermal stability becomes an issue.Detector-FEB cable:• Turns out to work if shielded properly.Detectors of CBM01 and CBM02 type “behave” similarly (bad), poor charge collection at n-sides.

FEB 4nx:• Cooling plates improve thermal stability• Problems with surviving potential of the chips on board.• Beam time : vastly different count rates in different stations caused by the beam.


Energy calibration with Energy calibration with 241241AmAmUsing 300 μm pitch detector => no significant charge sharing

Energy gain = 110.6 e-/ADC cnt+ one can obtain pedestal energy (not necessarily zero)

Noise 460 e- @ 6 pF


Calibration lineCalibration line

Energy calibration is obtained, but extrapolated pedestal amplitude is ~3 kElectrons. Possible reasons: non-linearity, bias due to peak detector.


n-XYTER chipn-XYTER chip

Inpu

t pa

ds

Out

put

pads

Power lines

Power lines

current

current

Channel 127

Channel 0Test channel


Pedestal profile over channelsPedestal profile over channels

Pedestal “sag” is observed with maximum in channel #64To be addressed in the upcoming engineering run done in Heidelberg Univ. (H. K. Soltveit)

Crosstalk Crosstalk problemproblem

digital crosstalk – on the chip, not just directly between channels


• we have:– experience with the first complete system chains– developed lots of tools– but also destroyed equipment

• we need: – more objects, material, experienced fellows– built new tracking modules– overcome technology problems (e.g. PCBs at

cutting edge designs)– thorough long-term tests


Status of Front End Electronics: Status of Front End Electronics: n-XYTER PCBs & Power Supplyn-XYTER PCBs & Power Supply

V. Kleipa


N-XYTER FEB rev. DN-XYTER FEB rev. D

Modifications w.r.t. FEB_C:

Increased NXYTER bond pitch

0.3V drop LDOs used

Separated supply regulators

PT100 sensor out

Alternative connector for separated LVDs and common mode signals

Testpoints

New power connector

I2C and SPI spike filter

I2C reads now:Temperature

Current

Testchannels Slow, Fast

I2C RW:Serial EEprom for data storage

20 specimen under construction

wire-bonding: C. Simons


n-XYTER PCB Cooling Plate• Cooling Block for FEB_B, FEB_C and FEB_D

• Design by Carmen Simons

C. Simons


n-XYTER Demonstrator r/o boardn-XYTER Demonstrator r/o board

Input pitch 100um

PCB size 65mm x 80mm

Cooling of 14W power with bottom copper or Al plate

ADC device on bottom side

Ext. power supply regulation

Open task:

Staggered NXYTER bonds to one layer input fan

Data output connection


• FEE boards are critical for system studies

• we have:– hopefully now a reasonably stable board (rev. D)

• we need: – to move

• from 1-chip general purpose board (n-XYTER)• to intermediate 4-chip board for ladder tests (n-

XYTER)• to develop a concept and build a prototype of the 8-

chip board (STS-XYTER)• to do this: strengthen the team


Development of microstrip detectorsDevelopment of microstrip detectors

J. Heuser


CBM01

(2007)

CBM02 (2010)

(2010) close-up of a corner of CBM01

(2008) CBM03

CBM04

(parallel: ISTC01)GSI-CiS Erfurt


Close-up of a corner of CBM03 Close-up of a corner of CBM03


• we have:– essentially one vendor/production partner (CiS) – used CBM01 and CBM02 for prototyping work– indications that the charge collection is not fully

efficient and understood– set up framework for TCAD simulations

• we need: – to verify the charge collection properties– overcome stability issues – to set up a systematic characterization, new

material coming (CBM03, CBM04)– systematic irradiation studies


Development of radhard microstrip detectorsDevelopment of radhard microstrip detectors

S. Chatterji


3D strip detector simulation model

X-Y plane of the 3D grid. One can see there is a stereo angle on either side of 7.50.

3-D TCAD simulation tools “SYNOPSYS” Sub packages

SentaurusInspectTecplotSPICE (Mixed Mode)


Some Static Characteristics

CTotal = Cback+2*Cint

ENC α CTotal

Optimization needed to maximize breakdown voltage & minimize ENC


Optimizations of the detector design

strip pitch and width strip insulation


Impact of Radiation Damage

0.92.5*10-152.5*10-14CiOi Ev+0.36Donor

0.95.0*10-145.0*10-15VVVEc-0.46Acceptor

1.6132.0*10-142.0*10-15VVEc-0.42Acceptor

η (cm-1)σh (cm2)σe (cm2)Trap

Energy (eV)Type VBD ↑ with fluence

Current ↑ by 3 orders Rint ↓ with fluence Detailed study needed


Full system simulation

transient signal behavior in the detector

and in the readout cable


Beam pipe options in STSBeam pipe options in STS

S. Belogurov


Be: 4 LHC experiments, Belle, Cleo, CDF etc. 0.3 - 0.5 mm typical thickness Al: HERAb 0.3 mm with stiffening ribs. Information availabe, seems reproducible

Relevant background for window: LHCb VELO (Ø800 mm 2 mm Al alloy), machined from a forged billet together with the bellow.

SF for the LHCb Be beam pipe is 4-6, for window ~ 3

SF for the HERAb beampipe is ~2


“Ideal ” configurations.

Effects: cylinder-cone; Be-Al.

Al: window – scaling from VELO, cone – “simple” manufacturing.

“Realistic” configurations. Effects of bellows, width of “Tube”.

1.6º configuration fits to ladders of S. Igolkin without cutting the central rib.

Studied configurations

Any configuration has a weld 1x10 mm

Remarks.1) 0.3 mm Al = 0.5 mm Be

2) Competition works: JSC “Kompozit” started to think about 0.4 mm Be pipe


Results for UrQMD central events at 25 AGeVResults for UrQMD central events at 25 AGeV

window

welding

Range distribution


Results for UrQMD central events at 25 AGeV

/c

/c

No pipe

Comparison of Al and Be cones

No pipe

Lambda p pi-

K0 pi+ pi-

done as well for tubes

Al tube will do ?

System engineering, workshop in Fall 2010?


Project plan, iMoU, Writeups, TDRProject plan, iMoU, Writeups, TDR

Request by the Technical Coordinator:

Comprehensive Sub-System Note during Q3 2010

Design Review during Q1 2011 (CBM organized, external Reviewers)

TDR's in Q1 2012

Project plan within Interim Memorandum of Understanding DRAFT – being updated

Participating Institutes

Work share during R&D phase, Construction phase less clear

Tasks, timelines and deliverables

not covered tasks + teams

Costs

STS construction + commissioning timeline: adapt to new FAIR schedule


Test beam at GSI, 21-26 June 2010Test beam at GSI, 21-26 June 2010preliminary – beam scheduling meeting on 19 April

• cave C

• beam line HTD

• beam: Nitrogen

• 0.8 GeV/u

• on a target

1 J.M. Heuser − Status of the Silicon Tracking System Johann M. Heuser CBM Collaboration Meeting...

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