8/7/2019 1-CS AMP new

1/3

MEDI-CAPS INSTITUTE OF TECHNOLOGY & MANAGEMENT, INDORE: 453331.Dept. of Electronics & Comm. Engg. Lab Session No. 1 Page No. 1

CMOS CIRCUIT DESIGN (EC-802) Enrol. No. Batch No.

EXPERIMENT NO. 1

COMMON SOURCE AMPLIFIER

AIM:

Design a CS Amplifierusing Tanner Tool.

OBJECTIVE:

ToBuild a CS Amplifier and understand how it works.

PROBLEM STATEMENT:

1. After Simulation, ifCS Amplifieris not working there will be some fault incircuit then correct that and again simulate and check.

2. If output is not correct, then check the commands, models files which we are included.

NamePerforming on First

Submission

Second Submission

Extra regular

Grade and Remarks by the Tutor

1. Clarity about the objective of the experiment

2. Clarity about the problem statement

3. Submitted the work in desired format

4. Shown capability to solve the problem

5. Contribution to the team work.

Others:

Grade A B C D F signature

8/7/2019 1-CS AMP new

2/3

MEDI-CAPS INSTITUTE OF TECHNOLOGY & MANAGEMENT, INDORE: 453331.Dept. of Electronics & Comm. Engg. Lab Session No. 1 Page No. 1

CMOS CIRCUIT DESIGN (EC-802) Enrol. No. Batch No.

THEORY

Common-Source NMOS Amplifier

Although the MOS transistor is most famous for its use in digital circuits, it can also be usedas an amplifying device. Common Source amplifier simply means the input and outputterminals share the source of the amplifying transistor. One possible circuit implementationof a common-source amplifier is shown in Figure 1.

Figure 1.

We use graphical analysis to understand the qualitative operation of the common-sourceamplifier. In Figure 2 (a) we show typical NMOS transistor characteristics. On the horizontal

axis we plot Vds which is equal to the output voltage Vout. On the vertical axis we plot theDC drain current Id and vary the DC input bias voltage as a parameter. The MOS transistoris a square law device with a drain current that depends quadratically on the gate-sourcevoltage in the constant-current region.We plot a load line on the same graph as the MOS transistor characteristics. The equation ofthis line is given by

Vout = Vdd- IdRd

Using the load line analysis, we can graphically determine how the output voltage changeswith the input bias voltage and the value of the corresponding drain current. The currentthrough resistor Rd and the drain current Id are equal. Therefore, the operation point for thiscircuit occurs at the intersection of the load line and transistor characteristics. The specific

operating point is defined by setting either the drain current or the bias voltage.

To see the relationship between the voltage transfer function and the load line analysis, notewhere the MOS transistor is biased below its threshold voltage (cutoff) and no current isflowing . Under this condition the output voltage is equal to Vdd. As we increase the biasvoltage above the threshold voltage, drain current begins to flow and the output voltage fallsbelow Vdd. This output voltage rapidly fals toward a low voltage by further increasing thebias voltage.

8/7/2019 1-CS AMP new

3/3

MEDI-CAPS INSTITUTE OF TECHNOLOGY & MANAGEMENT, INDORE: 453331.Dept. of Electronics & Comm. Engg. Lab Session No. 1 Page No. 1

CMOS CIRCUIT DESIGN (EC-802) Enrol. No. Batch No.

Output result:

SELF ASSESMENT QUESTION:

1) Design and analysis of CS amplifier with diode connected and attach its output.

2) Build CS amplifier with PMOS current load and attach its output waveform?

3) What is the effect of source (degeneration) resistance on CS amplifier and attachits output.