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CMPE12 Summer 2009 01-3

The Transistor: Past and Present

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CMPE12 Summer 2009 01-4

Moores LawThe number of active components per chip will double every 18 months.

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CMPE12 Summer 2009 01-5

GPU Speed Compared to CPU

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How big is a transistor?

If a CPU die were as big as this wholeclassroom

A transistor would be

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p-type MOS transistorp-type is complementary to n-type

when Gate has positive voltage,open circuit between #1 and #2(switch open)

when Gate has zero voltage,short circuit between #1 and #2

(switch closed)

Gate = 1

Gate = 0

Terminal #1 must beconnected to +2.9V in

this example.

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Digital Values for Analog Signals

Use the switch behavior of MOS transistors to

implement logical functions: AND, OR, NOT

Digital symbols:

We assign a range of analog voltages to

each digital (logic) symbolAssignment of voltage ranges depends on

electrical properties of transistors being used

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Truth Table

The most basic

representation of a logicfunction

Lists the output for allpossible input

combinations How many rows of the

truth table needed? 2#inputs

X Y A B

OutputsInputs

X Y A B

OutputsInputs

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Truth Table: Inverter

Inverted signals are

denoted with an overbar Or with a prime symbol

A

Input Output

A Y = A

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AND gate

Add an inverter toa NAND.

A B C

0 0 0

0 1 0

1 0 0

1 1 1

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NOR Gate: NOT-OR

A B C

0 0 1

0 1 0

1 0 0

1 1 0

Note: Serial structure on top, parallelon bottom.

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CMPE12 Summer 2009 01-27

Synthesis of AOI Gates

AOI means AND-OR-Invert

Truth table to a AOI gate (transistor-level)

Recall:

PMOS (with the bubbles) on top

NMOS (no bubbles) on bottom

Series structure makes AND

Parallel structure makes OR

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CMPE12 Summer 2009 01-30

Synthesis of AOI Gates

Method 2: Sum of products for Y

Cover the zeros

Build pull-down branch first, using asserted inputs

Derive pull-up branch as a dual of the pull-downbranch

Y= VDD

Y

VSS

A B C Y

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 1

1 0 0 1

1 0 1 0

1 1 0 1

1 1 1 0

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