Post on 10-Jun-2019
1
Performance of CW Superconducting
Cavity at ERL test Facility
Feng QIU (KEK)
LLRF 2013, F. QIU
2
Main Content
LLRF 2013, F. QIU
Introduction
High Power Level RF system
Low Level RF system
Gain Scanning
Performance
Future Plan
Summary
3
Introduction
LLRF (2013), F. QIU
Compact ERL (cERL) is under construction as a test facility for the future 3-GeV
ERL project. It is a superconducting system and is operated in CW mode.
HLRF
3
Commissioning
of injector
started in April,
2013.
ERL Development Building
Construction Site@KEK
PF
PF-AR
Injector
Injector consists of 4 cavities: Buncher (NC),
Injector 1 (SC), Injector 2 (SC), Injector 3 (SC).
ML includes two 9-cell cavities (SC).
Layout of cERL
Two 9-cell
in ML (SC)
At present, the injector was constructed and the first beam commissioning was
performed from April to June of this year at cERL. The construction of the Main linac
would be carried out by October, 2013.
Entrance
HLRF (Power Source) At present, total 3 kinds of Power Sources are applied in cERL : 20-KW IOT, 25-
KW Klystron and 300 KW Klystron.
The 1.3 GHz 2-cell cavities are used as superconductive cavities.
LLRF (2013), F. QIU
0.1 % RMS, 0.1 deg. RMS for cERL
0.01%rms,0.01deg.rms for 3GeV-ERL
RF requirement
Buncher Injector1 Injector2 Injector3
Vector-sum
Controlling
300 kW Kly.25 kW Kly.
20-kW IOT 25-kW Kly. 300-kW Kly.
2-cell SC
IOT
1.3 GHz RF
Phase Shifter
0.4 MeV
~ 5 MeV
7 MV/m for Injector Cavities
ML
16 kW SSA 30 kW IOT 9-cell SC
Two 9-cell Cav. (SC)
NC SC SC SC
Dump
Will start operation at this Oct.
4
HLRF (Power Distribution System)
LLRF (2013), F. QIU
Rather narrow
space and
complicated
waveguide.
Vector-sum controlling
for Inj.2 and Inj. 3.
Outside shield
Inside shield
5
6
Low Level RF System
FPGA
Down-convertor
IQ Mod.
FPGA boards FPGA boards
Thermostatic Chamber
LLRF Cabinet
ADC: LTC 2208
Xillinx Virtex5 FPGA
ADC & DAC Interface
Digital I/O
uTCA Digital Board
Digital Board type Feature
ADC LTC2208 16 bits, 130 MHz (Max.)
DAC AD9783 16 bits, 500 MHz (Max.)
FPGA Virtex 5 FX 550 MHz (Max.), includes a Power PC with
Linux, EPICS is installed on the Linux.
16 bits, 130 MHz
LLRF (2013), F. QIU
7
Low Level RF System
EPCIS (Experimental Physics and
Industrial Control System) is installed
inside Micro TCA and is used as the DAQ
(data acquisition) system.
CSS (Control System Studio) is in charge
of the user interface programming.
We use Piezo+Motor for the tuner
controlling .
CSS Interface (user interface)
LLRF (2013), F. QIU
Schematic Diagram
Pr Pf
RF switch
Interlock
Klystron
PreAmp
IQ M
od
ulato
r
I
Q
baseband
1300 MHz
LO 1310MHz
16bit 80MS/s
MO 1300 MHz
Digital feedback board DIO(RF OFF)
IF =
10
MH
z (
MO
/12
8)
Do
wn
con
ver
tor
IQ
Correction
ADCIQ
Vector Sum
I
Q
+-
I_Set Table
-+
Q_Set Table
Delay
++
I_FF Table
Delay
++
Q_FF Table
I
Q
IQ
IQ
ADC
Correction
DAC
DAC
Limit
cossin
sincosA
ADC
ADC
DAC
DAC
FPGA
Power PC
EPICS IOC
CLK
Gb Ethernet
IQ
modula
tor
CAV2
1300MHz
Wave Forms Set Parameters
Linux
80MHz
IF 10 MHz I
Q
AMC Digital Feedback Card
DIO (RF OFF)
LTC2208AD9783
Dow
n
Convert
or
Klystron
Digital Filter
Digital Filter
)(cos)(sin
)(sin)(cos)(
tt
tttA
I
Q
CAV1
CAV2
1300 MHz
LO=1310 MHzAnalog filter
Amp.
P I
P IDigital Filter
Digital Filter
Xillinx Virtex 5 FPGA
Low Level RF System
1),1()1()()(: nynxnyIIR
FFPIController :
systemEPICS
LLRF (2013), F. QIU 8
9
Gain scanning (Definition of Gain) Gain-scanning: Scanning different proportional gain KP and integral Gain KI to
find out the optimal gains.
The scanning experiment was carried out at low RF field.
Definition of the KP and KI
Suppose on resonance
∫KI
KP
Cavity
FF
error
Delay
Disturbance
Δω
s
KIKPsK )(
sTes
sH
5.0
5.0)(
Set value
DACADC
Gain from ADC
to DAC (analog
part) is
normalized to be
0 dB, remaining
gains is only
contributed by
PI controller
LLRF (2013), F. QIU
10
Gain Scanning (Delay measurement) In order to acquire some priori information about the maximum gain, we have evaluated
the loop delay at first due to there is a relationship between the loop delay and the
maximum gains.
Loop delay is measured by exciting the system with square wave in the DAC output.
About 1 us loop delay
DAC ADC
Gain margin for Inj .1 ( suppose delay = 1 µs )
Inj .2 &3
Inj .1
LLRF (2013), F. QIU
Simulation Gain margin: Inj1=230, Inj. 2&3=100
Loop delay Inj. 1 Gain Margin
Operated in the pulse mode
Bondary
Bondary
11
Gain scanning (Critical gains) The Critical gain has measured by the KI=0, KP Scanning.
If the proportional gain is larger than the critical gain, the loop would be oscillated.
The simulation and the
measurement are in
agreement very well.
Stb Bun. Inj. 1 Inj. 2 Inj. 3
QL 1.1e4 1.2e6 5.8e5 4.8e5
f0.5 [kHz] 58 0.54 1.12 1.35
Inj. 1: Critical Gain=250
Inj. 2&3: Critical Gain=90
Gain Inj. 1 Inj. 2&3
Gain Margin (Sim. ) 230 100
Critical Gain (Meas. ) 250 90
Meas.
LLRF (2013), F. QIU
12
Gain scanning (Buncher)
High gain is not available for Buncher cavity (NC) due to its large bandwidth
(QL=1.1e4) .
Opt. KP
Opt. KI
Optimal Gains:
KPopt=0.8, KIopt=1.2e5.
Sensitive to KI
ΔA/A [%] Δθ [deg.]
ΔA/A [%] Δθ [deg.]
It is clear to see that the integral Gain
KI is dominant gain for the Buncher
cavity because of the limitation of high
proportional gain KP (not available ).
Stb Bun. Inj. 1 Inj. 2 Inj. 3
QL 1.1e4 1.2e6 5.8e5 4.8e5
f0.5 [kHz] 58 0.54 1.12 1.35
KI=const. KP scanning
KP=const. KI scanning
LLRF (2013), F. QIU
13
Gain scanning (Inj. 1)
KI=const. KP scanning
KP= const., KI scanning
The dominant gain in Inj. 1 is
proportional gain (KP), very
common in SC cavity controlling.
High gain controlling can be
realized due to its narrow
bandwidth.
Opt. KP
QL=1.2e6
Sensitive to KP
ΔA/A [%]
ΔA/A [%]
Δθ [deg.]
Δθ [deg.]
Opt. KI
Optimal Gains:
KPopt=84, KIopt=1.0e5.
High gain is available for Inj .1 cavities (SC).
Stb Bun. Inj. 1 Inj. 2 Inj. 3
QL 1.1e4 1.2e6 5.8e5 4.8e5
f0.5 [kHz] 58 0.54 1.12 1.35
LLRF (2013), F. QIU
14
Gain scanning (Inj. 2&3)
Both KI and KP have
an effect for Inj. 2&3.
KI is also significant
due to there is an 300 Hz
component in the HVPS.
KI=const., KP scanning
KP= const., KI scanning
Opt. KI
ΔA/A [%]
ΔA/A [%]
Δθ [deg.]
Δθ [deg.]
Opt. KP Optimal Gains:
KPopt=41, KIopt=1.1e5.
Stb Bun. Inj. 1 Inj. 2 Inj. 3
QL 1.1e4 1.2e6 5.8e5 4.8e5
f0.5 [kHz] 58 0.54 1.12 1.35
High gain is available for Inj .2 (SC) and Inj .3 (SC).
LLRF (2013), F. QIU
15
Gain scanning (Conclusion) Conclusions:
The proportional gain KP plays
an much more important roles in
SC cavity and it is usually located
in the ½ to ⅓ of the critical gains.
The integral gain KI is
significant in NC cavity due to the
limitation of the critical gains.
Inj .1 Inj .2 & 3
The performance would be best in the optimal
gain case.
The amplitude and phase stability of Inj. 1
and Inj. 2&3 can be 0.01% RMS and 0.02 deg.
RMS, respectively.
Gain Bun. Inj. 1 Inj. 2 Inj .3
Prop. Gain (KP) 0.8 84 41
Int. Gain (KI) 1.2e5 1.0e5 1.1e5
Critical Gain 3 230 90
f0.5 [kHz] 58 0.54 1.12 1.35
Vector-sum
About ½ to ⅓
Comparison btw the optimal gains and other gains.
LLRF (2013), F. QIU
0 1000 2000 3000 40001.555
1.56
1.565
1.57
1.575x 10
4
Channel
Am
plitude
ADC1: 0.14111%rms
0 1000 2000 3000 4000-107.5
-107
-106.5
-106
-105.5
-105
-104.5
-104
Channel
Phas
e(d
eg.
)
ADC1: 0.51122deg.rms
0 1000 2000 3000 40001.568
1.57
1.572
1.574
1.576
1.578
1.58
1.582x 10
4
Channel
Am
plitude
ADC2: 0.11541%rms
0 1000 2000 3000 4000-95.5
-95
-94.5
-94
-93.5
-93
-92.5
Channel
Phas
e(d
eg.
)
ADC2: 0.51486deg.rms
0 1000 2000 3000 40001.03
1.035
1.04
1.045
1.05
1.055x 10
4
Channel
Am
plitude
ADC3: 0.28656%rms
0 1000 2000 3000 40004
5
6
7
8
9
Channel
Phas
e(d
eg.
)
ADC3: 0.71094deg.rms
0 1000 2000 3000 40001.024
1.025
1.026
1.027
1.028
1.029
1.03x 10
4
Channel
Am
plitude
ADC4: 0.07367%rms
0 1000 2000 3000 4000
97.9
98
98.1
98.2
98.3
Channel
Phas
e(d
eg.
)
ADC4: 0.056184deg.rms
0 1000 2000 3000 40001.5592
1.5594
1.5596
1.5598
1.56
1.5602
1.5604
1.5606x 10
4
Channel
Am
plitude
FIL: 0.011756%rms
0 1000 2000 3000 4000-100.05
-100
-99.95
-99.9
-99.85
Channel
Phas
e(d
eg.
)
FIL: 0.022096deg.rms
0 1000 2000 3000 40001.76
1.78
1.8
1.82
1.84
1.86
1.88
1.9x 10
4
Channel
Am
plitude
DAC Amplitude
0 1000 2000 3000 400045
50
55
60
65
Channel
Phas
e(d
eg.
)
DAC Phase
FB2-P6000I200-7MV-rate799-WL130k-20130614-1.csv
16
0 1000 2000 3000 40001.097
1.098
1.099
1.1
1.101
1.102
1.103
1.104x 10
4
Channel
Am
plitude
ADC1: 0.080143%rms
0 1000 2000 3000 4000-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
Channel
Phas
e(d
eg.
)
ADC1: 0.077553deg.rms
0 1000 2000 3000 40001.545
1.55
1.555x 10
4
Channel
Am
plitude
ADC2: 0.084565%rms
0 1000 2000 3000 40000.8
0.9
1
1.1
1.2
1.3
1.4
1.5
Channel
Phas
e(d
eg.
)
ADC2: 0.077659deg.rms
0 1000 2000 3000 40009720
9740
9760
9780
9800
9820
Channel
Am
plitude
ADC3: 0.10138%rms
0 1000 2000 3000 4000-98.2
-98.1
-98
-97.9
-97.8
-97.7
-97.6
Channel
Phas
e(d
eg.
)
ADC3: 0.083565deg.rms
0 1000 2000 3000 40001.34
1.341
1.342
1.343
1.344
1.345
1.346
1.347x 10
4
Channel
Am
plitude
ADC4: 0.059251%rms
0 1000 2000 3000 4000128.6
128.7
128.8
128.9
129
129.1
Channel
Phas
e(d
eg.
)
ADC4: 0.046698deg.rms
0 1000 2000 3000 40001.0985
1.099
1.0995
1.1
1.1005
1.101
1.1015
1.102x 10
4
Channel
Am
plitude
FIL: 0.046782%rms
0 1000 2000 3000 4000-0.2
-0.1
0
0.1
0.2
Channel
Phas
e(d
eg.
)
FIL: 0.061938deg.rms
0 1000 2000 3000 40001.44
1.445
1.45
1.455
1.46
1.465
1.47x 10
4
Channel
Am
plitude
DAC Amplitude
0 1000 2000 3000 4000-0.5
0
0.5
1
1.5
2
2.5
Channel
Phas
e(d
eg.
)
DAC Phase
FBon-2013-0531-FB0-P20I40-IIR500k-deci799-1.csv
0 1000 2000 3000 40001.568
1.569
1.57
1.571
1.572
1.573
1.574x 10
4
Channel
Am
plitude
ADC1: 0.049341%rms
0 1000 2000 3000 400052.8
52.9
53
53.1
53.2
Channel
Phas
e(d
eg.
)
ADC1: 0.046456deg.rms
0 1000 2000 3000 40001.52
1.54
1.56
1.58
1.6
1.62x 10
4
Channel
Am
plitude
ADC2: 0.63453%rms
0 1000 2000 3000 400070
75
80
85
Channel
Phas
e(d
eg.
)
ADC2: 2.0584deg.rms
0 1000 2000 3000 40001.46
1.48
1.5
1.52
1.54
1.56x 10
4
Channel
Am
plitude
ADC3: 0.64748%rms
0 1000 2000 3000 400072
74
76
78
80
82
84
86
Channel
Phas
e(d
eg.
)
ADC3: 2.0586deg.rms
0 1000 2000 3000 40001.353
1.354
1.355
1.356
1.357
1.358
1.359
1.36x 10
4
Channel
Am
plitude
ADC4: 0.054301%rms
0 1000 2000 3000 4000151.8
151.9
152
152.1
152.2
152.3
Channel
Phas
e(d
eg.
)
ADC4: 0.047521deg.rms
0 1000 2000 3000 40001.5694
1.5696
1.5698
1.57
1.5702
1.5704
1.5706
1.5708x 10
4
Channel
Am
plitude
FIL: 0.010388%rms
0 1000 2000 3000 400052.9
52.95
53
53.05
53.1
Channel
Phas
e(d
eg.
)
FIL: 0.01807deg.rms
0 1000 2000 3000 40002.05
2.1
2.15
2.2
2.25x 10
4
Channel
Am
plitude
DAC Amplitude
0 1000 2000 3000 40000
2
4
6
8
10
12
14
Channel
Phas
e(d
eg.
)
DAC Phase
FB1-P13500I200-WL130k-deci799-20130620-21h48m-3.csv
FB0 (Buncher)
FB1 (Inj. 1)
Amp: 0.01% rms , Phase 0.02 deg. rms
Amp 0.05% rms, Phase 0.06 deg. rms
Performance (RF field) FB2 (Vector-sum of Inj. 2 and Inj. 3)
Amp: 0.01% rms, Phase 0.022 deg. rms
ΔA/A
[RMS]
Δφ
[RMS]
Loop
Delay
Bun. 0.05% 0.06 deg. 1.1 μs
Inj. 1 0.01% 0.02 deg. 1.1 μs
Inj. 2&3 0.01% 0.02 deg. 1.1 μs
Our Goal:
0.1% for amplitude and 0.1 deg. for phase.
300 Hz fluc. from HV
Power Supply
No 300 Hz fluc.
Selections of KP and KI are based on the gain scanning experiment!
LLRF (2013), F. QIU
100 kS/s
100 kS/s
17
Performance (Screen Monitor) The beam momentum is measured by screen monitor and determined by the peak
point of the projection of the screen.
Momentum was determined by the peak point
of the projection of the screen.
Dispersion @ screen
monitor = 0.82m
Resolution = 53.4 m/pixel
(P/P=6.5e-5)
Screen Monitor
Attention: Vector-sum error would influence
the beam momentum jitter greatly! Thus the
phase error btw inj. 2 and inj. 3 should be
optimized at first!
LLRF (2013), F. QIU
Momentum Jitter= 0.006% rms
Result of the screen monitor
Beam Energy 0 50 100 150 200 250 300 350 400 450 500
-0.3
-0.2
-0.1
0
0.1
0.2
time(s)
dP/P
(%)
FB2 LG:dP/P= 0.063607% rms HG:dP/P=0.0056858% rms
FB1HG&FB2LGFB1HG&FB2HG
-0.4 -0.2 0 0.2 0.40
20
40
60
80
Num
ber
dP/P (%)
FB2LG: dP/P= 0.063607% rms
-0.02 -0.01 0 0.01 0.020
100
200
300
400
500
Num
ber
dP/P (%)
FB2HG: dP/P= 0.0056858% rms
Performance (Beam energy)
18 LLRF (2013), F. QIU
19
Future Plan Whole cERL operation would be carried out in October of 2013. At that moment, we
will operate the main Linac 9-cell cavity.
There are total 9 modes in the 9-cell cavity, only the is selected as the accelerating
mode .The 8/9 mode which is closed to mode should be suppressed (otherwise, it
would influence the system stability).
The frequency of 8/9 mode of our cavity is about 1.6 MHz, we should remove it by
digital filter, the current 1st order IIR filter would only has about 24 dB suppression at 1.6
MHz with100 kHz bandwidth.
1,)1(1
)(:
),1()1()()(:
jejHFrequency
nynxnyTime
Obviously, the current 1st IIR
filter is not competent!
We should select other IIR
filters.
LLRF (2013), F. QIU
20
Future Plan Possible solutions:
a)Increasing the order of the filter (connecting the 1st order low pass IIR filter in
series).
b)Application of the notch filter (band stop filter).
IIR LP +IIR LP
IIR LP + Notch
Which would be better!
We will compare.
Notch
Step response shows the Notch
filter is attractive choice with
same bandwidth (100 kHz) Step response of “Notch+LP” and “LP+LP”
LP LP
LP
All with 100 kHz BW
LLRF (2013), F. QIU
21
Summary
Summary
Construction of the RF system for cERL-injector was finished.
Optimal gains has been determined in the operation.
The power supply caused 300 Hz fluctuation is suppressed by high
gain controlling.
RF field requirements is satisfied.
Very good beam momentum.
LLRF (2013), F. QIU
22
Question?
Thank you very much for your attending
LLRF (2013), F. QIU
23
Back up
LLRF (2013), F. QIU
Performance (300 Hz Fluctuation) The 300 Hz fluc. at Inj2&3 and Buncher cavity during CL/OL operation. This 300 Hz
fluctuation would influence the system performance.
The Inj. 1 LLRF system doesn’t not has evident dominant components.
24 Study at cERL (2013)
300 Hz Fluc.
300 Hz Fluc. Bun.
Inj.1
Inj.2&3
Amp. Pha. Pha. (FFT)
No dominant
25
Performance(300 Hz fluc. suppression) The Power supply is the main source of the 300 Hz component.
The RF fluctuation agrees well with the PS fluctuation (suppose 10 deg /HV%, then
the 20mV fluctuation in PS will lead to 10 deg×(100×25mv/15V) = 1.67 deg ).
Fluc. @ 300 Hz Buncher Inj2&3 (VS)
Open loop ΔA/A -43.5 [dB] -46 [dB]
Δθ 0.9 [deg.] 1.6 [deg.]
Closed loop
(KI=5500, KP=0)
ΔA/A -54 [dB] -56.5 [dB]
Δθ 0.3 [deg.] 0.5 [deg.]
300 KW Kly. High Voltage
Cavity input (OL)
0.5 deg. 1.6 deg. Closed-loop
Scope
Spectrum
Open-loop
Cavity Pick up (CL)
Clear to see that the
300 Hz component is
suppressed by CL
operation.
FFT
Study at cERL (2013), F. QIU
26
Gain scanning (300 Hz suppression)
Study at cERL (2013), F. QIU
The 300 Hz fluctuation would be suppressed by higher gains.
KI=0 case
∫ki
kp
Cavity
Kly/IOT
DACADC
Loop delay
FF
Pf
SET Value
ADC
Pt
H(s)
K(s)
Disturbance (E.g. 300 Hz fluc.)
Δω Detuning
Cavity
Kly/IOT
DAC
Loop delay
FF
Pf
ADC
Pt
H(s)
Disturbance (E.g. 300 Hz fluc.)
Δω Detuning
Open loopClosed loop
No disturbance suppression! Disturbance suppression: H(s)/(1+K(s)H(s))
27
Performance(300 Hz fluc. suppression)
Study at cERL (2013), F. QIU
The 300 Hz component is suppressed by high gains.
The simulation agrees well with
the measured one
Suppression of 300 Hz component
Meas. vs. Simulation
About 20 dB suppression when
increasing KP by 9 times. Spectrum of pick up signal
Sim.
Meas.
~20 dB
28
Fluctuation at 300 Hz (Source)
According to current controlling parameter (KI=10, KP=0), the 300 Hz component
is suppressed by ~10 dB (~3 times), not enough.
10 dB suppression
@ 300 Hz (with KI=10, KP=0)
Study at cERL (2013), F. QIU
Fluc. @ 300 Hz Buncher Inj2&3 (VS)
Open loop ΔA/A -43.5 [dB] -46 [dB]
Δθ 0.9 [deg.] 1.6 [deg.]
Closed loop
(KI=10, KP=0)
ΔA/A -54 [dB] -56.5 [dB]
Δθ 0.3 [deg.] 0.5 [deg.]
29
Performance (Vector-sum controlling)
Study at cERL (2013), F. QIU
We have used the vector-sum controlling for Inj. 2 and Inj. 3 (see page 4&5 in this
report).
For vector-sum controlling, the measured vector-sum (M+N) which is seen by the
FPGA or DSP is different from the true accelerating voltage which is seen by the
beam (m+n).
The calibration (phase or amplitude) error would result of vector-sum error
Calibration factor
Vector seen by beamVector seen LLRF (Meas.)
m
n
MN1cP
2cP
Phase Calibration Error
neAmeANMV
nmV
cc jPjP
M
B
21
21
Open Loop
m
n
M1cP
2cPClosed loop
N
Detuning
P QSame point
Not same
30
Performance (Vector-sum controlling)
Study at cERL (2013), F. QIU
Suppose the detuning comply with 1 deg. RMS Gauss distribution, similar with the
measured result, then the 45 deg. Phase calibration error would result of 0.47% RMS .
. amplitude vector-sum error.
45 deg. calibration error
would result of 0.47% RMS
vector-sum error!
About 0.47% RMS amplitude error
Distribution histogram of the
detuning, similar with Gauss
distribution.
About 1 deg. RMS Zoom!
About 45 deg.
31
Gain scanning (definition) Gain scanning: determine the optimal controlling gains (@ 2MV).
Definition of the integral and proportional gains . I. FPGA input parameter KP and KI.
II. Digital Gain Kp and Ki.
III. Analog Gain kp and ki.
IV. Real Gains: ASet/(ASet-AMeas.)
Study at cERL (2013), F. QIU
Gains Integral Proportional
FPGA KI KP
Dig. Ki=KI/218 Kp=KP/27
Ana. ki=Ki/TS(1) kp=Kp
Real ≈ ki*Gop(2)
≈ kp*Gop
1 .TS is FPGA sampling clock period (TS= 1/162.5e6 in cERL LLRF system)
2. Gop is the open-loop gain (Gains from FF to SEL(Fil) during the open-loop operation. For the Inj1 and Inj2&3, Gop ≈ 1 (0 dB).)
KI&KP (FPGA) vs. Ki&Kp (dig.)
Ki (dig.) vs. ki (ana.)
₋₁ z
Ki(digital)
1/s
∫
ki(analog)
kiKi
1/8 1/16
1/8
₋₁ z
∑ 1/32768
I/Q in
KP(FPGA)
KI(FPGA)
I/Q out
FF
Kp (Digital)
Ki (Digital)
ki&kp (ana.) vs. real gain ASet/(ASet-AMeas.)
1/s
∫
ki(analog)
ki
kp(analog)
kp
Cavity
Kly/IOT
DAC
Loop delay
FF
Gop