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7/21/2019 Lesson 1 How a Program Executes 2015
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Operating system
• What is an operating system? Some definitions:
• A program that is executed by the processor thatfrequently relinquishes control and must dependon the processor to regain control.
• A program that mediates between application
programs and the hardware
• A set of procedures that enable a group of peopleto use a computer system.A program that controls the execution of
application programs• An interface between applications and hardware
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What is a program?
• A sequence of steps
• For each step an arithmetic or logicaloperation is done
• For each operation a different set of
control signals is needed
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Function of Control Unit
• For each operation a unique code ispro!ided
"e.g. A## $%&'
• A hardware segment accepts the code and
issues the control signals
• We ha!e a computer(
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Components
• )he *ontrol +nit and the Arithmetic and,ogic +nit constitute the *entral-rocessing +nit
• #ata and instructions need to get into the
system and results out"nput/output
• )emporary storage of code and results isneeded
"$ain memory
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Computer Components:
Top Level View
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How a program wors
• #ata and instructions are stored in asingle read0write memory
• )he contents of this memory areaddressable by location
• 'xecution occurs in a sequentialfashion1normally2 from one instruction tothe next.
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!nstruction Cycle
• )wo steps:
"Fetch
"'xecute
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Fetch Cycle
• -rogram *ounter 1-*2 holds address ofnext instruction to fetch
• -rocessor fetches instruction frommemory location pointed to by -*
• ncrement -*"+nless told otherwise
• nstruction loaded into nstruction3egister 132
• -rocessor interprets instruction andperforms required actions
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Four main categories of instructions
• -rocessor0memory
"data transfer between *-+ and main memory
• -rocessor /%
"#ata transfer between *-+ and /% module
• #ata processing"Some arithmetic or logical operation on data
• *ontrol
"Alteration of sequence of operations"e.g. 4ump
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"#ample of $rogram "#ecution
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!nterrupts
• $echanism by which other modules 1e.g./%2 may interrupt normal sequence ofprocessing 1fetch 5 execute cycle2
• -rogram
"e.g. o!erflow di!ision by 6ero• )imer
"7enerated by internal processor timer
"+sed in pre0empti!e multi0tas8ing
• /%
"from /% controller
• 9ardware failure
"e.g. memory parity error
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$rogram Flow Control
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!nterrupt Cycle
• Added to instruction cycle
• -rocessor chec8s for interrupt
"ndicated by an interrupt signal
• f no interrupt fetch next instruction
• f interrupt pending:"Suspend execution of current program
"Sa!e context
"Set -* to start address of interrupt handlerroutine
"-rocess interrupt
"3estore context and continue interrupted
program
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Transfer of Control via !nterrupts
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!nstruction Cycle with !nterrupts
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$rogram Timing
%hort !&O Wait
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!nstruction Cycle 'with !nterrupts( )
%tate *iagram
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Changes in Memory and Registers for anInterrupt
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Changes in Memory and Registers for anInterrupt
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+ultiple !nterrupts
• #isable interrupts
"-rocessor will ignore further interrupts whilstprocessing one interrupt
"nterrupts remain pending and are chec8edafter first interrupt has been processed
"nterrupts handled in sequence as they occur
• #efine priorities
",ow priority interrupts can be interrupted by
higher priority interrupts"When higher priority interrupt has been
processed processor returns to pre!iousinterrupt
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+ultiple !nterrupts ) %e,uential