Designing Combinational Logic Circuits in Verilog - 2 Discussion 7.3.

Designing Combinational Logic Circuits in Verilog - 2

Discussion 7.3

• Binary to Gray code converter

• Gray code to binary converter

• Binary-to-BCD converter

Gray Code

One method for generating a Gray code sequence:Start with all bits zero and successively flip the right-most bit that produces a new string.

Binary coding {0...7}: {000, 001, 010, 011, 100, 101, 110, 111}

Gray coding {0...7}: {000, 001, 011, 010, 110, 111, 101, 100}

Definition: An ordering of 2n binary numbers such that only one bit changes from one entry to the next.

Not unique

Binary coding {0...7}: {000, 001, 010, 011, 100, 101, 110, 111}

Gray coding {0...7}: {000, 001, 011, 010, 110, 111, 101, 100}

Binary - Gray Code ConversionsGray code: G[i], i = n – 1 : 0Binary code: B[i], i = n – 1 : 0

Convert Binary to Gray: Copy the most significant bit. For each smaller iG[i] = B[i+1] ^ B[i]

Convert Gray to Binary: Copy the most significant bit. For each smaller iB[i] = B[i+1] ^ G[i]

Gray Code

Note that the least significant bit that can be changed without repeating a value is the bit that is changed

000000

001001

010011

011010

100110

101111

110101

111100

BinaryB[2:0]

Gray CodeG[2:0]

Binary to Gray code

G[2] = B[2];G[1:0] = B[2:1] ^ B[1:0];

B[j] G[j]

Binary to Gray code

grayCode = binary ^ (binary >> 1)

G(msb) = B(msb);for(j = msb-1; j >= 0; j=j-1) G(j) = B(j+1) ^ B(j);

msb = 5 for 6-bit codes

bin2gray.v

module bin2gray ( B ,G );

input [3:0] B ;wire [3:0] B ;

output [3:0] G ;wire [3:0] G ;

assign G[3] = B[3];assign G[2:0] = B[3:1] ^ B[2:0];

endmodule

Binary to Gray Code Conversion

Binary coding {0...7}: {000, 001, 010, 011, 100, 101, 110, 111}

Gray coding {0...7}: {000, 001, 011, 010, 110, 111, 101, 100}

Binary - Gray Code ConversionsGray code: G[i], i = n – 1 : 0Binary code: B[i], i = n – 1 : 0

Gray Code

000000

001001

010011

011010

100110

101111

110101

111100

BinaryB[2:0]

Gray CodeG[2:0]

Gray code to Binary

B[2] = G[2];B[1:0] = B[2:1] ^ G[1:0];

B[j]G[j]

Gray code to Binary

B(msb) = G(msb);for(j = msb-1; j >= 0; j--) B(j) = B(j+1) ^ G(j);

module gray2bin6 ( G ,B );

input [5:0] G ;wire [5:0] G ;

output [5:0] B ;wire [5:0] B ;

assign B[5] = G[5];assign B[4:0] = B[5:1] ^ G[4:0];

endmodule

B(msb) = G(msb);for(j = msb-1; j >= 0; j=j-1) B(j) = B(j+1) ^ G(j);

Gray code to Binary

gray2bin.v

module gray2bin ( G ,B );

input [3:0] G ;wire [3:0] G ;

output [3:0] B ;reg [3:0] B ;integer i;

always @(G) begin

B[3] = G[3];for(i=2; i >= 0; i = i-1) B[i] = B[i+1] ^ G[i];

endmodule

Gray Code to Binary Conversion

Shift and Add-3 Algorithm S1. Shift the binary number left one bit.22. If 8 shifts have taken place, the BCD number is in the

Hundreds, Tens, and Units column.33. If the binary value in any of the BCD columns is 5 or greater,

add 3 to that value in that BCD column.44. Go to 1.

Operation Hundreds Tens Units Binary HEX F F Start 1 1 1 1 1 1 1 1

Shift 1 1 1 1 1 1 1 1 1 Shift 2 1 1 1 1 1 1 1 1 Shift 3 1 1 1 1 1 1 1 1 Add 3 1 0 1 0 1 1 1 1 1 Shift 4 1 0 1 0 1 1 1 1 1 Add 3 1 1 0 0 0 1 1 1 1 Shift 5 1 1 0 0 0 1 1 1 1 Shift 6 1 1 0 0 0 1 1 1 1 Add 3 1 0 0 1 0 0 1 1 1 1 Shift 7 1 0 0 1 0 0 1 1 1 1 Add 3 1 0 0 1 0 1 0 1 0 1 Shift 8 1 0 0 1 0 1 0 1 0 1 BCD 2 5 5

Steps to convert an 8-bit binary number to BCD

Truth table for Add-3 Module

A3 A2 A1 A0 S3 S2 S1 S0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 1 0 1 0 0 0 1 0 0 0 1 0 1 1 0 0 0 0 1 1 0 1 0 0 1 0 1 1 1 1 0 1 0 1 0 0 0 1 0 1 1 1 0 0 1 1 1 0 0 1 0 1 0 X X X X 1 0 1 1 X X X X 1 1 0 0 X X X X 1 1 0 1 X X X X 1 1 1 0 X X X X 1 1 1 1 X X X X

A3 A2 A1 A0

S3 S2 S1 S0

A3 A2 A1 A0 S3 S2 S1 S0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 1 0 1 0 0 0 1 0 0 0 1 0 1 1 0 0 0 0 1 1 0 1 0 0 1 0 1 1 1 1 0 1 0 1 0 0 0 1 0 1 1 1 0 0 1 1 1 0 0 1 0 1 0 X X X X 1 0 1 1 X X X X 1 1 0 0 X X X X 1 1 0 1 X X X X 1 1 1 0 X X X X 1 1 1 1 X X X X

K-Map for S3

00 01 11 10

S3 = A3| A2 & A0| A2 & A1

0 B6 B5 B4 B3 B2 B1 B0

P7 P6 P5 P4 P3 P2 P1 P0P9 P8

8-bit binary input

BCD output

hunds tens units

1 1 1 1 1 1 1 1

1 0 1 0

1 0 0 0

1 1 0 0 0 1

1 0 0 1 0 0 1 1

1 0 0 1 0 1 0 1 0 1

Hex FF

Binary-to-BCDConverter

RTL Solution

Operation Tens Units Binary

B 5 4 3 2 1 0

HEX 3 F

Start 1 1 1 1 1 1

Shift 1 1 1 1 1 1 1

Shift 2 1 1 1 1 1 1

Shift 3 1 1 1 1 1 1

Add 3 1 0 1 0 1 1 1

Shift 4 1 0 1 0 1 1 1

Add 3 1 1 0 0 0 1 1

Shift 5 1 1 0 0 0 1 1

Shift 6 1 1 0 0 0 1 1

BCD 6 3 P 7 4 3 0

z 13 10 9 6 5 0

Steps to convert a 6-bit binary number to BCD

1. Clear all bits of z to zero2. Shift B left 3 bits

z[8:3] = B[5:0];3. Do 3 times if Units >4 then add 3 to Units (note: Units = z[9:6]) Shift z left 1 bit4. Tens = P[6:4] = z[12:10] Units = P[3:0] = z[9:6]

0 B5 B4 B3 B2 B1 B0

P7 P6 P5 P4 P3 P2 P1 P0

6-bit binary input

BCD output

tens units

1 1 1 1 1 1

1 0 1 0

1 0 0 0

1 1 0 0 0 1 1

Hex 3F

module binbcd6(B,P);input [5:0] B;output [6:0] P;reg [6:0] P;reg [12:0] z;integer i;

always @(B) begin for(i = 0; i <= 12; i = i+1)

z[i] = 0; z[8:3] = B; for(i = 0; i <= 2; i = i+1)

begin if(z[9:6] > 4) z[9:6] = z[9:6] + 3; z[12:1] = z[11:0];

endP = z[12:6];

end endmodule

B 5 4 3 2 1 0

HEX 3 F

Start 1 1 1 1 1 1

Shift 1 1 1 1 1 1 1

Shift 2 1 1 1 1 1 1

Shift 3 1 1 1 1 1 1

Add 3 1 0 1 0 1 1 1

Shift 4 1 0 1 0 1 1 1

Add 3 1 1 0 0 0 1 1

Shift 5 1 1 0 0 0 1 1

Shift 6 1 1 0 0 0 1 1

BCD 6 3 P 7 4 3 0

z 13 10 9 6 5 0

binbcd6.v

B 5 4 3 2 1 0

HEX 3 F

Start 1 1 1 1 1 1

Shift 1 1 1 1 1 1 1

Shift 2 1 1 1 1 1 1

Shift 3 1 1 1 1 1 1

Add 3 1 0 1 0 1 1 1

Shift 4 1 0 1 0 1 1 1

Add 3 1 1 0 0 0 1 1

Shift 5 1 1 0 0 0 1 1

Shift 6 1 1 0 0 0 1 1

BCD 6 3 P 7 4 3 0

z 13 10 9 6 5 0

0 B5 B4 B3 B2 B1 B0

P7 P6 P5 P4 P3 P2 P1 P0

6-bit binary input

BCD output

tens units

1 1 1 1 1 1

1 0 1 0

1 0 0 0

1 1 0 0 0 1 1

Hex 3Fbinbcd6.v

module binbcd8(B,P);input [7:0] B;output [9:0] P;

reg [9:0] P;reg [17:0] z;integer i;

z[i] = 0; z[10:3] = B;

for(i = 1; i <= 5; i = i+1)begin if(z[11:8] > 4) z[11:8] = z[11:8] + 3; if(z[15:12] > 4) z[15:12] = z[15:12] + 3;

z[17:1] = z[16:0]; end

P = z[17:8]; end endmodule

Operation Hundreds Tens Units Binary B 7 4 3 0

HEX F F Start 1 1 1 1 1 1 1 1

P 9 8 7 4 3 0 z 17 16 15 12 11 8 7 4 3 0

binbcd8.v

0 B6 B5 B4 B3 B2 B1 B0

P7 P6 P5 P4 P3 P2 P1 P0P9 P8

8-bit binary input

BCD output

hunds tens units

1 1 1 1 1 1 1 1

1 0 1 0

1 0 0 0

1 1 0 0 0 1

1 0 0 1 0 0 1 1

1 0 0 1 0 1 0 1 0 1

Hex FF

Operation Hundreds Tens Units Binary B 7 4 3 0

HEX F F Start 1 1 1 1 1 1 1 1

P 9 8 7 4 3 0 z 17 16 15 12 11 8 7 4 3 0

binbcd8.v

0 B6 B5 B4 B3 B2 B1 B0

P7 P6 P5 P4 P3 P2 P1 P0P9 P8

8-bit binary input

BCD output

hunds tens units

1 1 1 1 1 1 1 1

1 0 1 0

1 0 0 0

1 1 0 0 0 1

1 0 0 1 0 0 1 1

1 0 0 1 0 1 0 1 0 1

Hex FF

module binbcd9(B,P);input [8:0] B;output [10:0] P;

reg [10:0] P;reg [19:0] z;integer i;

always @(B)begin

for(i = 0; i <= 19; i = i+1)z[i] = 0;

z[11:3] = B;

for(i = 0; i <= 5; i = i+1) begin if(z[12:9] > 4)

z[12:9] = z[12:9] + 3; if(z[16:13] > 4)

z[16:13] = z[16:13] + 3; z[19:1] = z[18:0]; end

P = z[19:9]; end endmodule

0 B8 B7 B6 B5 B4 B3 B2 B1 B0

P9 P8 P7 P6 P5 P4 P3 P2 P1 P0

9-bit Binary Input

Hundreds Tens Units

BCD Output

Figure 5. 9-bit Binary-to-BCD Converter

binbcd9.v

0 B8 B7 B6 B5 B4 B3 B2 B1 B0

P9 P8 P7 P6 P5 P4 P3 P2 P1 P0

9-bit Binary Input

Hundreds Tens Units

BCD Output

Figure 5. 9-bit Binary-to-BCD Converter

B150 B14 B13 B12 B11B10 B9 B8

16-bit binary input

B7 B6 B5 B4 B3 B2 B1 B0

BCD output

hundreds tens units

C7C17C24

C8C18C25

C9C19C26

C11C21C28C32

C12C22C29C33

C13C23C30C34

C10C20C27C31

thousandsten thousands

P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0P19 P17P18 P16

16-bitBinary-to-BCDConverter

module binbcd16(B,P);

input [15:0] B;

output [18:0] P;

reg [18:0] P;

reg [31:0] z;

integer i;

B150 B14 B13 B12 B11B10 B9 B8

16-bit binary input

B7 B6 B5 B4 B3 B2 B1 B0

BCD output

hundreds tens units

C7C17C24

C8C18C25

C9C19C26

C11C21C28C32

C12C22C29C33

C13C23C30C34

C10C20C27C31

binbcd16.v

z[i] = 0; z[18:3] = B;

for(i = 0; i <= 12; i = i+1) begin

if(z[19:16] > 4)z[19:16] = z[19:16] + 3;

if(z[23:20] > 4) z[23:20] = z[23:20] + 3;

if(z[27:24] > 4) z[27:24] = z[27:24] + 3;

if(z[31:28] > 4) z[31:28] = z[31:28] + 3;

z[31:1] = z[30:0]; end P = z[31:16]; end endmodule

B150 B14 B13 B12 B11B10 B9 B8

16-bit binary input

B7 B6 B5 B4 B3 B2 B1 B0

BCD output

hundreds tens units

C7C17C24

C8C18C25

C9C19C26

C11C21C28C32

C12C22C29C33

C13C23C30C34

C10C20C27C31

B150 B14 B13 B12 B11B10 B9 B8

16-bit binary input

B7 B6 B5 B4 B3 B2 B1 B0

BCD output

hundreds tens units

C7C17C24

C8C18C25

C9C19C26

C11C21C28C32

C12C22C29C33

C13C23C30C34

C10C20C27C31

binbcd16.v

Designing Combinational Logic Circuits in Verilog - 2 Discussion 7.3.

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