Course: High-Speed and Low- Power VLSI (97.575) Professor: Maitham Shams Presentation: Presentation:...

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Outline Introduction Adiabatic – Switching Circuits True Single-Phase adiabatic Circuit Results Conclusion References

Transcript of Course: High-Speed and Low- Power VLSI (97.575) Professor: Maitham Shams Presentation: Presentation:...

Course: High-Speed and Course: High-Speed and Low-Power VLSI  (97.575)Low-Power VLSI  (97.575)

Professor: Professor: Maitham Maitham ShamsShams

PresentationPresentation: : True True Single-Phase Adiabatic Single-Phase Adiabatic

CircuitryCircuitryBy By

Ehssan HosseinzadehEhssan HosseinzadehSpecial StudentSpecial Student

OutlineOutline

IntroductionAdiabatic – Switching CircuitsTrue Single-Phase adiabatic CircuitResultsConclusionReferences

IntroductionIntroduction

Importance of Reducing Power DissipationTechniques

=>Parallelism => Pipeline=> Transformation=> Reduce the Chip wide Supply

voltage=> Energy Recovery

Conventional Energetic

Swinging voltage on capacitor:- Zero => V-V => ZeroEngergy dissipation per transition E= ½ CV2

Adiabatic - Switching Circuits

Recovery Energy

Adiabatic - Switching Circuits

Ediss= P. T = I2 . R .T

= (RC/T) CV2

True Single-Phase adiabatic Circuit

Different Approaches: Signal voltage swing > Vt of CMOS

=> Adiabatic AmplificationDynamic logic families=> 2N2P, 2N-2N2P,

=> True Signle-Phase Energy-Recovery Logic (TSEL) => Source–Coupled Adiabatic Logic (SCAL)

True Single-Phase Energy-Recovery Logic (TSEL)

Cascades are composed of alternating PMOS and NMOS gatesTSEL GATES

True Single-Phase adiabatic Circuit

PMOS DP:Vpc: H-LVpc VRP - |vtp|

EP:•Vin: H , Vpc:L•Vpc < VRP - |vtp|•Ddp > |Vtp| •Vpc VRP - |vtp|

NMOSEN:•Vpc > VRN + |vtn|

CN:•Vpc VRN + |vtn|

TSEL CascadesTSEL Cascades

TSEL Cascades are built by stringing together alternating PMOS and NMOS gates

SCAL GatesSCAL Gates

Single Phase power Clock Operation

Tunable Current Source at each Gate

Vpc

Vbp

Vbn

DP:Vpc: H-LAdiabatlically tillVpc > |Vtp|EP:Vpc: L-HVbp increaseVdd - |Vbp| > |Vtp|Vpc < Vxp - |Vtp|Dpp > |Vtp|Vpc > Vxp - |Vtp|

SCAL CascadesSCAL Cascades

ResultsResults

8-bit Carry-Lookahead adder (CLAs)Developed in Static CMOS, PAL, 2N2P, TSEL, SCAL (0.5um)

Freq: 10 –200 MHzSCAL CLA => 1.5 – 2.5 times more

efficient than PAL, 2N2PSCAL CLA => 2 – 5 times less dissipative

than purely combinational or pipelined CMOS

ConclusionConclusion

True Single-phase adiabatic logic family:TSEL, SCALSource-coupled variant of TSEL => Increase energy efficiency by using tunable current source Avoid the problems:

Multiple Power-clock schemes- Increased energy dissipation- Layout Complexity in clock distribution,- Clock Skew- Multiple power–clock generator

ReferencesReferences

True Single Phase Adiabatic Circuitry, Suhwan Kim and Mario PapaefthymiouEnergy Recovery For Low Power CMOS, WC Athas and N. TzartanisLow Power Digital Systems Based on Adiabatic-Switching Principles, William C. Athas