Post on 14-Dec-2015
- 1 -Confidential Nov. 21, 2003
Chip Enable Don’t Care NAND – Enabling Higher Performance, High Density NAND F
lash Memory for Cellular Handset Applications
Toshiba America Electronic Components, Inc.
November 2003
- 2 -Confidential Nov. 21, 2003
Chip Enabled “Don’t Care” NAND
• Modified NAND Flash for easier integration in cell phones or other CE devices with complex memory subsystems.
• Targeted to address growing file storage requirements in cell phones• Conventional NAND flash requires that the chip enable signal line be asserted l
ow during the entire read cycle which prevents the processor from communicating with other devices on the same bus
• Chip Enable “Don’t Care” NAND flash allows the microprocessor to communicate with other devices on the bus such as SRAM, PSRAM or NOR flash while the NAND retrieves the information requested.
• Enables easier integration of NAND with NOR, SRAM and PSRAM in a system• Initially available in 128Mb (TC581282AXB) and 256Mb (TC582562AXB)
densities (.16 micron). New part numbers after die shrink to 0.13 micron in Q3 2003 are TC58DDM82A1 (256Mb, 1.8V core and I/O) and TC58DDM82A1 (256Mb, dual power 2.5V to 3.6V for VCC and 1.65V to 1.85V for VCCQ).
• CEDC feature also now available in large block NAND in densities of 1Gb and 2Gb
- 3 -Confidential Nov. 21, 2003
MCP Memory Subsystem Trend
• Conventional “Talk-only” Cell phones used NOR + SRAM for code storage, backup and data storage memory requirements
• As cell phone applications have increased, the need for increased data storage for music, photo and data storage, as well as additional software application storage has made NAND Flash more attractive because of its faster program and erase times, higher density and smaller cell size.
• Chip Enable Don’t Care NAND makes NAND flash much easier to combine with NOR and other types of memory in memory subsystems (or multi-chip packages) with multiple types of memory
• CEDC NAND can be used in conventional cell phone architectures which combine NOR+SRAM+NAND or in newer NAND + low power SDRAM architectures.
• NOR+SRAM+NAND MCP solutions are rapidly gaining in acceptance among cell phone manufacturers
- 4 -Confidential Nov. 21, 2003
NAND Flash Read Function Options
A
Sequential Read (1)
(00H)0 527
MN
Start-address input
Busy
00H
/CE
/WE
/RE
R/B
I/O
Data Output
Type-1Type-1 (TSOP Package)(TSOP Package)
Sequential Read
Type-2 (BGA/MCP Package) Chip Enable Don’t CareType-2 (BGA/MCP Package) Chip Enable Don’t Care
MN
Start-address input
Busy
00H
/CE
/WE
/RE
R/B
I/O
Data Output
Cell array
Select page
N
M
Figure 3. Read mode (1) operation
527
Next Add. Input
No Sequential Read/CE don’t care
Sequential Read
- 5 -Confidential Nov. 21, 2003
High Speed
Low Power
Large DensityLow CostHigh Speed program
Large DensityHigh SpeedLow CostLow Power
64M-128M64M-128M
32M-64M32M-64M16M16M
RAMRAM
4M-8M4M-8M8M-16M8M-16M
FlashFlash
PSRAMPSRAMLP SDRAMLP SDRAM
LP-SRAMLP-SRAM
NORNOR
8M-16M8M-16M
16M-32M16M-32M
8M-16M8M-16M
64M-128M64M-128M
Movie / MusicBuffer
Working Area
Data Backup
128M-512M128M-512M
Movie / MusicApp. SoftStorage
128M-256M128M-256M
Boot &Basic Program
Talk only Browse phone 3GTalk only Browse phone 3G
NANDNAND
MCPMCP
Memory Requirements for Cellular Phones
- 6 -Confidential Nov. 21, 2003
Application Trend and Onboard Memory Size
Memory size is increased by diversity of application .
- 7 -Confidential Nov. 21, 2003
Multi-Chip Package for Mobile Phone
Demand of large density RAM and Flash.Increase of various application
High-speed requirement for execution of application software(PSRAM/NOR)
Embedded High-Density NAND(128M/256M/512M +) High-Density Pseudo SRAM (32M/64M/128M)
Low cost solution
MCP SolutionDemand from Mobile Phone Market
+
Multi-chip packages combine a complete, complex memory subsystem in a single, small component
High-Speed Function (PSRAM/NOR)8Page Mode: 25ns→18nsBurst Mode 15ns
- 8 -Confidential Nov. 21, 2003
Conventional solutionConventional solution
Code : NOR
Work : Pseudo-SRAM
Data : NAND
Backup : SRAM (in Japanese market)
Architectures for next generation phones
Cost oriented solutionCost oriented solution
Code & Data : NAND
Work : LP-SDRAM
with burst modewith burst mode
with shadowingwith shadowing
architecturearchitecture
- 9 -Confidential Nov. 21, 2003
386 367
296
210
9227
5 56154
238
315
314
02
9 41 106200
0
100
200
300
400
500
600
02 03 04 05 06 07
NAND+NOR+RAMNAND+NOR+RAM
SDRAM+NANDSDRAM+NAND
NORNOR ++ RAMRAM
MP/Y
From 2003, NAND becoming popular in Europe and US (already popular in Asia) driven by storage requirements
Pro
du
ctio
n v
olu
me
CY
Mobile MCP Memory Trend
Source: Toshiba Internal Data/Projections
2001< 10%
CameraPhones
End 2005> 90%
CameraPhones
- 10 -Confidential Nov. 21, 2003
Trend of Multi-Chip Package
2003200320002000
Pac
kag
e A
rea
Pac
kag
e A
rea
20012001 20022002
69 balls (Actual 56balls)(16MS+64MF)
(8/4MS+64/32MF)
Stacked MCPStacked MCP
3/4Chip St-MCP3/4Chip St-MCP
(NAND+NOR+PSRAM)
0.8mm pitch
9x121.2
9x121.4
7x101.2
Small
Small form factor
3Chip3Chip
9x12
1.4
(4MS+32MF)
(SRAM+NOR)
7x10
(NOR+NOR+SRAM+PSRAM)
7 x
107
x 10
9 x
129
x 12
CYCY
9x121.2
9x121.4
1.47x101.2
4Chip4Chip
3Chip3Chip
mo
re
20042004
5/6Chip St-MCP5/6Chip St-MCP
9x12
1.4
1.6
1.6
7Chip over7Chip over
9x12
- 11 -Confidential Nov. 21, 2003
Chip1Chip2 Chip3
Chip4 Chip5
Chip5Chip4
Chip3Chip2Chip1
TOSHIBA 5Chip St-MCP5Chip St-MCP
WIRE BOND
1.6mm
Max
PKG SIZE9x127x10
5-chip Stacked-MCP Technology
- 12 -Confidential Nov. 21, 2003
NAND / NOR Characteristics
Capacity
Power Supply
I/O
Access Time
ProgramSpeed (typ.)
Erase Speed(typ.)
Prog+Erase(typ.)
NOR~ 128Mbit
3V, 1.8V
x8/x16
70ns(30pF, 2.3V)65ns(30pF, 2.7V)
8s/Byte
4.1ms/512Byte
700ms/Block
1.23s/Block (main:64KB)
NAND
3V, 1.8V
x8/x1650ns(serial access cycle)
25s(random access)
200s/512Byte
2ms/Block (16KB)
33.6ms / 64KB (x8)
~ 1Gbit
- 13 -Confidential Nov. 21, 2003
NAND vs. NOR - Cell Structure
Word line
Bit line
Source line
Unit Cell
Contact
5F
2F
10F2
NOR
Cell size
2F
2F
4F2
NAND
Source line
Word line
Unit Cell
Layout
Cross- section
Cell Array
- 14 -Confidential Nov. 21, 2003
Performance comparison
Read Read Program Program
Erase Erase
NANDNAND2LC 2LC
NORNOR2LC2LC
27MB/s27MB/s
20.5MB/s20.5MB/s
55.2MB/s55.2MB/s
Fast Fast
50.0MB/s50.0MB/sNORNOR4LC4LC
Fast Fast
8.3MB/s8.3MB/s
0.15MB/s0.15MB/s
1.7MB/s1.7MB/s
NORNOR2LC2LC
NANDNAND2LC 2LC
NANDNAND4LC4LC
NANDNAND4LC4LC
NORNOR4LC4LC
0.145MB/s0.145MB/s
Slow Slow
1.5ms1.5ms
2ms2ms
2s2sNORNOR2LC2LC
1.2s1.2sNORNOR4LC4LC
NANDNAND2LC 2LC
NANDNAND4LC4LC
- 15 -Confidential Nov. 21, 2003
Performance comparison
NAND 2LC NAND 4LC
Read
Prog.
Erase
27MB/s
8.3MB/s
1.5ms
25us+50nsx1056 for 2k bytes
50nsx1056+200µs for 2k bytes
128 Kbytes
20.5MB/s
50us+50nsx1056 for 2k bytes
1.7MB/s
50nsx1056+1.2ms for 2k bytes
2ms
128 Kbytes
NOR 4LC
1.2s
128 Kbytes
50.MB/s
85ns+25nsx3 for 8 bytes
0.145MB/s
440µs for 64 bytes
NOR 2LC
2s
64 Kbytes
55.2MB/s
80ns+30nsx7 for 16 bytes
0.15MB/s
107µs for 16 bytes
- 16 -Confidential Nov. 21, 2003
Summary
• Memory requirements in high-end cell phones have increased dramatically to support new applications
• Different types of memory are best suited for different applications– Code storage– Working memory– File and additional application storage
• Multi-chip packages (MCP) enable complex memory subsystems in a single component
• Traditional NOR +SRAM memory solutions for cell phones are being replaced by NOR+PSRAM+NAND and other combinations of multiple memories
• One newer low-cost alternative is NAND + Low Power SDRAM• Chip Enable Don’t Care NAND Flash makes integration of
NAND with other memory types much easier.
- 17 -Confidential Nov. 21, 2003
• Information in this presentation, including product pricing and specifications, and content of services is current on the date issued, but is subject to change without prior notice.
• All trademarks and tradenames held within are the properties of their respective holders.