Combinational Logic Circuits

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Combinational Logic Circuits. Chapter 2 Mano and Kime. Combinational Logic Circuits. Binary Logic and Gates Boolean Algebra Standard Forms Map Simplification NAND and NOR Gates Exclusive-OR Gates Integrated Circuits. Digital Logic Gates. *. Gates with More than Two Inputs. - PowerPoint PPT Presentation

Transcript of Combinational Logic Circuits

CombinationalLogic Circuits

Chapter 2

Mano and Kime

CombinationalLogic Circuits

• Binary Logic and Gates

• Boolean Algebra

• Standard Forms

• Map Simplification

• NAND and NOR Gates

• Exclusive-OR Gates

• Integrated Circuits

Digital Logic Gates

*

Gates with More than Two Inputs

CombinationalLogic Circuits

• Binary Logic and Gates

• Boolean Algebra

• Standard Forms

• Map Simplification

• NAND and NOR Gates

• Exclusive-OR Gates

• Integrated Circuits

Basic Identities of Boolean Algebra

Implementation of Boolean Function with Gates

CombinationalLogic Circuits

• Binary Logic and Gates

• Boolean Algebra

• Standard Forms

• Map Simplification

• NAND and NOR Gates

• Exclusive-OR Gates

• Integrated Circuits

Minterms for Three Variables

Sum of Products Design

X Y minterms0 0 m0 = !X & !Y0 1 m1 = !X & Y1 0 m2 = X & !Y1 1 m3 = X & Y

Sum of Products Design

X Y Z0 0 00 1 11 0 11 1 0

Design an XOR gate

m1 = !X & Ym2 = X & !Y

Z = m1 + m2 = (!X & Y) + (X & !Y)

X Y

X !X Y !Y

Sum of Products: Exclusive-OR

!X & Y

X & !Y

Z = (!X & Y) + (X & !Y)

Maxterms for Three Variables

Product of Sums Design

Maxterms:A maxterm is NOT a mintermmaxterm M0 = NOT minterm m0M0 = m0’ =(X’ . Y’)’ = (X + Y)” = X + Y

Product of Sums Design

X Y minterms maxterms0 0 m0 = !X . !Y M0 = !m0 = X + Y0 1 m1 = !X . Y M1 = !m1 = X + !Y1 0 m2 = X . !Y M2 = !m2 = !X + Y1 1 m3 = X . Y M3 = !m3 = !X + !Y

Product of Sums Design

X Y Z0 0 00 1 11 0 11 1 0

Design an XOR gate

Z is NOT minterm m0

AND it is NOT minterm m3

Product of Sums Design

X Y Z0 0 00 1 11 0 11 1 0

Design an XOR gate

M0 = X + Y

M3 = !X + !Y

Z = M0 & M3 = (X + Y) & (!X + !Y)

X Y

X !X Y !Y

X + Y

!X + !Y

Z

Z = (X + Y) & (!X + !Y)

Product of Sums: Exclusive-OR

Three- Level and Two- Level Implementation

CombinationalLogic Circuits

• Binary Logic and Gates

• Boolean Algebra

• Standard Forms

• Map Simplification

• NAND and NOR Gates

• Exclusive-OR Gates

• Integrated Circuits

Two-Variable Map

Three-Variable Map

Three- Variable Map: Flat and on a Cylinder to Show Adjacent Squares

Three-variable K-Maps

XYZ

00 01 11 10

0

1

1 1

1 1

F = !X & !Y + X & Z

Three-variable K-Maps

XYZ

00 01 11 10

0

1

1 1

1 1

F = !X & !Y & !Z + !X & !Y & Z + X & !Y & Z + X & Y & Z

F = !X & !Y & (!Z + Z) + X & Z & (!Y + Y) = !X & !Y + X & Z

Three-variable K-Maps

XYZ

00 01 11 10

0

1 1

1

1 1

F = Y & !Z + X

1

Three-variable K-Maps

XYZ

00 01 11 10

0

1

1 1

1 11

1

F = !X & !Y + X & y + Z

Three-variable K-Maps

XYZ

00 01 11 10

0

1

1 1

1 1

F = X & Z + !X & !Z

Three-variable K-Maps

XYZ

00 01 11 10

0

1

1 1

1 1

1

1

F = Y + !Z

Three-variable K-Maps

X

YZ00 01 11 10

0

1

0 1 23

4 5 67

1 1

1 1

F = m0 + m2 + m5 + m7 = (0,2,5,7)

Four-Variable Map

Four-Variable Map: Flat and on a Torus to Show Adjacencies

Four-variable K-Maps

WXYZ

00 01 11 10

00

01

11

10

0 1 3 2

4 5 7 6

8 9

13 15 14

11 10

12

Each square is numbered in the above K-map

Four-variable K-Maps

WXYZ

00 01 11 10

00

01

11

10

0 1 23

4 5 67

8 9 1011

12 13 1415

F(W,X,Y,Z) = (2,4,5,6,7,9,13,14,15)

Four-variable K-Maps

1 11

1

1

WXYZ

00 01 11 10

00

01

11

10

111

1

F = !W & X + X & Y + !W & Y & !Z + W & !Y & Z

CombinationalLogic Circuits

• Binary Logic and Gates

• Boolean Algebra

• Standard Forms

• Map Simplification

• NAND and NOR Gates

• Exclusive-OR Gates

• Integrated Circuits

Prime Implicants

F = XY’Z + X’Z’ + X’Y

Each product termis an implicant

A product term that cannot have any of itsvariables removed and still imply the logicfunction is called a prime implicant.

CombinationalLogic Circuits

• Binary Logic and Gates

• Boolean Algebra

• Standard Forms

• Map Simplification

• NAND and NOR Gates

• Exclusive-OR Gates

• Integrated Circuits

Digital Logic Gates

>

>

��Logical Operations with NAND Gates

Alternative Graphics Symbols for NAND and NOT Gates

��Logical Operations with NOR Gates

Two Graphic Symbols for NOR Gate

Generalized De Morgan’s Theorem

• NOT all variables

• Change & to + and + to &

• NOT the result

• --------------------------------------------

• F = X & Y + X & Z + Y & Z

• F = !((!X + !Y) & (!X + !Z) & (!Y + !Z))

• F = !(!(X & Y) & !(X & Z) & !(Y & Z))

X

Y

X

Z

Y

Z

F

F = !(!(X & Y) & !(X & Z) & !(Y & Z))

X

Y

X

Z

Y

Z

F

F = !(!(X & Y) & !(X & Z) & !(Y & Z))

NAND Gate

X Y

X Z

Y Z

F

F = X & Y + X & Z + Y & Z

CombinationalLogic Circuits

• Binary Logic and Gates

• Boolean Algebra

• Standard Forms

• Map Simplification

• NAND and NOR Gates

• Exclusive-OR Gates

• Integrated Circuits

Exclusive-OR Gate

XOR

X

YZ

Z = X $ Y

X Y Z0 0 00 1 11 0 11 1 0

X $ 0 = XX $ 1 = !XX $ X = 0X $ !X = 1

X $ !Y = !(X $ Y)!X $ Y = !(X $ Y)A $ B = B $ A(A $ B) $ C = A $ (B $ C)

= A $ B $ C

Exclusive-OR Constructed with NAND gates

X & (!X + !Y) + Y & (!X + !Y) = X & !X + X & !Y + Y & !X + Y & !Y= X & !Y + Y & !X= X & !Y + !X & Y= X $ Y

Parity Generation and Checking

CombinationalLogic Circuits

• Binary Logic and Gates

• Boolean Algebra

• Standard Forms

• Map Simplification

• NAND and NOR Gates

• Exclusive-OR Gates

• Integrated Circuits

Fully Complementary CMOS Gate Structure and Examples

An Integrated circuit (IC) is a silicon semiconductor crystal, containing the components for the digital gates. The various gates are connected on the chip to form the IC.