9/15/09 - L19 Sequential CircuitsCopyright 2009 - Joanne DeGroat, ECE, OSU1 Sequential Cirucits.

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Combination Logic  Logic that performs some transformation operation on the inputs to produce outputs which are simple logic functions of the input.  The outputs reflect a function of the current values on the inputs.  There is not the capability to hold the value of the input. 9/15/09 - L19 Sequential Circuits Copyright Joanne DeGroat, ECE, OSU3

Transcript of 9/15/09 - L19 Sequential CircuitsCopyright 2009 - Joanne DeGroat, ECE, OSU1 Sequential Cirucits.

9/15/09 - L19 Sequential Circuits Copyright 2009 - Joanne DeGroat, ECE, OSU 1

Sequential Cirucits

9/15/09 - L19 Sequential Circuits

Copyright 2009 - Joanne DeGroat, ECE, OSU 2

Class 19 – Sequential Circuits Definitions Latches

Set-Reset – SR The D Latch

Material from section 5-1 and 5-2 of text

Combination Logic Logic that performs some transformation

operation on the inputs to produce outputs which are simple logic functions of the input.

The outputs reflect a function of the current values on the inputs.

There is not the capability to hold the value of the input.

9/15/09 - L19 Sequential Circuits

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Sequential Logic Logic elements capable of storing a logic

value. Sequential circuits are those circuits that

employ these elements.

Will be looking at the methodologies for sequential circuit design.

9/15/09 - L19 Sequential Circuits

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Basic structure The basic structure of a synchronous sequential

circuit is shown here.

Synchronous – One input is a clock and on the clock the next state becomes the present state of the system.

Sequential – The circuit transitions between states in a regular manner.

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Definitions Inputs – All the outside logic signal inputs to the

circuit. Typically, the clock is not consider part of the signal inputs of the circuit.

Outputs – The logic signal outputs. Present State – the logic value of all the state variables

of the system. These are stored in the state memory. Next State – Given the present state and the current

values on the inputs, the next state represents the next logic state the circuit will transition to on the next clock.

9/15/09 - L19 Sequential Circuits

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The SR Latch The SR (Set-Reset) Latch

And its operation

9/15/09 - L19 Sequential Circuits

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The waveform A simulation waveform would look

something like this

9/15/09 - L19 Sequential Circuits

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Other implementations of the SR With NAND Gates

And adding a control input

9/15/09 - L19 Sequential Circuits

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The D Latch The most common element in today’s VLSI

9/15/09 - L19 Sequential Circuits

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Another implementation The implementation used in VLSI used

properties of the technology to reduce circuit elements and power consumption.

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The VLSI implemention The VLSI implementation uses the

transmission gate. With control input of 1 the input = the output With control input of 0 it is an open circuit Used inverter feedback pair to store state. Transmission gate requires 2 transistors. Inverts require 2 transistors T-gate Latch – 8 or 10 transistors (depends on

availability of clk’9/15/09 - L19 Sequential Circuits

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Contrast with the gate circuit The D latch circuit in the text would take 18

transistors in a VLSI circuit. This is contrasted to 8 or 10 transistors.

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Class 19 assignment Covered sections 5-1 and 5-2 Problems for hand in

none Problems for practice

5-2

Reading for next class: sections 5-3

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