Chp 3- Sub-system Design
VLSI
Logical Effort - Designing Fast CMOS Circuits Sutherland Sproull Harris
LFSR Implementation in CMOS VLSI
Chapter07-Transient Analysis of Cmos Gates
VLSIQuestions
(Pucknell p:-134-178) (Neil west - p:-317-357). Switch logic Gate logics Combinational logic Clocked sequential circuits Clocking Strategies,PLL.
logical Effort
Lecture20
CHAP3-1_2
ppt
