VLSI
DESIGN OF LOW POWER TPG USING LP-LFSR
Externally Tested Scan Circuit with Built-In Activity Monitor and Adaptive Test Clock Priyadharshini Shanmugasundaram [email protected] Vishwani D. Agrawal.
MECVE VLSI and Embedded System (2).pdf
Externally Tested Scan Circuit with Built-In Activity Monitor and Adaptive Test Clock
Dynamic Scan Clock Control In BIST Circuits
