The Synthesis of Cyclic Circuits with SAT and Interpolation By John Backes and Marc Riedel ECE University of Minnesota.
Recording Synthesis History for Sequential Verification Robert Brayton Alan Mishchenko UC Berkeley.
BOSS 12 conference report Siti Aishah Hasbullah
Two Patch-based Algorithms for By-example Texture Synthesis Bruno Galerne [email protected] MAP5, Université Paris Descartes 1 Master 2 Traitement.
Sequential Synthesis History: Combinational Logic single FSM Hierarchy of FSM’s MISII Sequential Circuit Partitioning Facilities for managing networks.
