CS668- Lecture 2 - Sept. 30 Today’s topics Parallel Architectures (Chapter 2) Memory Hierarchy Busses and Switched Networks Interconnection Network Topologies.
Register Allocation
Register Allocation (via graph coloring)
Ch. 12 Cache Direct Mapped Cache. Comp Sci 251 -- mem hierarchy 2 Memory Hierarchy Registers: very few, very fast cache memory: small, fast main memory:
