Chapter 5 Basic Processing Unit
Multiple Sleep Mode Leakage Control for Cache Peripheral Circuits in Embedded Processors Houman Homayoun, Avesta Makhzan, Alex Veidenbaum Dept. of Computer.
PowerPC 750
Power Management in High Performance Processors through Dynamic Resource Adaptation and Multiple Sleep Mode Assignments Houman Homayoun National Science.
Power, Temperature, Reliability and Performance - Aware Optimizations in On-Chip SRAMs
AMD Virtualization
Multiple Sleep Mode Leakage Control for Cache Peripheral Circuits in Embedded Processors
Chapter 3 Memory and I/O Systems. Introduction Examine the design of advanced, high- performance processors Study basic components, such as memory systems,
17i10 Ijaet1009285 Design and Layout
