DeNovo: Rethinking the Multicore Memory Hierarchy for Disciplined Parallelism Byn Choi, Nima Honarmand, Rakesh Komuravelli, Robert Smolinski, Hyojin Sung,
ECE669 L18: Scalable Parallel Caches April 6, 2004 ECE 669 Parallel Computer Architecture Lecture 18 Scalable Parallel Caches.
Computer Architecture Lec 14 – Directory Based Multiprocessors.
CSE 490/590, Spring 2011 CSE 490/590 Computer Architecture Directory-Based Caches II Steve Ko Computer Sciences and Engineering University at Buffalo.
DeNovo : Rethinking the Multicore Memory Hierarchy for Disciplined Parallelism
An Efficient Asymmetric Distributed Lock for Embedded Multiprocessor Systems