Virtual and Cache Memory Example
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GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Ideal Situation:TLB hit, Cache hit
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Processor: The processor issues a request for a piece of memory at a virtual address (the processor doesn’t know it is a virtual address, it just knows the address).
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: the MMU checks in the Translation Lookaside Buffer (TLB) to see if the data at the virtual address is stored in main memory.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: If the mapping between the virtual address and the physical address is in the TLB, a TLB hit occurs, otherwise a TLB miss occurs.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: If a TLB hit occurred, the MMU uses the TLB mapping to convert the virtual address to a physical address (which refers to a location in main memory).
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Cache Memory: Use hardware to search in the cache (using tags) to see if the data at that memory address is stored in the cache.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Cache Memory: If the memory address is found in the cache, then a cache hit has occurred. If it is not found, then a cache miss has occurred.T = hC + (1-h)M
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Cache Memory: Return requested data from cache.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Memory: Return requested data. Total time, with TLB hit and cache hit: 4-5ns.
Cache Memory:What if you have a cache miss?
A cache miss occurs when the data that you are trying to access is not currently in the cache.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Cache Memory: If the memory address is found in the cache, then a cache hit has occurred. If it is not found, then a cache miss has occurred.T = hC + (1-h)M
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Cache Memory: Fetch the data from main memory and store it in the cache, using a replacement algorithm to evict previously cached data if necessary. Time: >220ns
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Cache Memory: Return requested data from cache.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Memory: Return requested data. Total time, with TLB hit and cache miss: ~220ns.
Virtual Memory: What if you have a TLB miss?
A TLB miss occurs when the mapping between the virtual address and the physical address is not stored in the TLB. It does not mean that the data is not in main memory.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: If the mapping between the virtual address and the physical address is in the TLB, a TLB hit occurs, otherwise a TLB miss occurs.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: Search the actual page table for the mapping of the virtual address to a physical address, indicating that the data at that address currently in main memory.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: If the virtual address has a mapping in the page table, then the data is in main memory. This is a page hit. Otherwise, it is a page fault.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: Use the address mapping in the page table to generate the physical address associated with the virtual address, indicating where the data is in main memory.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: Update the TLB with the mapping between the virtual address and the physical address.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: Reissue the memory request. This time, a TLB hit will occur and searching the cache will happen as in the first example.
Virtual Memory: What if you have a page fault?
A page fault occurs when the data at the virtual address is not currently stored in main memory, so does not have a physical address stored in the page table.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: If the virtual address has a mapping in the page table, then the data is in main memory. This is a page hit. Otherwise, it is a page fault.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: If a page fault has occurred, then update main memory by bringing the data in from secondary storage, using a replacement algorithm if needed.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: Update the Page Table with the mapping between the virtual address and the physical address.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: Generate the physical address indicating where the data at the virtual address is stored in main memory.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: Update the TLB with the mapping between the virtual address and the physical address.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
Virtual Memory: Reissue the memory request. This time, a TLB hit will occur and searching the cache will happen as in the first example. Total time: > 6ms.
GeneratePhys. Address
Check TLB
Hit? Hit?
Virtual Address
Memory Data
Search Cache
Return Datafrom Cache
Update Cache From Main Mem.
yes
yes
no
SearchPage Table
Hit?
GeneratePhys. Address
Update TLB
Update Main Mem.From Disk
UpdatePage Table
yes
no
Virtual MemoryCache
re-issue request
no
Hardware Software
Virtual and Cache Memory Example
GeneratePhys. Address
Search#1
Hit? Hit?
Virtual Address
Memory Data
Search#2
Return Data
Update#2
yes
yes
no
Search#3
Hit?
GeneratePhys. Address
Update#1
Update Main Mem.From Disk
Update#3
yes
no
re-issue request
no
Hardware Software
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