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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
TWEPP-07 Topical Workshop on Electronics for Particle Physics
Prague 2007
Serial Powering of Silicon Sensors
E.G. Villani, M. Weber, M. Tyndel, R. ApsimonRutherford Appleton Laboratory
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
OutlineOutline
• Serial Powering scheme• Characteristics of shunt regulator• Experimental results• Conclusions
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Pc = Im2Rc PM = nImVm
nx
nVRIPP
P
m
CmCM
M
1
1
1
1:Efficiency:=
Efficiency ratio: serial over independent powering
0
2
4
6
8
10
0.5
1.5
2.5
3.5
4.5
5.5
6.5
7.5
8.5
9.5
10.5
11.5
12.5
13.5
14.5
15.5
x = IR/V
[1+x
]/[1
+ x/
n]
n = 2
n = 5
n = 8
n= 10
n = 20
Example of efficiency plotExample of efficiency plot vs. number of modules (N) vs. number of modules (N)
and supply voltage (V) for Iand supply voltage (V) for Im m = 2 A R= 2 A Rcc = 3 = 3 ΩΩ
for Serial Powering schemefor Serial Powering scheme
Powering schemes comparisonPowering schemes comparison
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Current source provides power to the chain of shunt regulators.Each of them provides power to the local modules.Communication is achieved through AC coupled LVDSEach sensor has individual HV bias, referenced to its ground ( this might not be necessary)Test structure built and tested with SCT modules Initial stave tests done by C. Haber at LBL
Serial powering diagram – module chain shunt regulation -Serial powering diagram – module chain shunt regulation -
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Serial powering diagram – module shunt regulation -Serial powering diagram – module shunt regulation -
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Shunt regulator advantageous for steady average currentShunt regulator advantageous for steady average current
• Series regulatorSeries regulator can be thought of as a variable resistor in series with a load can be thought of as a variable resistor in series with a load• Fluctuations in current drawn by the load modifies via the feedback the resistor Fluctuations in current drawn by the load modifies via the feedback the resistor values : the power supply sees a constant current load, current circulates back into the values : the power supply sees a constant current load, current circulates back into the supplysupply
• Shunt regulatorShunt regulator can be thought of as a variable resistor in parallel with a load can be thought of as a variable resistor in parallel with a load• Fluctuations in current drawn by the load modifies via the feedback the resistor Fluctuations in current drawn by the load modifies via the feedback the resistor values : the power supply sees a constant resistance, current values : the power supply sees a constant resistance, current does notdoes not circulate back circulate back into the supplyinto the supply
∆∆IIldld
∆∆IIldld
↓↓Poor isolation Poor isolation
↑↑High efficiencyHigh efficiency
↑↑ Good isolation Good isolation
↓↓ Low efficiency (ILow efficiency (I loadmax loadmax to be provided by the supply)to be provided by the supply)
Regulators comparisonRegulators comparison
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
SPSCT - 2005 -150 mm x 150 mm
SPPCB - 2006 -111 mm x 83 mm
SSPPCB - 2006/7 -38 mm x 9 mm
Hybrid
SSPPCB
ABCD3TV2
Serial powering circuitry evolutionSerial powering circuitry evolution
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Serial powering stave implementationSerial powering stave implementation
Initial stave work done byC. Haber LBNL
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Shunt regulator performancesShunt regulator performances
• The shunt regulator in SSPPCB01 built around standard shunt TL431• Output boosted using PNP D45H8.• The output is set to nominally 4V • Stability analysis, output impedance • Over current condition analysis
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
• Phase margin vs. Ibias @ Resr [0.5, 2.5] Ω• Ibias decreases phase margin ( gm increases)• ESR affects forward feedback compensation
↑ESR OLG
CLG
Stability analysisStability analysis
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Output noise with C1,C3 10 f 16 v ceramic X5R 0805 pack
Oscillation bias dependentTektronix TDS3044B 400 MHZ
Stability analysisStability analysis
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Output noise with C1,C3 10 f 16 v ceramic low ESR A pack
Implication was size of low ESR capacitor ( A pack )
Stability analysisStability analysis
Tektronix TDS3044B 400 MHZ
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Output Impedance analysisOutput Impedance analysis
SSPPCB01Hybrid
QL355TP
IsinkAFG3252 WR6100A
A015
Output impedance and phase measurement
• Output impedance measured by applying a small sinusoidal varying signal to the driving current by meansof a current sink and measuring the corresponding output voltage. • From histogram of both peak-to-peak voltage and current the MPV value is determined • Their ratio is taken to determine the MPV of output impedance, in the frequency range of 1HZ to 40MHz.• From the histogram of the phase difference the output phase delay is measured in the same frequency range.
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Current and voltage output @ f = 2 and 10MHz
Output Impedance analysisOutput Impedance analysis
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
0
10
20
30
40
50
60
70
80
5.0E+05 5.0E+06 1.0E+07 1.5E+07 2.0E+07 2.5E+07 3.0E+07 3.5E+07 4.0E+07
SSPPCB01 Shunt regulator output impedance module•| Zo| << 1ohm f<1MHz• Almost monotonic increase beyond 1MHz• Consistent with nominal Open loop gain characteristics of TL431
TL431 open loop gain
Output Impedance analysisOutput Impedance analysis
Ω
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
SSPPCB01 Shunt regulator output impedance phase• Arg( Zo) increases ≈ monotonically with frequency
0
50
100
150
200
250
5.0E+05 5.0E+06 1.0E+07 1.5E+07 2.0E+07 2.5E+07 3.0E+07 3.5E+07 4.0E+07
Output Impedance analysisOutput Impedance analysis
degrees
Current and voltage output phase @ f = 20MHz
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
• Low output impedance crucial to achieve good ‘grounding’ and reduce picked up noise• Feasible option of using single HV supply for several sensors
Output Impedance analysisOutput Impedance analysis
SRi
SR1
SSSRi
SSSR1
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Shunt regulator protection analysisShunt regulator protection analysis
• The shunt regulator output has to carry the all current in case of load disconnected, to guarantee functioning of the chained modules
• This condition implies a power dissipation by the shunt device directly proportional to its voltage output thus power wasted and risk of damage if not cooled or over dimensioned
• A method investigated relies on automatically reducing shunt output voltage in case of overcurrent condition
• This feature could also be digitally enabled to turn off a module
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Ibias 500mA Ibias 600mA
Thermal analysis of SSPCB01 using IR camera 8…13μm • Simulated faulty condition:• No clock present onboard• No cooling• Different biasing conditions (400,500,600)mA
* SSPPCB01 was left running at 700mA for 30mins. No change in performances or damaged observed afterwards.
Over current condition - Thermal analysisOver current condition - Thermal analysis
emissivity of Si uncertain, used 0.75
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Shunt regulator protection schemeShunt regulator protection scheme
• The regulator automatically lowers its output voltage (from 4V to 1V in the test circuit) if the current through the power PNP continuously exceeds a set threshold for a set amount of time
• The voltage output recovers with hysteresis ( ≈ 150mA in the test circuit)
• The power pulse following an over currernt is not long enough to damage the PNP transistor
• By proper design the power PNP is housed in SOT23 package, no heat sink needed
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
• voltage decreases from 4V to 1V within 3 ms following an over current (40mA to 1500mA)
• voltage output recovers to 4V from1V (slew rate limited) within 70ms
• with output voltage 1V the power dissipated by the PNP is ≈ 0.32W. Noise ≈ 2mV
• circuitry left running for >1hr @ 1.5A. No damage or change in performances seen afterwards.
Vout
Isrct
Shunt regulator protection analysisShunt regulator protection analysis
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Current sourceCurrent source
SCT4SCT4
SP4SP4
SCT3SCT3
SCT2SCT2
SCT1SCT1
SP3SP3
SP2SP2
SP1SP1
1.E-06
1.E-05
1.E-04
1 2 3 4 5 6
run number
nois
e oc
cupa
ncy
662 top 662 btm 681 top 681 btm 755 top 755 btm 628 top 628 btm
•Test with up to 6 modules•Measure power saving and compare with predicted values
Average noise occupancies measured for four ATLAS SCT modules (top and bottom sensor average)
Photograph of test setup with 4 ATLAS SCT modules, serial powering scheme implemented on PCB.
Test results - SPSCT 2005 -Test results - SPSCT 2005 -
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Test results – SPPCB 2006 -Test results – SPPCB 2006 -
1350
1400
1450
1500
1550
1600
755 663 159 628 662 006
Module #
<E
NC
> IP
SP
•Average noise (ENC) for six SCT modules powered independently (IP) or in series (SP).
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Test results - SSPPCB 2007- Test results - SSPPCB 2007-
ENC vs. channel number for modules 4 and 5 on the stave using 2 HV lines
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1000
1200
1400
0 500 1000
Channel #
EN
C
Run 1
Run 2
Run 3
ENC vs. channel number for modules 4 and 5 on the stave using 1 HV line
0200400600800
100012001400
0 500 1000
channel #
EN
C
Run 1
Run 2
Run 3
•Tests on stave ongoing as modules are fitted•One chip not bonded •Noise (ENC) for two modules on stave (tests ongoing these days)• High voltage biasing scheme comparison: local (left) or shared (right)• No differences seen in noise performances
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Next step – SMARP integrated solution -Next step – SMARP integrated solution -
Power transistor(could be separate die)
Linear regulator(optional)
DCS
including ADCs
LVDS buffers
Shunt regulator
• Advantages• Avoids matching problems between many
parallel regulators• Simplifies system and separates functions• Allows for cheap MPW run for SMARP reduce
risk and accelerate powering R&D• Chips could be used elsewhere (pixels/CMS)
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
Next step – SMARP integrated solution -Next step – SMARP integrated solution -
External serial powering chip
Specifications based on experience with discrete
solutions and verified by simulations
The design could contain additional low voltage
amplifiers to implement protection and slow control
features
Design will contain LVDS section
Very generic power chip
Vcs+
IN
GMT
FBS
VREF
PD
GND
OPOOPM
OPP
-
+
+
-
U1
U2
P1
P2
-
+FBL
LIN LOUT
U3LM
P3
SOUT
Sh sense
LSense
/SEN
+
-
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Rutherford Appleton LaboratoryParticle Physics Department
G. Villani Σ Powering Prague TWEPP 2007
ConclusionsConclusions
• Reliability of Serial Powering demonstrated with several different designs of increasing
compactness• Crucial advantages of Serial powering in power efficiency, cable, cost and material budget
demonstrated• Various Serial Powering systems have been running since several years now; understanding of
system properties well advanced and constantly progressing • Crucial features are dynamic characteristics of shunt regulator • Protection schemes devised, designed, built and successfully tested• Next crucial step is to design a custom general purpose ASIC (SMARP1), that could be a
common ATLAS - CMS supply chip• Serial Powering scheme included in the design of future ATLAS SLHC Tracker Strip and Pixel
Readout Chip
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